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GET /api/patches/677366/?format=api
{ "id": 677366, "url": "http://patchwork.ozlabs.org/api/patches/677366/?format=api", "web_url": "http://patchwork.ozlabs.org/project/uboot/patch/20161001141931.32354-24-paul.burton@imgtec.com/", "project": { "id": 18, "url": "http://patchwork.ozlabs.org/api/projects/18/?format=api", "name": "U-Boot", "link_name": "uboot", "list_id": "u-boot.lists.denx.de", "list_email": "u-boot@lists.denx.de", "web_url": null, "scm_url": null, "webscm_url": null, "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<20161001141931.32354-24-paul.burton@imgtec.com>", "list_archive_url": null, "date": "2016-10-01T14:19:26", "name": "[U-Boot,23/27] boston: Provide physical CONFIG_SYS_SDRAM_BASE", "commit_ref": null, "pull_url": null, "state": "deferred", "archived": false, "hash": "745737f7403de0cc09809999891fab6e86046d54", "submitter": { "id": 33698, "url": "http://patchwork.ozlabs.org/api/people/33698/?format=api", "name": "Paul Burton", "email": "paul.burton@imgtec.com" }, "delegate": { "id": 3651, "url": "http://patchwork.ozlabs.org/api/users/3651/?format=api", "username": "trini", "first_name": "Tom", "last_name": "Rini", "email": "trini@ti.com" }, "mbox": "http://patchwork.ozlabs.org/project/uboot/patch/20161001141931.32354-24-paul.burton@imgtec.com/mbox/", "series": [], "comments": "http://patchwork.ozlabs.org/api/patches/677366/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/677366/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<u-boot-bounces@lists.denx.de>", "X-Original-To": "incoming@patchwork.ozlabs.org", "Delivered-To": "patchwork-incoming@bilbo.ozlabs.org", "Received": [ "from theia.denx.de (theia.denx.de [85.214.87.163])\n\tby ozlabs.org (Postfix) with ESMTP id 3smVwB3lFyz9s2G\n\tfor <incoming@patchwork.ozlabs.org>;\n\tSun, 2 Oct 2016 00:25:46 +1000 (AEST)", "from localhost (localhost [127.0.0.1])\n\tby theia.denx.de (Postfix) with ESMTP id E336DB380E;\n\tSat, 1 Oct 2016 16:25:44 +0200 (CEST)", "from theia.denx.de ([127.0.0.1])\n\tby localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024)\n\twith ESMTP id XOOqfAuz84LF; Sat, 1 Oct 2016 16:25:44 +0200 (CEST)", "from theia.denx.de (localhost [127.0.0.1])\n\tby theia.denx.de (Postfix) with ESMTP id 37EDCA761F;\n\tSat, 1 Oct 2016 16:25:44 +0200 (CEST)", "from localhost (localhost [127.0.0.1])\n\tby theia.denx.de (Postfix) with ESMTP id DC3DDA7629\n\tfor <u-boot@lists.denx.de>; Sat, 1 Oct 2016 16:25:41 +0200 (CEST)", "from theia.denx.de ([127.0.0.1])\n\tby localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024)\n\twith ESMTP id 3HWW-vUuDZpc for <u-boot@lists.denx.de>;\n\tSat, 1 Oct 2016 16:25:41 +0200 (CEST)", "from mailapp01.imgtec.com (mailapp02.imgtec.com [217.156.133.132])\n\tby theia.denx.de (Postfix) with ESMTP id A74A0A761F\n\tfor <u-boot@lists.denx.de>; Sat, 1 Oct 2016 16:25:39 +0200 (CEST)", "from HHMAIL03.hh.imgtec.org (unknown [10.44.0.21])\n\tby Forcepoint Email with ESMTPS id 02B90E4B33BB6;\n\tSat, 1 Oct 2016 15:25:35 +0100 (IST)", "from localhost (192.168.159.74) by HHMAIL03.hh.imgtec.org\n\t(10.44.0.22) with Microsoft SMTP Server (TLS) id 14.3.294.0;\n\tSat, 1 Oct 2016 15:25:38 +0100" ], "X-policyd-weight": "NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5\n\tNOT_IN_BL_NJABL=-1.5 (only DNSBL check requested)", "From": "Paul Burton <paul.burton@imgtec.com>", "To": "<u-boot@lists.denx.de>", "Date": "Sat, 1 Oct 2016 15:19:26 +0100", "Message-ID": "<20161001141931.32354-24-paul.burton@imgtec.com>", "X-Mailer": "git-send-email 2.10.0", "In-Reply-To": "<20161001141931.32354-1-paul.burton@imgtec.com>", "References": "<20161001141931.32354-1-paul.burton@imgtec.com>", "MIME-Version": "1.0", "X-Originating-IP": "[192.168.159.74]", "Subject": "[U-Boot] [PATCH 23/27] boston: Provide physical\n\tCONFIG_SYS_SDRAM_BASE", "X-BeenThere": "u-boot@lists.denx.de", "X-Mailman-Version": "2.1.15", "Precedence": "list", "List-Id": "U-Boot discussion <u-boot.lists.denx.de>", "List-Unsubscribe": "<http://lists.denx.de/mailman/options/u-boot>,\n\t<mailto:u-boot-request@lists.denx.de?subject=unsubscribe>", "List-Archive": "<http://lists.denx.de/pipermail/u-boot/>", "List-Post": "<mailto:u-boot@lists.denx.de>", "List-Help": "<mailto:u-boot-request@lists.denx.de?subject=help>", "List-Subscribe": "<http://lists.denx.de/mailman/listinfo/u-boot>,\n\t<mailto:u-boot-request@lists.denx.de?subject=subscribe>", "Content-Type": "text/plain; charset=\"us-ascii\"", "Content-Transfer-Encoding": "7bit", "Errors-To": "u-boot-bounces@lists.denx.de", "Sender": "\"U-Boot\" <u-boot-bounces@lists.denx.de>" }, "content": "README states that CONFIG_SYS_SDRAM_BASE should the physical base\naddress of SDRAM, whilst up until now various pieces of generic code\nhave presumed that it can be directly accessed by the CPU & MIPS has\nprovided a virtual address for CONFIG_SYS_SDRAM_BASE. Other generic code\nexpects CONFIG_SYS_SDRAM_BASE to be a physical address, which makes the\ninconsistency a mess.\n\nNow that the preceding patches have prepared us to handle using a\nphysical CONFIG_SYS_SDRAM_BASE, clean up the inconsistency for boston by\nproviding a physical CONFIG_SYS_SDRAM_BASE. A side effect of this & use\nof phys_to_virt is that on MIPS64 U-Boot will now access DDR through the\nxkphys region of the virtual address space rather than ckseg0, which\nnecessitates the change to board_get_usable_ram_top().\n\nSigned-off-by: Paul Burton <paul.burton@imgtec.com>\nCc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>\n---\n\n board/imgtec/boston/ddr.c | 8 ++------\n include/configs/boston.h | 21 ++++++++++-----------\n 2 files changed, 12 insertions(+), 17 deletions(-)", "diff": "diff --git a/board/imgtec/boston/ddr.c b/board/imgtec/boston/ddr.c\nindex ceffef6..e765627 100644\n--- a/board/imgtec/boston/ddr.c\n+++ b/board/imgtec/boston/ddr.c\n@@ -5,6 +5,7 @@\n */\n \n #include <common.h>\n+#include <linux/sizes.h>\n \n #include <asm/io.h>\n \n@@ -21,10 +22,5 @@ ulong board_get_usable_ram_top(ulong total_size)\n {\n \tDECLARE_GLOBAL_DATA_PTR;\n \n-\tif (gd->ram_top < CONFIG_SYS_SDRAM_BASE) {\n-\t\t/* 2GB wrapped around to 0 */\n-\t\treturn CKSEG0ADDR(256 << 20);\n-\t}\n-\n-\treturn min_t(unsigned long, gd->ram_top, CKSEG0ADDR(256 << 20));\n+\treturn min_t(ulong, gd->ram_top, (ulong)phys_to_virt(SZ_256M));\n }\ndiff --git a/include/configs/boston.h b/include/configs/boston.h\nindex e958054..37060b0 100644\n--- a/include/configs/boston.h\n+++ b/include/configs/boston.h\n@@ -27,20 +27,19 @@\n /*\n * Memory map\n */\n-#ifdef CONFIG_64BIT\n-# define CONFIG_SYS_SDRAM_BASE\t\t0xffffffff80000000\n-#else\n-# define CONFIG_SYS_SDRAM_BASE\t\t0x80000000\n-#endif\n-\n+#define CONFIG_SYS_SDRAM_BASE\t\t0x0\n #define CONFIG_SYS_INIT_SP_OFFSET\t0x400000\n-\n #define CONFIG_SYS_MONITOR_BASE\t\tCONFIG_SYS_TEXT_BASE\n \n-#define CONFIG_SYS_LOAD_ADDR\t\t(CONFIG_SYS_SDRAM_BASE + 0x100000)\n-\n-#define CONFIG_SYS_MEMTEST_START\t(CONFIG_SYS_SDRAM_BASE + 0)\n-#define CONFIG_SYS_MEMTEST_END\t\t(CONFIG_SYS_SDRAM_BASE + 0x10000000)\n+#ifdef CONFIG_64BIT\n+# define CONFIG_SYS_LOAD_ADDR\t\t0xffffffff80100000\n+# define CONFIG_SYS_MEMTEST_START\t0xffffffff80000000\n+# define CONFIG_SYS_MEMTEST_END\t\t0xffffffff90000000\n+#else\n+# define CONFIG_SYS_LOAD_ADDR\t\t0x80100000\n+# define CONFIG_SYS_MEMTEST_START\t0x80000000\n+# define CONFIG_SYS_MEMTEST_END\t\t0x90000000\n+#endif\n \n #define CONFIG_SYS_MALLOC_LEN\t\t(256 * 1024)\n \n", "prefixes": [ "U-Boot", "23/27" ] }