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GET /api/patches/676703/?format=api
{ "id": 676703, "url": "http://patchwork.ozlabs.org/api/patches/676703/?format=api", "web_url": "http://patchwork.ozlabs.org/project/intel-wired-lan/patch/1475169095-20873-14-git-send-email-bimmy.pujari@intel.com/", "project": { "id": 46, "url": "http://patchwork.ozlabs.org/api/projects/46/?format=api", "name": "Intel Wired Ethernet development", "link_name": "intel-wired-lan", "list_id": "intel-wired-lan.osuosl.org", "list_email": "intel-wired-lan@osuosl.org", "web_url": "", "scm_url": "", "webscm_url": "", "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<1475169095-20873-14-git-send-email-bimmy.pujari@intel.com>", "list_archive_url": null, "date": "2016-09-29T17:11:33", "name": "[next,S49,13/15] i40e: use a mutex instead of spinlock in PTP user entry points", "commit_ref": null, "pull_url": null, "state": "changes-requested", "archived": false, "hash": "307baf643ea8aa796eac9a19a5d97ac5201f1721", "submitter": { "id": 68919, "url": "http://patchwork.ozlabs.org/api/people/68919/?format=api", "name": "Pujari, Bimmy", "email": "bimmy.pujari@intel.com" }, "delegate": { "id": 68, "url": "http://patchwork.ozlabs.org/api/users/68/?format=api", "username": "jtkirshe", "first_name": "Jeff", "last_name": "Kirsher", "email": "jeffrey.t.kirsher@intel.com" }, "mbox": "http://patchwork.ozlabs.org/project/intel-wired-lan/patch/1475169095-20873-14-git-send-email-bimmy.pujari@intel.com/mbox/", "series": [], "comments": "http://patchwork.ozlabs.org/api/patches/676703/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/676703/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<intel-wired-lan-bounces@lists.osuosl.org>", "X-Original-To": [ "incoming@patchwork.ozlabs.org", "intel-wired-lan@lists.osuosl.org" ], "Delivered-To": [ "patchwork-incoming@bilbo.ozlabs.org", "intel-wired-lan@lists.osuosl.org" ], "Received": [ "from silver.osuosl.org (smtp3.osuosl.org [140.211.166.136])\n\t(using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits))\n\t(No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 3slLlH6Z1Fz9s5w\n\tfor <incoming@patchwork.ozlabs.org>;\n\tFri, 30 Sep 2016 03:14:03 +1000 (AEST)", "from localhost (localhost [127.0.0.1])\n\tby silver.osuosl.org (Postfix) with ESMTP id 769F332FF1;\n\tThu, 29 Sep 2016 17:14:02 +0000 (UTC)", "from silver.osuosl.org ([127.0.0.1])\n\tby localhost (.osuosl.org [127.0.0.1]) (amavisd-new, port 10024)\n\twith ESMTP id xcr3o6suRvvn; Thu, 29 Sep 2016 17:13:56 +0000 (UTC)", "from ash.osuosl.org (ash.osuosl.org [140.211.166.34])\n\tby silver.osuosl.org (Postfix) with ESMTP id 73D4233034;\n\tThu, 29 Sep 2016 17:13:12 +0000 (UTC)", "from hemlock.osuosl.org (smtp2.osuosl.org [140.211.166.133])\n\tby ash.osuosl.org (Postfix) with ESMTP id 858B51C1ECC\n\tfor <intel-wired-lan@lists.osuosl.org>;\n\tThu, 29 Sep 2016 17:13:04 +0000 (UTC)", "from localhost (localhost [127.0.0.1])\n\tby hemlock.osuosl.org (Postfix) with ESMTP id 824DD952EA\n\tfor <intel-wired-lan@lists.osuosl.org>;\n\tThu, 29 Sep 2016 17:13:04 +0000 (UTC)", "from hemlock.osuosl.org ([127.0.0.1])\n\tby localhost (.osuosl.org [127.0.0.1]) (amavisd-new, port 10024)\n\twith ESMTP id R22xc4BteGBH for <intel-wired-lan@lists.osuosl.org>;\n\tThu, 29 Sep 2016 17:13:02 +0000 (UTC)", "from mga01.intel.com (mga01.intel.com [192.55.52.88])\n\tby hemlock.osuosl.org (Postfix) with ESMTPS id D30D9952EE\n\tfor <intel-wired-lan@lists.osuosl.org>;\n\tThu, 29 Sep 2016 17:12:59 +0000 (UTC)", "from fmsmga004.fm.intel.com ([10.253.24.48])\n\tby fmsmga101.fm.intel.com with ESMTP; 29 Sep 2016 10:12:58 -0700", "from bimmy.jf.intel.com (HELO bimmy.linux1.jf.intel.com)\n\t([134.134.2.167])\n\tby fmsmga004.fm.intel.com with ESMTP; 29 Sep 2016 10:13:00 -0700" ], "X-Virus-Scanned": [ "amavisd-new at osuosl.org", "amavisd-new at osuosl.org" ], "X-Greylist": "domain auto-whitelisted by SQLgrey-1.7.6", "X-ExtLoop1": "1", "X-IronPort-AV": "E=Sophos;i=\"5.31,268,1473145200\"; d=\"scan'208\";a=\"174642333\"", "From": "Bimmy Pujari <bimmy.pujari@intel.com>", "To": "intel-wired-lan@lists.osuosl.org", "Date": "Thu, 29 Sep 2016 10:11:33 -0700", "Message-Id": "<1475169095-20873-14-git-send-email-bimmy.pujari@intel.com>", "X-Mailer": "git-send-email 2.4.11", "In-Reply-To": "<1475169095-20873-1-git-send-email-bimmy.pujari@intel.com>", "References": "<1475169095-20873-1-git-send-email-bimmy.pujari@intel.com>", "Subject": "[Intel-wired-lan] [next PATCH S49 13/15] i40e: use a mutex instead\n\tof spinlock in PTP user entry points", "X-BeenThere": "intel-wired-lan@lists.osuosl.org", "X-Mailman-Version": "2.1.18-1", "Precedence": "list", "List-Id": "Intel Wired Ethernet Linux Kernel Driver Development\n\t<intel-wired-lan.lists.osuosl.org>", "List-Unsubscribe": "<http://lists.osuosl.org/mailman/options/intel-wired-lan>, \n\t<mailto:intel-wired-lan-request@lists.osuosl.org?subject=unsubscribe>", "List-Archive": "<http://lists.osuosl.org/pipermail/intel-wired-lan/>", "List-Post": "<mailto:intel-wired-lan@lists.osuosl.org>", "List-Help": "<mailto:intel-wired-lan-request@lists.osuosl.org?subject=help>", "List-Subscribe": "<http://lists.osuosl.org/mailman/listinfo/intel-wired-lan>, \n\t<mailto:intel-wired-lan-request@lists.osuosl.org?subject=subscribe>", "MIME-Version": "1.0", "Content-Type": "text/plain; charset=\"us-ascii\"", "Content-Transfer-Encoding": "7bit", "Errors-To": "intel-wired-lan-bounces@lists.osuosl.org", "Sender": "\"Intel-wired-lan\" <intel-wired-lan-bounces@lists.osuosl.org>" }, "content": "From: Jacob Keller <jacob.e.keller@intel.com>\n\nWe need a locking mechanism to protect the hardware SYSTIME register\nwhich is split over 2 values, and has internal hardware latching. We\ncan't allow multiple accesses at the same time. However....\n\nThe spinlock_t is overkill here, especially use of spin_lock_irqsave,\nsince every PTP access will halt hardirqs. Notice that the only places\nwhich need the SYSTIME value are user context and are capable of sleeping.\nThus, it is safe to use a mutex here instead of the spinlock.\n\nSigned-off-by: Jacob Keller <jacob.e.keller@intel.com>\nChange-ID: I971761a89b58c6aad953590162e85a327fbba232\n---\nTesting-hints:\n Suggested by Alex after seeing that the code flows don't take the lock\n in irq context. Not sure how to test this directly, but should ensure\n that PTP functionality remains unchanged, and that driver\n functionality remains consistent especially when using PTP software.\n\n drivers/net/ethernet/intel/i40e/i40e.h | 2 +-\n drivers/net/ethernet/intel/i40e/i40e_ptp.c | 20 +++++++-------------\n 2 files changed, 8 insertions(+), 14 deletions(-)", "diff": "diff --git a/drivers/net/ethernet/intel/i40e/i40e.h b/drivers/net/ethernet/intel/i40e/i40e.h\nindex 1d9a6b9..f7f32aa 100644\n--- a/drivers/net/ethernet/intel/i40e/i40e.h\n+++ b/drivers/net/ethernet/intel/i40e/i40e.h\n@@ -430,7 +430,7 @@ struct i40e_pf {\n \tstruct sk_buff *ptp_tx_skb;\n \tstruct hwtstamp_config tstamp_config;\n \tunsigned long last_rx_ptp_check;\n-\tspinlock_t tmreg_lock; /* Used to protect the device time registers. */\n+\tstruct mutex tmreg_lock; /* Used to protect the SYSTIME registers. */\n \tu64 ptp_base_adj;\n \tu32 tx_hwtstamp_timeouts;\n \tu32 rx_hwtstamp_cleared;\ndiff --git a/drivers/net/ethernet/intel/i40e/i40e_ptp.c b/drivers/net/ethernet/intel/i40e/i40e_ptp.c\nindex f1fecea..177b7fb 100644\n--- a/drivers/net/ethernet/intel/i40e/i40e_ptp.c\n+++ b/drivers/net/ethernet/intel/i40e/i40e_ptp.c\n@@ -159,16 +159,15 @@ static int i40e_ptp_adjtime(struct ptp_clock_info *ptp, s64 delta)\n {\n \tstruct i40e_pf *pf = container_of(ptp, struct i40e_pf, ptp_caps);\n \tstruct timespec64 now, then;\n-\tunsigned long flags;\n \n \tthen = ns_to_timespec64(delta);\n-\tspin_lock_irqsave(&pf->tmreg_lock, flags);\n+\tmutex_lock(&pf->tmreg_lock);\n \n \ti40e_ptp_read(pf, &now);\n \tnow = timespec64_add(now, then);\n \ti40e_ptp_write(pf, (const struct timespec64 *)&now);\n \n-\tspin_unlock_irqrestore(&pf->tmreg_lock, flags);\n+\tmutex_unlock(&pf->tmreg_lock);\n \n \treturn 0;\n }\n@@ -184,11 +183,10 @@ static int i40e_ptp_adjtime(struct ptp_clock_info *ptp, s64 delta)\n static int i40e_ptp_gettime(struct ptp_clock_info *ptp, struct timespec64 *ts)\n {\n \tstruct i40e_pf *pf = container_of(ptp, struct i40e_pf, ptp_caps);\n-\tunsigned long flags;\n \n-\tspin_lock_irqsave(&pf->tmreg_lock, flags);\n+\tmutex_lock(&pf->tmreg_lock);\n \ti40e_ptp_read(pf, ts);\n-\tspin_unlock_irqrestore(&pf->tmreg_lock, flags);\n+\tmutex_unlock(&pf->tmreg_lock);\n \n \treturn 0;\n }\n@@ -205,11 +203,10 @@ static int i40e_ptp_settime(struct ptp_clock_info *ptp,\n \t\t\t const struct timespec64 *ts)\n {\n \tstruct i40e_pf *pf = container_of(ptp, struct i40e_pf, ptp_caps);\n-\tunsigned long flags;\n \n-\tspin_lock_irqsave(&pf->tmreg_lock, flags);\n+\tmutex_lock(&pf->tmreg_lock);\n \ti40e_ptp_write(pf, ts);\n-\tspin_unlock_irqrestore(&pf->tmreg_lock, flags);\n+\tmutex_unlock(&pf->tmreg_lock);\n \n \treturn 0;\n }\n@@ -658,10 +655,7 @@ void i40e_ptp_init(struct i40e_pf *pf)\n \t\treturn;\n \t}\n \n-\t/* we have to initialize the lock first, since we can't control\n-\t * when the user will enter the PHC device entry points\n-\t */\n-\tspin_lock_init(&pf->tmreg_lock);\n+\tmutex_init(&pf->tmreg_lock);\n \n \t/* ensure we have a clock device */\n \terr = i40e_ptp_create_clock(pf);\n", "prefixes": [ "next", "S49", "13/15" ] }