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GET /api/patches/676691/?format=api
{ "id": 676691, "url": "http://patchwork.ozlabs.org/api/patches/676691/?format=api", "web_url": "http://patchwork.ozlabs.org/project/intel-wired-lan/patch/1475169095-20873-13-git-send-email-bimmy.pujari@intel.com/", "project": { "id": 46, "url": "http://patchwork.ozlabs.org/api/projects/46/?format=api", "name": "Intel Wired Ethernet development", "link_name": "intel-wired-lan", "list_id": "intel-wired-lan.osuosl.org", "list_email": "intel-wired-lan@osuosl.org", "web_url": "", "scm_url": "", "webscm_url": "", "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<1475169095-20873-13-git-send-email-bimmy.pujari@intel.com>", "list_archive_url": null, "date": "2016-09-29T17:11:32", "name": "[next,S49,12/15] i40e: correct check for reading TSYNINDX from the receive descriptor", "commit_ref": null, "pull_url": null, "state": "changes-requested", "archived": false, "hash": "b497335bd7a1237d581238442828673ee4129499", "submitter": { "id": 68919, "url": "http://patchwork.ozlabs.org/api/people/68919/?format=api", "name": "Pujari, Bimmy", "email": "bimmy.pujari@intel.com" }, "delegate": { "id": 68, "url": "http://patchwork.ozlabs.org/api/users/68/?format=api", "username": "jtkirshe", "first_name": "Jeff", "last_name": "Kirsher", "email": "jeffrey.t.kirsher@intel.com" }, "mbox": "http://patchwork.ozlabs.org/project/intel-wired-lan/patch/1475169095-20873-13-git-send-email-bimmy.pujari@intel.com/mbox/", "series": [], "comments": "http://patchwork.ozlabs.org/api/patches/676691/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/676691/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<intel-wired-lan-bounces@lists.osuosl.org>", "X-Original-To": [ "incoming@patchwork.ozlabs.org", "intel-wired-lan@lists.osuosl.org" ], "Delivered-To": [ "patchwork-incoming@bilbo.ozlabs.org", "intel-wired-lan@lists.osuosl.org" ], "Received": [ "from silver.osuosl.org (smtp3.osuosl.org [140.211.166.136])\n\t(using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits))\n\t(No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 3slLkX0YQTz9s5w\n\tfor <incoming@patchwork.ozlabs.org>;\n\tFri, 30 Sep 2016 03:13:24 +1000 (AEST)", "from localhost (localhost [127.0.0.1])\n\tby silver.osuosl.org (Postfix) with ESMTP id 4B5113304F;\n\tThu, 29 Sep 2016 17:13:22 +0000 (UTC)", "from silver.osuosl.org ([127.0.0.1])\n\tby localhost (.osuosl.org [127.0.0.1]) (amavisd-new, port 10024)\n\twith ESMTP id CrYC8prix9-9; Thu, 29 Sep 2016 17:13:16 +0000 (UTC)", "from ash.osuosl.org (ash.osuosl.org [140.211.166.34])\n\tby silver.osuosl.org (Postfix) with ESMTP id B094732FC3;\n\tThu, 29 Sep 2016 17:13:04 +0000 (UTC)", "from hemlock.osuosl.org (smtp2.osuosl.org [140.211.166.133])\n\tby ash.osuosl.org (Postfix) with ESMTP id 77ED51C1ECC\n\tfor <intel-wired-lan@lists.osuosl.org>;\n\tThu, 29 Sep 2016 17:13:02 +0000 (UTC)", "from localhost (localhost [127.0.0.1])\n\tby hemlock.osuosl.org (Postfix) with ESMTP id 735FB95469\n\tfor <intel-wired-lan@lists.osuosl.org>;\n\tThu, 29 Sep 2016 17:13:02 +0000 (UTC)", "from hemlock.osuosl.org ([127.0.0.1])\n\tby localhost (.osuosl.org [127.0.0.1]) (amavisd-new, port 10024)\n\twith ESMTP id Cj+az4EgYpo8 for <intel-wired-lan@lists.osuosl.org>;\n\tThu, 29 Sep 2016 17:13:01 +0000 (UTC)", "from mga01.intel.com (mga01.intel.com [192.55.52.88])\n\tby hemlock.osuosl.org (Postfix) with ESMTPS id CBD05952ED\n\tfor <intel-wired-lan@lists.osuosl.org>;\n\tThu, 29 Sep 2016 17:12:59 +0000 (UTC)", "from fmsmga004.fm.intel.com ([10.253.24.48])\n\tby fmsmga101.fm.intel.com with ESMTP; 29 Sep 2016 10:12:58 -0700", "from bimmy.jf.intel.com (HELO bimmy.linux1.jf.intel.com)\n\t([134.134.2.167])\n\tby fmsmga004.fm.intel.com with ESMTP; 29 Sep 2016 10:12:59 -0700" ], "X-Virus-Scanned": [ "amavisd-new at osuosl.org", "amavisd-new at osuosl.org" ], "X-Greylist": "domain auto-whitelisted by SQLgrey-1.7.6", "X-ExtLoop1": "1", "X-IronPort-AV": "E=Sophos;i=\"5.31,268,1473145200\"; d=\"scan'208\";a=\"174642327\"", "From": "Bimmy Pujari <bimmy.pujari@intel.com>", "To": "intel-wired-lan@lists.osuosl.org", "Date": "Thu, 29 Sep 2016 10:11:32 -0700", "Message-Id": "<1475169095-20873-13-git-send-email-bimmy.pujari@intel.com>", "X-Mailer": "git-send-email 2.4.11", "In-Reply-To": "<1475169095-20873-1-git-send-email-bimmy.pujari@intel.com>", "References": "<1475169095-20873-1-git-send-email-bimmy.pujari@intel.com>", "Subject": "[Intel-wired-lan] [next PATCH S49 12/15] i40e: correct check for\n\treading TSYNINDX from the receive descriptor", "X-BeenThere": "intel-wired-lan@lists.osuosl.org", "X-Mailman-Version": "2.1.18-1", "Precedence": "list", "List-Id": "Intel Wired Ethernet Linux Kernel Driver Development\n\t<intel-wired-lan.lists.osuosl.org>", "List-Unsubscribe": "<http://lists.osuosl.org/mailman/options/intel-wired-lan>, \n\t<mailto:intel-wired-lan-request@lists.osuosl.org?subject=unsubscribe>", "List-Archive": "<http://lists.osuosl.org/pipermail/intel-wired-lan/>", "List-Post": "<mailto:intel-wired-lan@lists.osuosl.org>", "List-Help": "<mailto:intel-wired-lan-request@lists.osuosl.org?subject=help>", "List-Subscribe": "<http://lists.osuosl.org/mailman/listinfo/intel-wired-lan>, \n\t<mailto:intel-wired-lan-request@lists.osuosl.org?subject=subscribe>", "MIME-Version": "1.0", "Content-Type": "text/plain; charset=\"us-ascii\"", "Content-Transfer-Encoding": "7bit", "Errors-To": "intel-wired-lan-bounces@lists.osuosl.org", "Sender": "\"Intel-wired-lan\" <intel-wired-lan-bounces@lists.osuosl.org>" }, "content": "From: Jacob Keller <jacob.e.keller@intel.com>\n\nWhen hardware has taken a timestamp for a received packet, it indicates\nwhich RXTIME register the timestamp was placed in by some bits in the\nreceive descriptor. It uses 3 bits, one to indicate if the descriptor\nindex is valid (ie: there was a timestamp) and 2 bits to indicate which\nof the 4 registers to read. However, the driver currently does not check\nthe TSYNVALID bit and only checks the index. It assumes a zero index\nmeans no timestamp, and a non zero index means a timestamp occurred.\nWhile this appears to be true, it prevents ever reading a timestamp in\nRXTIME[0], and causes the first timestamp the device captures to be\nignored.\n\nFix this by using the TSYNVALID bit correctly as the true indicator of\nwhether the packet has an associated timestamp.\n\nAlso rename the variable rsyn to tsyn as this is more descriptive and\nmatches the register names.\n\nSigned-off-by: Jacob Keller <jacob.e.keller@intel.com>\nChange-ID: I4437e8f3a3df2c2ddb458b0fb61420f3dafc4c12\n---\nTesting-hints:\n This is difficult to notice because the hardware has 4 timestamp\n registers, and we rarely need more than 1 or 2 at a time. I discovered\n it with a modified driver using trace_printk on the PRTTSYN_STAT_1\n register.\n\n drivers/net/ethernet/intel/i40e/i40e_txrx.c | 7 ++++---\n 1 file changed, 4 insertions(+), 3 deletions(-)", "diff": "diff --git a/drivers/net/ethernet/intel/i40e/i40e_txrx.c b/drivers/net/ethernet/intel/i40e/i40e_txrx.c\nindex 54764dd..4092d0b 100644\n--- a/drivers/net/ethernet/intel/i40e/i40e_txrx.c\n+++ b/drivers/net/ethernet/intel/i40e/i40e_txrx.c\n@@ -1407,11 +1407,12 @@ void i40e_process_skb_fields(struct i40e_ring *rx_ring,\n \tu64 qword = le64_to_cpu(rx_desc->wb.qword1.status_error_len);\n \tu32 rx_status = (qword & I40E_RXD_QW1_STATUS_MASK) >>\n \t\t\tI40E_RXD_QW1_STATUS_SHIFT;\n-\tu32 rsyn = (rx_status & I40E_RXD_QW1_STATUS_TSYNINDX_MASK) >>\n+\tu32 tsynvalid = rx_status & I40E_RXD_QW1_STATUS_TSYNVALID_MASK;\n+\tu32 tsyn = (rx_status & I40E_RXD_QW1_STATUS_TSYNINDX_MASK) >>\n \t\t I40E_RXD_QW1_STATUS_TSYNINDX_SHIFT;\n \n-\tif (unlikely(rsyn)) {\n-\t\ti40e_ptp_rx_hwtstamp(rx_ring->vsi->back, skb, rsyn);\n+\tif (unlikely(tsynvalid)) {\n+\t\ti40e_ptp_rx_hwtstamp(rx_ring->vsi->back, skb, tsyn);\n \t\trx_ring->last_rx_timestamp = jiffies;\n \t}\n \n", "prefixes": [ "next", "S49", "12/15" ] }