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GET /api/patches/675329/?format=api
{ "id": 675329, "url": "http://patchwork.ozlabs.org/api/patches/675329/?format=api", "web_url": "http://patchwork.ozlabs.org/project/intel-wired-lan/patch/20160926210813.30339.95294.stgit@localhost6.localdomain6/", "project": { "id": 46, "url": "http://patchwork.ozlabs.org/api/projects/46/?format=api", "name": "Intel Wired Ethernet development", "link_name": "intel-wired-lan", "list_id": "intel-wired-lan.osuosl.org", "list_email": "intel-wired-lan@osuosl.org", "web_url": "", "scm_url": "", "webscm_url": "", "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<20160926210813.30339.95294.stgit@localhost6.localdomain6>", "list_archive_url": null, "date": "2016-09-26T21:08:13", "name": "[1/2] ixgbe: do not use ixgbe specific mdio defines", "commit_ref": null, "pull_url": null, "state": "accepted", "archived": false, "hash": "8e1a8a26539c41d4e5a4d7869e2e7672979edc39", "submitter": { "id": 1670, "url": "http://patchwork.ozlabs.org/api/people/1670/?format=api", "name": "Tantilov, Emil S", "email": "emil.s.tantilov@intel.com" }, "delegate": { "id": 68, "url": "http://patchwork.ozlabs.org/api/users/68/?format=api", "username": "jtkirshe", "first_name": "Jeff", "last_name": "Kirsher", "email": "jeffrey.t.kirsher@intel.com" }, "mbox": "http://patchwork.ozlabs.org/project/intel-wired-lan/patch/20160926210813.30339.95294.stgit@localhost6.localdomain6/mbox/", "series": [], "comments": "http://patchwork.ozlabs.org/api/patches/675329/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/675329/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<intel-wired-lan-bounces@lists.osuosl.org>", "X-Original-To": [ "incoming@patchwork.ozlabs.org", "intel-wired-lan@lists.osuosl.org" ], "Delivered-To": [ "patchwork-incoming@bilbo.ozlabs.org", "intel-wired-lan@lists.osuosl.org" ], "Received": [ "from whitealder.osuosl.org (smtp1.osuosl.org [140.211.166.138])\n\t(using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits))\n\t(No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 3sjc0G5DnRz9s65\n\tfor <incoming@patchwork.ozlabs.org>;\n\tTue, 27 Sep 2016 07:04:13 +1000 (AEST)", "from localhost (localhost [127.0.0.1])\n\tby whitealder.osuosl.org (Postfix) with ESMTP id 4FC8E8AE87;\n\tMon, 26 Sep 2016 21:04:11 +0000 (UTC)", "from whitealder.osuosl.org ([127.0.0.1])\n\tby localhost (.osuosl.org [127.0.0.1]) (amavisd-new, port 10024)\n\twith ESMTP id OO-b7NeyhsPy; Mon, 26 Sep 2016 21:04:09 +0000 (UTC)", "from ash.osuosl.org (ash.osuosl.org [140.211.166.34])\n\tby whitealder.osuosl.org (Postfix) with ESMTP id A57E68A65C;\n\tMon, 26 Sep 2016 21:04:09 +0000 (UTC)", "from whitealder.osuosl.org (smtp1.osuosl.org [140.211.166.138])\n\tby ash.osuosl.org (Postfix) with ESMTP id DFCF01C29FC\n\tfor <intel-wired-lan@lists.osuosl.org>;\n\tMon, 26 Sep 2016 21:04:07 +0000 (UTC)", "from localhost (localhost [127.0.0.1])\n\tby whitealder.osuosl.org (Postfix) with ESMTP id DD15B8A65C\n\tfor <intel-wired-lan@lists.osuosl.org>;\n\tMon, 26 Sep 2016 21:04:07 +0000 (UTC)", "from whitealder.osuosl.org ([127.0.0.1])\n\tby localhost (.osuosl.org [127.0.0.1]) (amavisd-new, port 10024)\n\twith ESMTP id xqMqdEAIttne for <intel-wired-lan@lists.osuosl.org>;\n\tMon, 26 Sep 2016 21:04:06 +0000 (UTC)", "from mga02.intel.com (mga02.intel.com [134.134.136.20])\n\tby whitealder.osuosl.org (Postfix) with ESMTPS id A321489602\n\tfor <intel-wired-lan@lists.osuosl.org>;\n\tMon, 26 Sep 2016 21:04:06 +0000 (UTC)", "from fmsmga006.fm.intel.com ([10.253.24.20])\n\tby orsmga101.jf.intel.com with ESMTP; 26 Sep 2016 14:04:05 -0700", "from estantil-desk3.jf.intel.com (HELO localhost6.localdomain6)\n\t([134.134.3.186])\n\tby fmsmga006.fm.intel.com with ESMTP; 26 Sep 2016 14:04:05 -0700" ], "X-Virus-Scanned": [ "amavisd-new at osuosl.org", "amavisd-new at osuosl.org" ], "X-Greylist": "domain auto-whitelisted by SQLgrey-1.7.6", "X-ExtLoop1": "1", "X-IronPort-AV": "E=Sophos;i=\"5.30,401,1470726000\"; d=\"scan'208\";a=\"13440671\"", "From": "Emil Tantilov <emil.s.tantilov@intel.com>", "To": "intel-wired-lan@lists.osuosl.org", "Date": "Mon, 26 Sep 2016 14:08:13 -0700", "Message-ID": "<20160926210813.30339.95294.stgit@localhost6.localdomain6>", "User-Agent": "StGit/0.17.1-17-ge4e0", "MIME-Version": "1.0", "Subject": "[Intel-wired-lan] [PATCH 1/2] ixgbe: do not use ixgbe specific mdio\n\tdefines", "X-BeenThere": "intel-wired-lan@lists.osuosl.org", "X-Mailman-Version": "2.1.18-1", "Precedence": "list", "List-Id": "Intel Wired Ethernet Linux Kernel Driver Development\n\t<intel-wired-lan.lists.osuosl.org>", "List-Unsubscribe": "<http://lists.osuosl.org/mailman/options/intel-wired-lan>, \n\t<mailto:intel-wired-lan-request@lists.osuosl.org?subject=unsubscribe>", "List-Archive": "<http://lists.osuosl.org/pipermail/intel-wired-lan/>", "List-Post": "<mailto:intel-wired-lan@lists.osuosl.org>", "List-Help": "<mailto:intel-wired-lan-request@lists.osuosl.org?subject=help>", "List-Subscribe": "<http://lists.osuosl.org/mailman/listinfo/intel-wired-lan>, \n\t<mailto:intel-wired-lan-request@lists.osuosl.org?subject=subscribe>", "Content-Type": "text/plain; charset=\"us-ascii\"", "Content-Transfer-Encoding": "7bit", "Errors-To": "intel-wired-lan-bounces@lists.osuosl.org", "Sender": "\"Intel-wired-lan\" <intel-wired-lan-bounces@lists.osuosl.org>" }, "content": "Replace some ixgbe specific MDIO defines with their equivalent\nfrom the kernel.\n\nSigned-off-by: Emil Tantilov <emil.s.tantilov@intel.com>\n---\n drivers/net/ethernet/intel/ixgbe/ixgbe_phy.c | 8 +--\n drivers/net/ethernet/intel/ixgbe/ixgbe_type.h | 16 ------\n drivers/net/ethernet/intel/ixgbe/ixgbe_x550.c | 65 ++++++++++++-------------\n 3 files changed, 33 insertions(+), 56 deletions(-)", "diff": "diff --git a/drivers/net/ethernet/intel/ixgbe/ixgbe_phy.c b/drivers/net/ethernet/intel/ixgbe/ixgbe_phy.c\nindex 021ab9b..b883b31 100644\n--- a/drivers/net/ethernet/intel/ixgbe/ixgbe_phy.c\n+++ b/drivers/net/ethernet/intel/ixgbe/ixgbe_phy.c\n@@ -2396,9 +2396,7 @@ s32 ixgbe_set_copper_phy_power(struct ixgbe_hw *hw, bool on)\n \tif (!on && ixgbe_mng_present(hw))\n \t\treturn 0;\n \n-\tstatus = hw->phy.ops.read_reg(hw, IXGBE_MDIO_VENDOR_SPECIFIC_1_CONTROL,\n-\t\t\t\t IXGBE_MDIO_VENDOR_SPECIFIC_1_DEV_TYPE,\n-\t\t\t\t ®);\n+\tstatus = hw->phy.ops.read_reg(hw, MDIO_CTRL1, MDIO_MMD_VEND1, ®);\n \tif (status)\n \t\treturn status;\n \n@@ -2410,8 +2408,6 @@ s32 ixgbe_set_copper_phy_power(struct ixgbe_hw *hw, bool on)\n \t\treg |= IXGBE_MDIO_PHY_SET_LOW_POWER_MODE;\n \t}\n \n-\tstatus = hw->phy.ops.write_reg(hw, IXGBE_MDIO_VENDOR_SPECIFIC_1_CONTROL,\n-\t\t\t\t IXGBE_MDIO_VENDOR_SPECIFIC_1_DEV_TYPE,\n-\t\t\t\t reg);\n+\tstatus = hw->phy.ops.write_reg(hw, MDIO_CTRL1, MDIO_MMD_VEND1, reg);\n \treturn status;\n }\ndiff --git a/drivers/net/ethernet/intel/ixgbe/ixgbe_type.h b/drivers/net/ethernet/intel/ixgbe/ixgbe_type.h\nindex 31d82e3..ed19b9f 100644\n--- a/drivers/net/ethernet/intel/ixgbe/ixgbe_type.h\n+++ b/drivers/net/ethernet/intel/ixgbe/ixgbe_type.h\n@@ -874,19 +874,13 @@ struct ixgbe_thermal_sensor_data {\n #define IXGBE_MDIO_AUTO_NEG_VENDOR_STATUS_1GB\t0x4 /* 1Gb/s */\n #define IXGBE_MDIO_AUTO_NEG_VENDOR_STATUS_10GB\t0x6 /* 10Gb/s */\n \n-#define IXGBE_MII_10GBASE_T_AUTONEG_CTRL_REG\t0x20\t/* 10G Control Reg */\n #define IXGBE_MII_AUTONEG_VENDOR_PROVISION_1_REG 0xC400\t/* 1G Provisioning 1 */\n #define IXGBE_MII_AUTONEG_XNP_TX_REG\t\t0x17\t/* 1G XNP Transmit */\n-#define IXGBE_MII_AUTONEG_ADVERTISE_REG\t\t0x10\t/* 100M Advertisement */\n-#define IXGBE_MII_10GBASE_T_ADVERTISE\t\t0x1000\t/* full duplex, bit:12*/\n #define IXGBE_MII_1GBASE_T_ADVERTISE_XNP_TX\t0x4000\t/* full duplex, bit:14*/\n #define IXGBE_MII_1GBASE_T_ADVERTISE\t\t0x8000\t/* full duplex, bit:15*/\n #define IXGBE_MII_2_5GBASE_T_ADVERTISE\t\t0x0400\n #define IXGBE_MII_5GBASE_T_ADVERTISE\t\t0x0800\n-#define IXGBE_MII_100BASE_T_ADVERTISE\t\t0x0100\t/* full duplex, bit:8 */\n-#define IXGBE_MII_100BASE_T_ADVERTISE_HALF\t0x0080\t/* half duplex, bit:7 */\n #define IXGBE_MII_RESTART\t\t\t0x200\n-#define IXGBE_MII_AUTONEG_COMPLETE\t\t0x20\n #define IXGBE_MII_AUTONEG_LINK_UP\t\t0x04\n #define IXGBE_MII_AUTONEG_REG\t\t\t0x0\n \n@@ -1320,30 +1314,20 @@ struct ixgbe_thermal_sensor_data {\n /* MDIO definitions */\n \n #define IXGBE_MDIO_ZERO_DEV_TYPE\t\t0x0\n-#define IXGBE_MDIO_PMA_PMD_DEV_TYPE\t\t0x1\n #define IXGBE_MDIO_PCS_DEV_TYPE\t\t0x3\n-#define IXGBE_MDIO_PHY_XS_DEV_TYPE\t\t0x4\n-#define IXGBE_MDIO_AUTO_NEG_DEV_TYPE\t\t0x7\n-#define IXGBE_MDIO_VENDOR_SPECIFIC_1_DEV_TYPE\t0x1E /* Device 30 */\n #define IXGBE_TWINAX_DEV\t\t\t1\n \n #define IXGBE_MDIO_COMMAND_TIMEOUT 100 /* PHY Timeout for 1 GB mode */\n \n-#define IXGBE_MDIO_VENDOR_SPECIFIC_1_CONTROL 0x0 /* VS1 Control Reg */\n-#define IXGBE_MDIO_VENDOR_SPECIFIC_1_STATUS 0x1 /* VS1 Status Reg */\n #define IXGBE_MDIO_VENDOR_SPECIFIC_1_LINK_STATUS 0x0008 /* 1 = Link Up */\n #define IXGBE_MDIO_VENDOR_SPECIFIC_1_SPEED_STATUS 0x0010 /* 0 - 10G, 1 - 1G */\n #define IXGBE_MDIO_VENDOR_SPECIFIC_1_10G_SPEED 0x0018\n #define IXGBE_MDIO_VENDOR_SPECIFIC_1_1G_SPEED 0x0010\n \n-#define IXGBE_MDIO_AUTO_NEG_CONTROL\t0x0 /* AUTO_NEG Control Reg */\n-#define IXGBE_MDIO_AUTO_NEG_STATUS\t0x1 /* AUTO_NEG Status Reg */\n #define IXGBE_MDIO_AUTO_NEG_VENDOR_STAT\t0xC800 /* AUTO_NEG Vendor Status Reg */\n #define IXGBE_MDIO_AUTO_NEG_VENDOR_TX_ALARM 0xCC00 /* AUTO_NEG Vendor TX Reg */\n #define IXGBE_MDIO_AUTO_NEG_VENDOR_TX_ALARM2 0xCC01 /* AUTO_NEG Vendor Tx Reg */\n #define IXGBE_MDIO_AUTO_NEG_VEN_LSC\t0x1 /* AUTO_NEG Vendor Tx LSC */\n-#define IXGBE_MDIO_AUTO_NEG_ADVT\t0x10 /* AUTO_NEG Advt Reg */\n-#define IXGBE_MDIO_AUTO_NEG_LP\t\t0x13 /* AUTO_NEG LP Status Reg */\n #define IXGBE_MDIO_AUTO_NEG_EEE_ADVT\t0x3C /* AUTO_NEG EEE Advt Reg */\n \n #define IXGBE_MDIO_PHY_SET_LOW_POWER_MODE\t 0x0800 /* Set low power mode */\ndiff --git a/drivers/net/ethernet/intel/ixgbe/ixgbe_x550.c b/drivers/net/ethernet/intel/ixgbe/ixgbe_x550.c\nindex 3e3458e..aa32e61 100644\n--- a/drivers/net/ethernet/intel/ixgbe/ixgbe_x550.c\n+++ b/drivers/net/ethernet/intel/ixgbe/ixgbe_x550.c\n@@ -1571,8 +1571,7 @@ static s32 ixgbe_check_link_t_X550em(struct ixgbe_hw *hw,\n \t /* MAC link is up, so check external PHY link.\n \t * Read this twice back to back to indicate current status.\n \t */\n-\tstatus = hw->phy.ops.read_reg(hw, IXGBE_MDIO_AUTO_NEG_STATUS,\n-\t\t\t\t IXGBE_MDIO_AUTO_NEG_DEV_TYPE,\n+\tstatus = hw->phy.ops.read_reg(hw, MDIO_STAT1, MDIO_MMD_AN,\n \t\t\t\t &autoneg_status);\n \tif (status)\n \t\treturn status;\n@@ -1758,7 +1757,7 @@ static s32 ixgbe_get_lasi_ext_t_x550em(struct ixgbe_hw *hw, bool *lsc)\n \n \t/* Vendor alarm triggered */\n \tstatus = hw->phy.ops.read_reg(hw, IXGBE_MDIO_GLOBAL_CHIP_STD_INT_FLAG,\n-\t\t\t\t IXGBE_MDIO_VENDOR_SPECIFIC_1_DEV_TYPE,\n+\t\t\t\t MDIO_MMD_VEND1,\n \t\t\t\t ®);\n \n \tif (status || !(reg & IXGBE_MDIO_GLOBAL_VEN_ALM_INT_EN))\n@@ -1766,7 +1765,7 @@ static s32 ixgbe_get_lasi_ext_t_x550em(struct ixgbe_hw *hw, bool *lsc)\n \n \t/* Vendor Auto-Neg alarm triggered or Global alarm 1 triggered */\n \tstatus = hw->phy.ops.read_reg(hw, IXGBE_MDIO_GLOBAL_INT_CHIP_VEN_FLAG,\n-\t\t\t\t IXGBE_MDIO_VENDOR_SPECIFIC_1_DEV_TYPE,\n+\t\t\t\t MDIO_MMD_VEND1,\n \t\t\t\t ®);\n \n \tif (status || !(reg & (IXGBE_MDIO_GLOBAL_AN_VEN_ALM_INT_EN |\n@@ -1775,7 +1774,7 @@ static s32 ixgbe_get_lasi_ext_t_x550em(struct ixgbe_hw *hw, bool *lsc)\n \n \t/* Global alarm triggered */\n \tstatus = hw->phy.ops.read_reg(hw, IXGBE_MDIO_GLOBAL_ALARM_1,\n-\t\t\t\t IXGBE_MDIO_VENDOR_SPECIFIC_1_DEV_TYPE,\n+\t\t\t\t MDIO_MMD_VEND1,\n \t\t\t\t ®);\n \n \tif (status)\n@@ -1790,7 +1789,7 @@ static s32 ixgbe_get_lasi_ext_t_x550em(struct ixgbe_hw *hw, bool *lsc)\n \tif (reg & IXGBE_MDIO_GLOBAL_ALM_1_DEV_FAULT) {\n \t\t/* device fault alarm triggered */\n \t\tstatus = hw->phy.ops.read_reg(hw, IXGBE_MDIO_GLOBAL_FAULT_MSG,\n-\t\t\t\t\t IXGBE_MDIO_VENDOR_SPECIFIC_1_DEV_TYPE,\n+\t\t\t\t\t MDIO_MMD_VEND1,\n \t\t\t\t\t ®);\n \t\tif (status)\n \t\t\treturn status;\n@@ -1805,14 +1804,14 @@ static s32 ixgbe_get_lasi_ext_t_x550em(struct ixgbe_hw *hw, bool *lsc)\n \n \t/* Vendor alarm 2 triggered */\n \tstatus = hw->phy.ops.read_reg(hw, IXGBE_MDIO_GLOBAL_CHIP_STD_INT_FLAG,\n-\t\t\t\t IXGBE_MDIO_AUTO_NEG_DEV_TYPE, ®);\n+\t\t\t\t MDIO_MMD_AN, ®);\n \n \tif (status || !(reg & IXGBE_MDIO_GLOBAL_STD_ALM2_INT))\n \t\treturn status;\n \n \t/* link connect/disconnect event occurred */\n \tstatus = hw->phy.ops.read_reg(hw, IXGBE_MDIO_AUTO_NEG_VENDOR_TX_ALARM2,\n-\t\t\t\t IXGBE_MDIO_AUTO_NEG_DEV_TYPE, ®);\n+\t\t\t\t MDIO_MMD_AN, ®);\n \n \tif (status)\n \t\treturn status;\n@@ -1844,20 +1843,20 @@ static s32 ixgbe_enable_lasi_ext_t_x550em(struct ixgbe_hw *hw)\n \n \t/* Enable link status change alarm */\n \tstatus = hw->phy.ops.read_reg(hw, IXGBE_MDIO_PMA_TX_VEN_LASI_INT_MASK,\n-\t\t\t\t IXGBE_MDIO_AUTO_NEG_DEV_TYPE, ®);\n+\t\t\t\t MDIO_MMD_AN, ®);\n \tif (status)\n \t\treturn status;\n \n \treg |= IXGBE_MDIO_PMA_TX_VEN_LASI_INT_EN;\n \n \tstatus = hw->phy.ops.write_reg(hw, IXGBE_MDIO_PMA_TX_VEN_LASI_INT_MASK,\n-\t\t\t\t IXGBE_MDIO_AUTO_NEG_DEV_TYPE, reg);\n+\t\t\t\t MDIO_MMD_AN, reg);\n \tif (status)\n \t\treturn status;\n \n \t/* Enable high temperature failure and global fault alarms */\n \tstatus = hw->phy.ops.read_reg(hw, IXGBE_MDIO_GLOBAL_INT_MASK,\n-\t\t\t\t IXGBE_MDIO_VENDOR_SPECIFIC_1_DEV_TYPE,\n+\t\t\t\t MDIO_MMD_VEND1,\n \t\t\t\t ®);\n \tif (status)\n \t\treturn status;\n@@ -1866,14 +1865,14 @@ static s32 ixgbe_enable_lasi_ext_t_x550em(struct ixgbe_hw *hw)\n \t\tIXGBE_MDIO_GLOBAL_INT_DEV_FAULT_EN);\n \n \tstatus = hw->phy.ops.write_reg(hw, IXGBE_MDIO_GLOBAL_INT_MASK,\n-\t\t\t\t IXGBE_MDIO_VENDOR_SPECIFIC_1_DEV_TYPE,\n+\t\t\t\t MDIO_MMD_VEND1,\n \t\t\t\t reg);\n \tif (status)\n \t\treturn status;\n \n \t/* Enable vendor Auto-Neg alarm and Global Interrupt Mask 1 alarm */\n \tstatus = hw->phy.ops.read_reg(hw, IXGBE_MDIO_GLOBAL_INT_CHIP_VEN_MASK,\n-\t\t\t\t IXGBE_MDIO_VENDOR_SPECIFIC_1_DEV_TYPE,\n+\t\t\t\t MDIO_MMD_VEND1,\n \t\t\t\t ®);\n \tif (status)\n \t\treturn status;\n@@ -1882,14 +1881,14 @@ static s32 ixgbe_enable_lasi_ext_t_x550em(struct ixgbe_hw *hw)\n \t\tIXGBE_MDIO_GLOBAL_ALARM_1_INT);\n \n \tstatus = hw->phy.ops.write_reg(hw, IXGBE_MDIO_GLOBAL_INT_CHIP_VEN_MASK,\n-\t\t\t\t IXGBE_MDIO_VENDOR_SPECIFIC_1_DEV_TYPE,\n+\t\t\t\t MDIO_MMD_VEND1,\n \t\t\t\t reg);\n \tif (status)\n \t\treturn status;\n \n \t/* Enable chip-wide vendor alarm */\n \tstatus = hw->phy.ops.read_reg(hw, IXGBE_MDIO_GLOBAL_INT_CHIP_STD_MASK,\n-\t\t\t\t IXGBE_MDIO_VENDOR_SPECIFIC_1_DEV_TYPE,\n+\t\t\t\t MDIO_MMD_VEND1,\n \t\t\t\t ®);\n \tif (status)\n \t\treturn status;\n@@ -1897,7 +1896,7 @@ static s32 ixgbe_enable_lasi_ext_t_x550em(struct ixgbe_hw *hw)\n \treg |= IXGBE_MDIO_GLOBAL_VEN_ALM_INT_EN;\n \n \tstatus = hw->phy.ops.write_reg(hw, IXGBE_MDIO_GLOBAL_INT_CHIP_STD_MASK,\n-\t\t\t\t IXGBE_MDIO_VENDOR_SPECIFIC_1_DEV_TYPE,\n+\t\t\t\t MDIO_MMD_VEND1,\n \t\t\t\t reg);\n \n \treturn status;\n@@ -2038,14 +2037,12 @@ static s32 ixgbe_ext_phy_t_x550em_get_link(struct ixgbe_hw *hw, bool *link_up)\n \t*link_up = false;\n \n \t/* read this twice back to back to indicate current status */\n-\tret = hw->phy.ops.read_reg(hw, IXGBE_MDIO_AUTO_NEG_STATUS,\n-\t\t\t\t IXGBE_MDIO_AUTO_NEG_DEV_TYPE,\n+\tret = hw->phy.ops.read_reg(hw, MDIO_STAT1, MDIO_MMD_AN,\n \t\t\t\t &autoneg_status);\n \tif (ret)\n \t\treturn ret;\n \n-\tret = hw->phy.ops.read_reg(hw, IXGBE_MDIO_AUTO_NEG_STATUS,\n-\t\t\t\t IXGBE_MDIO_AUTO_NEG_DEV_TYPE,\n+\tret = hw->phy.ops.read_reg(hw, MDIO_STAT1, MDIO_MMD_AN,\n \t\t\t\t &autoneg_status);\n \tif (ret)\n \t\treturn ret;\n@@ -2091,7 +2088,7 @@ static s32 ixgbe_setup_internal_phy_t_x550em(struct ixgbe_hw *hw)\n \t\treturn 0;\n \n \tstatus = hw->phy.ops.read_reg(hw, IXGBE_MDIO_AUTO_NEG_VENDOR_STAT,\n-\t\t\t\t IXGBE_MDIO_AUTO_NEG_DEV_TYPE,\n+\t\t\t\t MDIO_MMD_AN,\n \t\t\t\t &speed);\n \tif (status)\n \t\treturn status;\n@@ -2152,10 +2149,10 @@ static s32 ixgbe_led_on_t_x550em(struct ixgbe_hw *hw, u32 led_idx)\n \n \t/* To turn on the LED, set mode to ON. */\n \thw->phy.ops.read_reg(hw, IXGBE_X557_LED_PROVISIONING + led_idx,\n-\t\t\t IXGBE_MDIO_VENDOR_SPECIFIC_1_DEV_TYPE, &phy_data);\n+\t\t\t MDIO_MMD_VEND1, &phy_data);\n \tphy_data |= IXGBE_X557_LED_MANUAL_SET_MASK;\n \thw->phy.ops.write_reg(hw, IXGBE_X557_LED_PROVISIONING + led_idx,\n-\t\t\t IXGBE_MDIO_VENDOR_SPECIFIC_1_DEV_TYPE, phy_data);\n+\t\t\t MDIO_MMD_VEND1, phy_data);\n \n \treturn 0;\n }\n@@ -2174,10 +2171,10 @@ static s32 ixgbe_led_off_t_x550em(struct ixgbe_hw *hw, u32 led_idx)\n \n \t/* To turn on the LED, set mode to ON. */\n \thw->phy.ops.read_reg(hw, IXGBE_X557_LED_PROVISIONING + led_idx,\n-\t\t\t IXGBE_MDIO_VENDOR_SPECIFIC_1_DEV_TYPE, &phy_data);\n+\t\t\t MDIO_MMD_VEND1, &phy_data);\n \tphy_data &= ~IXGBE_X557_LED_MANUAL_SET_MASK;\n \thw->phy.ops.write_reg(hw, IXGBE_X557_LED_PROVISIONING + led_idx,\n-\t\t\t IXGBE_MDIO_VENDOR_SPECIFIC_1_DEV_TYPE, phy_data);\n+\t\t\t MDIO_MMD_VEND1, phy_data);\n \n \treturn 0;\n }\n@@ -2198,7 +2195,7 @@ static s32 ixgbe_get_lcd_t_x550em(struct ixgbe_hw *hw,\n \t*lcd_speed = IXGBE_LINK_SPEED_UNKNOWN;\n \n \tstatus = hw->phy.ops.read_reg(hw, IXGBE_AUTO_NEG_LP_STATUS,\n-\t\t\t\t IXGBE_MDIO_AUTO_NEG_DEV_TYPE,\n+\t\t\t\t MDIO_MMD_AN,\n \t\t\t\t &an_lp_status);\n \tif (status)\n \t\treturn status;\n@@ -2345,7 +2342,7 @@ static s32 ixgbe_enter_lplu_t_x550em(struct ixgbe_hw *hw)\n \t\treturn ixgbe_set_copper_phy_power(hw, false);\n \n \tstatus = hw->phy.ops.read_reg(hw, IXGBE_MDIO_AUTO_NEG_VENDOR_STAT,\n-\t\t\t\t IXGBE_MDIO_AUTO_NEG_DEV_TYPE,\n+\t\t\t\t MDIO_MMD_AN,\n \t\t\t\t &speed);\n \tif (status)\n \t\treturn status;\n@@ -2367,20 +2364,20 @@ static s32 ixgbe_enter_lplu_t_x550em(struct ixgbe_hw *hw)\n \n \t/* Clear AN completed indication */\n \tstatus = hw->phy.ops.read_reg(hw, IXGBE_MDIO_AUTO_NEG_VENDOR_TX_ALARM,\n-\t\t\t\t IXGBE_MDIO_AUTO_NEG_DEV_TYPE,\n+\t\t\t\t MDIO_MMD_AN,\n \t\t\t\t &autoneg_reg);\n \tif (status)\n \t\treturn status;\n \n-\tstatus = hw->phy.ops.read_reg(hw, IXGBE_MII_10GBASE_T_AUTONEG_CTRL_REG,\n-\t\t\t\t IXGBE_MDIO_AUTO_NEG_DEV_TYPE,\n+\tstatus = hw->phy.ops.read_reg(hw, MDIO_AN_10GBT_CTRL,\n+\t\t\t\t MDIO_MMD_AN,\n \t\t\t\t &an_10g_cntl_reg);\n \tif (status)\n \t\treturn status;\n \n \tstatus = hw->phy.ops.read_reg(hw,\n \t\t\t\t IXGBE_MII_AUTONEG_VENDOR_PROVISION_1_REG,\n-\t\t\t\t IXGBE_MDIO_AUTO_NEG_DEV_TYPE,\n+\t\t\t\t MDIO_MMD_AN,\n \t\t\t\t &autoneg_reg);\n \tif (status)\n \t\treturn status;\n@@ -2538,7 +2535,7 @@ static s32 ixgbe_init_ext_t_x550em(struct ixgbe_hw *hw)\n \n \tstatus = hw->phy.ops.read_reg(hw,\n \t\t\t\t IXGBE_MDIO_TX_VENDOR_ALARMS_3,\n-\t\t\t\t IXGBE_MDIO_PMA_PMD_DEV_TYPE,\n+\t\t\t\t MDIO_MMD_PMAPMD,\n \t\t\t\t ®);\n \tif (status)\n \t\treturn status;\n@@ -2549,7 +2546,7 @@ static s32 ixgbe_init_ext_t_x550em(struct ixgbe_hw *hw)\n \tif (reg & IXGBE_MDIO_TX_VENDOR_ALARMS_3_RST_MASK) {\n \t\tstatus = hw->phy.ops.read_reg(hw,\n \t\t\t\t\tIXGBE_MDIO_GLOBAL_RES_PR_10,\n-\t\t\t\t\tIXGBE_MDIO_VENDOR_SPECIFIC_1_DEV_TYPE,\n+\t\t\t\t\tMDIO_MMD_VEND1,\n \t\t\t\t\t®);\n \t\tif (status)\n \t\t\treturn status;\n@@ -2558,7 +2555,7 @@ static s32 ixgbe_init_ext_t_x550em(struct ixgbe_hw *hw)\n \n \t\tstatus = hw->phy.ops.write_reg(hw,\n \t\t\t\t\tIXGBE_MDIO_GLOBAL_RES_PR_10,\n-\t\t\t\t\tIXGBE_MDIO_VENDOR_SPECIFIC_1_DEV_TYPE,\n+\t\t\t\t\tMDIO_MMD_VEND1,\n \t\t\t\t\treg);\n \t\tif (status)\n \t\t\treturn status;\n", "prefixes": [ "1/2" ] }