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GET /api/patches/675283/?format=api
{ "id": 675283, "url": "http://patchwork.ozlabs.org/api/patches/675283/?format=api", "web_url": "http://patchwork.ozlabs.org/project/uboot/patch/20160926182917.27531-8-paul.burton@imgtec.com/", "project": { "id": 18, "url": "http://patchwork.ozlabs.org/api/projects/18/?format=api", "name": "U-Boot", "link_name": "uboot", "list_id": "u-boot.lists.denx.de", "list_email": "u-boot@lists.denx.de", "web_url": null, "scm_url": null, "webscm_url": null, "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<20160926182917.27531-8-paul.burton@imgtec.com>", "list_archive_url": null, "date": "2016-09-26T18:29:01", "name": "[U-Boot,07/23] pci: Handle MIPS systems with virtual CONFIG_SYS_SDRAM_BASE", "commit_ref": null, "pull_url": null, "state": "deferred", "archived": false, "hash": "0389497f3970f24ec06299ea58d434ffbb5637cb", "submitter": { "id": 33698, "url": "http://patchwork.ozlabs.org/api/people/33698/?format=api", "name": "Paul Burton", "email": "paul.burton@imgtec.com" }, "delegate": { "id": 4307, "url": "http://patchwork.ozlabs.org/api/users/4307/?format=api", "username": "danielschwierzeck", "first_name": "Daniel", "last_name": "Schwierzeck", "email": "daniel.schwierzeck@googlemail.com" }, "mbox": "http://patchwork.ozlabs.org/project/uboot/patch/20160926182917.27531-8-paul.burton@imgtec.com/mbox/", "series": [], "comments": "http://patchwork.ozlabs.org/api/patches/675283/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/675283/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<u-boot-bounces@lists.denx.de>", "X-Original-To": "incoming@patchwork.ozlabs.org", "Delivered-To": "patchwork-incoming@bilbo.ozlabs.org", "Received": [ "from theia.denx.de (theia.denx.de [85.214.87.163])\n\tby ozlabs.org (Postfix) with ESMTP id 3sjXcB6dzQz9s3T\n\tfor <incoming@patchwork.ozlabs.org>;\n\tTue, 27 Sep 2016 04:31:38 +1000 (AEST)", "from localhost (localhost [127.0.0.1])\n\tby theia.denx.de (Postfix) with ESMTP id CD87BA7652;\n\tMon, 26 Sep 2016 20:31:21 +0200 (CEST)", "from theia.denx.de ([127.0.0.1])\n\tby localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024)\n\twith ESMTP id st5u6BJaDZ-5; Mon, 26 Sep 2016 20:31:21 +0200 (CEST)", "from theia.denx.de (localhost [127.0.0.1])\n\tby theia.denx.de (Postfix) with ESMTP id 43C85A75E4;\n\tMon, 26 Sep 2016 20:31:21 +0200 (CEST)", "from localhost (localhost [127.0.0.1])\n\tby theia.denx.de (Postfix) with ESMTP id 31EA1A761F\n\tfor <u-boot@lists.denx.de>; Mon, 26 Sep 2016 20:31:19 +0200 (CEST)", "from theia.denx.de ([127.0.0.1])\n\tby localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024)\n\twith ESMTP id MlpF77B1iu3x for <u-boot@lists.denx.de>;\n\tMon, 26 Sep 2016 20:31:19 +0200 (CEST)", "from mailapp01.imgtec.com (mailapp02.imgtec.com [217.156.133.132])\n\tby theia.denx.de (Postfix) with ESMTP id 06E5CA75E4\n\tfor <u-boot@lists.denx.de>; Mon, 26 Sep 2016 20:31:17 +0200 (CEST)", "from HHMAIL01.hh.imgtec.org (unknown [10.100.10.19])\n\tby Forcepoint Email with ESMTPS id 3FE9E5FCB1135;\n\tMon, 26 Sep 2016 19:31:13 +0100 (IST)", "from localhost (10.100.200.111) by HHMAIL01.hh.imgtec.org\n\t(10.100.10.21) with Microsoft SMTP Server (TLS) id 14.3.294.0;\n\tMon, 26 Sep 2016 19:31:16 +0100" ], "X-policyd-weight": "NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5\n\tNOT_IN_BL_NJABL=-1.5 (only DNSBL check requested)", "From": "Paul Burton <paul.burton@imgtec.com>", "To": "<u-boot@lists.denx.de>, Daniel Schwierzeck <daniel.schwierzeck@gmail.com>", "Date": "Mon, 26 Sep 2016 19:29:01 +0100", "Message-ID": "<20160926182917.27531-8-paul.burton@imgtec.com>", "X-Mailer": "git-send-email 2.10.0", "In-Reply-To": "<20160926182917.27531-1-paul.burton@imgtec.com>", "References": "<20160926182917.27531-1-paul.burton@imgtec.com>", "MIME-Version": "1.0", "X-Originating-IP": "[10.100.200.111]", "Subject": "[U-Boot] [PATCH 07/23] pci: Handle MIPS systems with virtual\n\tCONFIG_SYS_SDRAM_BASE", "X-BeenThere": "u-boot@lists.denx.de", "X-Mailman-Version": "2.1.15", "Precedence": "list", "List-Id": "U-Boot discussion <u-boot.lists.denx.de>", "List-Unsubscribe": "<http://lists.denx.de/mailman/options/u-boot>,\n\t<mailto:u-boot-request@lists.denx.de?subject=unsubscribe>", "List-Archive": "<http://lists.denx.de/pipermail/u-boot/>", "List-Post": "<mailto:u-boot@lists.denx.de>", "List-Help": "<mailto:u-boot-request@lists.denx.de?subject=help>", "List-Subscribe": "<http://lists.denx.de/mailman/listinfo/u-boot>,\n\t<mailto:u-boot-request@lists.denx.de?subject=subscribe>", "Content-Type": "text/plain; charset=\"us-ascii\"", "Content-Transfer-Encoding": "7bit", "Errors-To": "u-boot-bounces@lists.denx.de", "Sender": "\"U-Boot\" <u-boot-bounces@lists.denx.de>" }, "content": "The decode_regions() function in the PCI code presumes that\nCONFIG_SYS_SDRAM_BASE is a physical address, which seems reasonable\ngiven that README states that it should be.\n\nHowever there is also common code which expects CONFIG_SYS_SDRAM_BASE to\nbe an address accessible by the CPU, ie. a valid virtual address -\nnotably gd->ram_top is set to it & various pieces of data are located\nrelative to that, and getenv_bootm_low() defaults to\nCONFIG_SYS_SDRAM_BASE as the lower bound on addresses to load into. Thus\non MIPS CONFIG_SYS_SDRAM_BASE is a virtual address.\n\nThis patch takes the simple approach to fixing this & converts\nCONFIG_SYS_SDRAM_BASE to a physical address for use by the PCI code when\nbuilt for MIPS.\n\nSigned-off-by: Paul Burton <paul.burton@imgtec.com>\n\n---\n\n drivers/pci/pci-uclass.c | 4 +++-\n 1 file changed, 3 insertions(+), 1 deletion(-)", "diff": "diff --git a/drivers/pci/pci-uclass.c b/drivers/pci/pci-uclass.c\nindex 415c632..26fe0f4 100644\n--- a/drivers/pci/pci-uclass.c\n+++ b/drivers/pci/pci-uclass.c\n@@ -848,7 +848,9 @@ static int decode_regions(struct pci_controller *hose, const void *blob,\n \n \t/* Add a region for our local memory */\n \tsize = gd->ram_size;\n-#ifdef CONFIG_SYS_SDRAM_BASE\n+#if defined(CONFIG_MIPS)\n+\tbase = virt_to_phys((void *)CONFIG_SYS_SDRAM_BASE);\n+#elif defined(CONFIG_SYS_SDRAM_BASE)\n \tbase = CONFIG_SYS_SDRAM_BASE;\n #endif\n \tif (gd->pci_ram_top && gd->pci_ram_top < base + size)\n", "prefixes": [ "U-Boot", "07/23" ] }