Patch Detail
get:
Show a patch.
patch:
Update a patch.
put:
Update a patch.
GET /api/patches/669016/?format=api
{ "id": 669016, "url": "http://patchwork.ozlabs.org/api/patches/669016/?format=api", "web_url": "http://patchwork.ozlabs.org/project/intel-wired-lan/patch/1473715124-31296-6-git-send-email-bimmy.pujari@intel.com/", "project": { "id": 46, "url": "http://patchwork.ozlabs.org/api/projects/46/?format=api", "name": "Intel Wired Ethernet development", "link_name": "intel-wired-lan", "list_id": "intel-wired-lan.osuosl.org", "list_email": "intel-wired-lan@osuosl.org", "web_url": "", "scm_url": "", "webscm_url": "", "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<1473715124-31296-6-git-send-email-bimmy.pujari@intel.com>", "list_archive_url": null, "date": "2016-09-12T21:18:41", "name": "[next,S46,5/8] i40e: Split Flow Director descriptor config into separate function", "commit_ref": null, "pull_url": null, "state": "accepted", "archived": false, "hash": "208ebd73dc7ff227c4b8e4b40047c196ae81604b", "submitter": { "id": 68919, "url": "http://patchwork.ozlabs.org/api/people/68919/?format=api", "name": "Pujari, Bimmy", "email": "bimmy.pujari@intel.com" }, "delegate": { "id": 68, "url": "http://patchwork.ozlabs.org/api/users/68/?format=api", "username": "jtkirshe", "first_name": "Jeff", "last_name": "Kirsher", "email": "jeffrey.t.kirsher@intel.com" }, "mbox": "http://patchwork.ozlabs.org/project/intel-wired-lan/patch/1473715124-31296-6-git-send-email-bimmy.pujari@intel.com/mbox/", "series": [], "comments": "http://patchwork.ozlabs.org/api/patches/669016/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/669016/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<intel-wired-lan-bounces@lists.osuosl.org>", "X-Original-To": [ "incoming@patchwork.ozlabs.org", "intel-wired-lan@lists.osuosl.org" ], "Delivered-To": [ "patchwork-incoming@bilbo.ozlabs.org", "intel-wired-lan@lists.osuosl.org" ], "Received": [ "from fraxinus.osuosl.org (smtp4.osuosl.org [140.211.166.137])\n\t(using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits))\n\t(No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 3sY10f2ylhz9sdm\n\tfor <incoming@patchwork.ozlabs.org>;\n\tTue, 13 Sep 2016 07:19:46 +1000 (AEST)", "from localhost (localhost [127.0.0.1])\n\tby fraxinus.osuosl.org (Postfix) with ESMTP id 0388789057;\n\tMon, 12 Sep 2016 21:19:45 +0000 (UTC)", "from fraxinus.osuosl.org ([127.0.0.1])\n\tby localhost (.osuosl.org [127.0.0.1]) (amavisd-new, port 10024)\n\twith ESMTP id 7fTr6VSwJfxK; Mon, 12 Sep 2016 21:19:31 +0000 (UTC)", "from ash.osuosl.org (ash.osuosl.org [140.211.166.34])\n\tby fraxinus.osuosl.org (Postfix) with ESMTP id E769888D54;\n\tMon, 12 Sep 2016 21:19:25 +0000 (UTC)", "from silver.osuosl.org (smtp3.osuosl.org [140.211.166.136])\n\tby ash.osuosl.org (Postfix) with ESMTP id 00A3F1C2D64\n\tfor <intel-wired-lan@lists.osuosl.org>;\n\tMon, 12 Sep 2016 21:19:21 +0000 (UTC)", "from localhost (localhost [127.0.0.1])\n\tby silver.osuosl.org (Postfix) with ESMTP id EB40C30975\n\tfor <intel-wired-lan@lists.osuosl.org>;\n\tMon, 12 Sep 2016 21:19:20 +0000 (UTC)", "from silver.osuosl.org ([127.0.0.1])\n\tby localhost (.osuosl.org [127.0.0.1]) (amavisd-new, port 10024)\n\twith ESMTP id OzVilAcxDKpF for <intel-wired-lan@lists.osuosl.org>;\n\tMon, 12 Sep 2016 21:19:17 +0000 (UTC)", "from mga07.intel.com (mga07.intel.com [134.134.136.100])\n\tby silver.osuosl.org (Postfix) with ESMTPS id 8794931510\n\tfor <intel-wired-lan@lists.osuosl.org>;\n\tMon, 12 Sep 2016 21:19:17 +0000 (UTC)", "from orsmga003.jf.intel.com ([10.7.209.27])\n\tby orsmga105.jf.intel.com with ESMTP; 12 Sep 2016 14:19:16 -0700", "from bimmy.jf.intel.com (HELO bimmy.linux1.jf.intel.com)\n\t([134.134.2.177])\n\tby orsmga003.jf.intel.com with ESMTP; 12 Sep 2016 14:19:17 -0700" ], "X-Virus-Scanned": [ "amavisd-new at osuosl.org", "amavisd-new at osuosl.org" ], "X-Greylist": "domain auto-whitelisted by SQLgrey-1.7.6", "X-ExtLoop1": "1", "X-IronPort-AV": "E=Sophos;i=\"5.30,324,1470726000\"; d=\"scan'208\";a=\"877982158\"", "From": "Bimmy Pujari <bimmy.pujari@intel.com>", "To": "intel-wired-lan@lists.osuosl.org", "Date": "Mon, 12 Sep 2016 14:18:41 -0700", "Message-Id": "<1473715124-31296-6-git-send-email-bimmy.pujari@intel.com>", "X-Mailer": "git-send-email 2.4.11", "In-Reply-To": "<1473715124-31296-1-git-send-email-bimmy.pujari@intel.com>", "References": "<1473715124-31296-1-git-send-email-bimmy.pujari@intel.com>", "Subject": "[Intel-wired-lan] [next PATCH S46 5/8] i40e: Split Flow Director\n\tdescriptor config into separate function", "X-BeenThere": "intel-wired-lan@lists.osuosl.org", "X-Mailman-Version": "2.1.18-1", "Precedence": "list", "List-Id": "Intel Wired Ethernet Linux Kernel Driver Development\n\t<intel-wired-lan.lists.osuosl.org>", "List-Unsubscribe": "<http://lists.osuosl.org/mailman/options/intel-wired-lan>, \n\t<mailto:intel-wired-lan-request@lists.osuosl.org?subject=unsubscribe>", "List-Archive": "<http://lists.osuosl.org/pipermail/intel-wired-lan/>", "List-Post": "<mailto:intel-wired-lan@lists.osuosl.org>", "List-Help": "<mailto:intel-wired-lan-request@lists.osuosl.org?subject=help>", "List-Subscribe": "<http://lists.osuosl.org/mailman/listinfo/intel-wired-lan>, \n\t<mailto:intel-wired-lan-request@lists.osuosl.org?subject=subscribe>", "MIME-Version": "1.0", "Content-Type": "text/plain; charset=\"us-ascii\"", "Content-Transfer-Encoding": "7bit", "Errors-To": "intel-wired-lan-bounces@lists.osuosl.org", "Sender": "\"Intel-wired-lan\" <intel-wired-lan-bounces@lists.osuosl.org>" }, "content": "From: Alexander Duyck <alexander.h.duyck@intel.com>\n\nIn an effort to improve code readability I am splitting the Flow Director\nfilter configuration out into a separate function like we have done for the\nstandard xmit path. The general idea is to provide a single block of code\nthat translates the flow specification into a proper Flow Director\ndescriptor.\n\nSigned-off-by: Alexander Duyck <alexander.h.duyck@intel.com>\nChange-ID: Id355ad8030c4e6c72c57504fa09de60c976a8ffe\n---\nTesting Hints:\n This will impact the Flow Director setup for Rx NFC based flows. A\n good test for this will be to add multiple flows via ethtool -N\n interface and verify that all flow-type rules are being added\n correctly.\n\n drivers/net/ethernet/intel/i40e/i40e_txrx.c | 115 ++++++++++++++++------------\n 1 file changed, 64 insertions(+), 51 deletions(-)", "diff": "diff --git a/drivers/net/ethernet/intel/i40e/i40e_txrx.c b/drivers/net/ethernet/intel/i40e/i40e_txrx.c\nindex 6e0a7ac..9b11fc6 100644\n--- a/drivers/net/ethernet/intel/i40e/i40e_txrx.c\n+++ b/drivers/net/ethernet/intel/i40e/i40e_txrx.c\n@@ -40,6 +40,69 @@ static inline __le64 build_ctob(u32 td_cmd, u32 td_offset, unsigned int size,\n }\n \n #define I40E_TXD_CMD (I40E_TX_DESC_CMD_EOP | I40E_TX_DESC_CMD_RS)\n+/**\n+ * i40e_fdir - Generate a Flow Director descriptor based on fdata\n+ * @tx_ring: Tx ring to send buffer on\n+ * @fdata: Flow director filter data\n+ * @add: Indicate if we are adding a rule or deleteing one\n+ *\n+ **/\n+static void i40e_fdir(struct i40e_ring *tx_ring,\n+\t\t struct i40e_fdir_filter *fdata, bool add)\n+{\n+\tstruct i40e_filter_program_desc *fdir_desc;\n+\tstruct i40e_pf *pf = tx_ring->vsi->back;\n+\tu32 flex_ptype, dtype_cmd;\n+\tu16 i;\n+\n+\t/* grab the next descriptor */\n+\ti = tx_ring->next_to_use;\n+\tfdir_desc = I40E_TX_FDIRDESC(tx_ring, i);\n+\n+\ti++;\n+\ttx_ring->next_to_use = (i < tx_ring->count) ? i : 0;\n+\n+\tflex_ptype = I40E_TXD_FLTR_QW0_QINDEX_MASK &\n+\t\t (fdata->q_index << I40E_TXD_FLTR_QW0_QINDEX_SHIFT);\n+\n+\tflex_ptype |= I40E_TXD_FLTR_QW0_FLEXOFF_MASK &\n+\t\t (fdata->flex_off << I40E_TXD_FLTR_QW0_FLEXOFF_SHIFT);\n+\n+\tflex_ptype |= I40E_TXD_FLTR_QW0_PCTYPE_MASK &\n+\t\t (fdata->pctype << I40E_TXD_FLTR_QW0_PCTYPE_SHIFT);\n+\n+\t/* Use LAN VSI Id if not programmed by user */\n+\tflex_ptype |= I40E_TXD_FLTR_QW0_DEST_VSI_MASK &\n+\t\t ((u32)(fdata->dest_vsi ? : pf->vsi[pf->lan_vsi]->id) <<\n+\t\t I40E_TXD_FLTR_QW0_DEST_VSI_SHIFT);\n+\n+\tdtype_cmd = I40E_TX_DESC_DTYPE_FILTER_PROG;\n+\n+\tdtype_cmd |= add ?\n+\t\t I40E_FILTER_PROGRAM_DESC_PCMD_ADD_UPDATE <<\n+\t\t I40E_TXD_FLTR_QW1_PCMD_SHIFT :\n+\t\t I40E_FILTER_PROGRAM_DESC_PCMD_REMOVE <<\n+\t\t I40E_TXD_FLTR_QW1_PCMD_SHIFT;\n+\n+\tdtype_cmd |= I40E_TXD_FLTR_QW1_DEST_MASK &\n+\t\t (fdata->dest_ctl << I40E_TXD_FLTR_QW1_DEST_SHIFT);\n+\n+\tdtype_cmd |= I40E_TXD_FLTR_QW1_FD_STATUS_MASK &\n+\t\t (fdata->fd_status << I40E_TXD_FLTR_QW1_FD_STATUS_SHIFT);\n+\n+\tif (fdata->cnt_index) {\n+\t\tdtype_cmd |= I40E_TXD_FLTR_QW1_CNT_ENA_MASK;\n+\t\tdtype_cmd |= I40E_TXD_FLTR_QW1_CNTINDEX_MASK &\n+\t\t\t ((u32)fdata->cnt_index <<\n+\t\t\t I40E_TXD_FLTR_QW1_CNTINDEX_SHIFT);\n+\t}\n+\n+\tfdir_desc->qindex_flex_ptype_vsi = cpu_to_le32(flex_ptype);\n+\tfdir_desc->rsvd = cpu_to_le32(0);\n+\tfdir_desc->dtype_cmd_cntindex = cpu_to_le32(dtype_cmd);\n+\tfdir_desc->fd_id = cpu_to_le32(fdata->fd_id);\n+}\n+\n #define I40E_FD_CLEAN_DELAY 10\n /**\n * i40e_program_fdir_filter - Program a Flow Director filter\n@@ -51,11 +114,9 @@ static inline __le64 build_ctob(u32 td_cmd, u32 td_offset, unsigned int size,\n int i40e_program_fdir_filter(struct i40e_fdir_filter *fdir_data, u8 *raw_packet,\n \t\t\t struct i40e_pf *pf, bool add)\n {\n-\tstruct i40e_filter_program_desc *fdir_desc;\n \tstruct i40e_tx_buffer *tx_buf, *first;\n \tstruct i40e_tx_desc *tx_desc;\n \tstruct i40e_ring *tx_ring;\n-\tunsigned int fpt, dcc;\n \tstruct i40e_vsi *vsi;\n \tstruct device *dev;\n \tdma_addr_t dma;\n@@ -92,56 +153,8 @@ int i40e_program_fdir_filter(struct i40e_fdir_filter *fdir_data, u8 *raw_packet,\n \n \t/* grab the next descriptor */\n \ti = tx_ring->next_to_use;\n-\tfdir_desc = I40E_TX_FDIRDESC(tx_ring, i);\n \tfirst = &tx_ring->tx_bi[i];\n-\tmemset(first, 0, sizeof(struct i40e_tx_buffer));\n-\n-\ttx_ring->next_to_use = ((i + 1) < tx_ring->count) ? i + 1 : 0;\n-\n-\tfpt = (fdir_data->q_index << I40E_TXD_FLTR_QW0_QINDEX_SHIFT) &\n-\t I40E_TXD_FLTR_QW0_QINDEX_MASK;\n-\n-\tfpt |= (fdir_data->flex_off << I40E_TXD_FLTR_QW0_FLEXOFF_SHIFT) &\n-\t I40E_TXD_FLTR_QW0_FLEXOFF_MASK;\n-\n-\tfpt |= (fdir_data->pctype << I40E_TXD_FLTR_QW0_PCTYPE_SHIFT) &\n-\t I40E_TXD_FLTR_QW0_PCTYPE_MASK;\n-\n-\t/* Use LAN VSI Id if not programmed by user */\n-\tif (fdir_data->dest_vsi == 0)\n-\t\tfpt |= (pf->vsi[pf->lan_vsi]->id) <<\n-\t\t I40E_TXD_FLTR_QW0_DEST_VSI_SHIFT;\n-\telse\n-\t\tfpt |= ((u32)fdir_data->dest_vsi <<\n-\t\t\tI40E_TXD_FLTR_QW0_DEST_VSI_SHIFT) &\n-\t\t I40E_TXD_FLTR_QW0_DEST_VSI_MASK;\n-\n-\tdcc = I40E_TX_DESC_DTYPE_FILTER_PROG;\n-\n-\tif (add)\n-\t\tdcc |= I40E_FILTER_PROGRAM_DESC_PCMD_ADD_UPDATE <<\n-\t\t I40E_TXD_FLTR_QW1_PCMD_SHIFT;\n-\telse\n-\t\tdcc |= I40E_FILTER_PROGRAM_DESC_PCMD_REMOVE <<\n-\t\t I40E_TXD_FLTR_QW1_PCMD_SHIFT;\n-\n-\tdcc |= (fdir_data->dest_ctl << I40E_TXD_FLTR_QW1_DEST_SHIFT) &\n-\t I40E_TXD_FLTR_QW1_DEST_MASK;\n-\n-\tdcc |= (fdir_data->fd_status << I40E_TXD_FLTR_QW1_FD_STATUS_SHIFT) &\n-\t I40E_TXD_FLTR_QW1_FD_STATUS_MASK;\n-\n-\tif (fdir_data->cnt_index != 0) {\n-\t\tdcc |= I40E_TXD_FLTR_QW1_CNT_ENA_MASK;\n-\t\tdcc |= ((u32)fdir_data->cnt_index <<\n-\t\t\tI40E_TXD_FLTR_QW1_CNTINDEX_SHIFT) &\n-\t\t\tI40E_TXD_FLTR_QW1_CNTINDEX_MASK;\n-\t}\n-\n-\tfdir_desc->qindex_flex_ptype_vsi = cpu_to_le32(fpt);\n-\tfdir_desc->rsvd = cpu_to_le32(0);\n-\tfdir_desc->dtype_cmd_cntindex = cpu_to_le32(dcc);\n-\tfdir_desc->fd_id = cpu_to_le32(fdir_data->fd_id);\n+\ti40e_fdir(tx_ring, fdir_data, add);\n \n \t/* Now program a dummy descriptor */\n \ti = tx_ring->next_to_use;\n", "prefixes": [ "next", "S46", "5/8" ] }