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GET /api/patches/652436/?format=api
{ "id": 652436, "url": "http://patchwork.ozlabs.org/api/patches/652436/?format=api", "web_url": "http://patchwork.ozlabs.org/project/intel-wired-lan/patch/1469488555-28187-13-git-send-email-bimmy.pujari@intel.com/", "project": { "id": 46, "url": "http://patchwork.ozlabs.org/api/projects/46/?format=api", "name": "Intel Wired Ethernet development", "link_name": "intel-wired-lan", "list_id": "intel-wired-lan.osuosl.org", "list_email": "intel-wired-lan@osuosl.org", "web_url": "", "scm_url": "", "webscm_url": "", "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<1469488555-28187-13-git-send-email-bimmy.pujari@intel.com>", "list_archive_url": null, "date": "2016-07-25T23:15:54", "name": "[next,S40,12/13] i40e: Allow RSS Hash set with less than four parameters", "commit_ref": null, "pull_url": null, "state": "changes-requested", "archived": false, "hash": "6b86c1569bd5c11e359409af4adb0ae119274754", "submitter": { "id": 68919, "url": "http://patchwork.ozlabs.org/api/people/68919/?format=api", "name": "Pujari, Bimmy", "email": "bimmy.pujari@intel.com" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/intel-wired-lan/patch/1469488555-28187-13-git-send-email-bimmy.pujari@intel.com/mbox/", "series": [], "comments": "http://patchwork.ozlabs.org/api/patches/652436/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/652436/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<intel-wired-lan-bounces@lists.osuosl.org>", "X-Original-To": [ "incoming@patchwork.ozlabs.org", "intel-wired-lan@lists.osuosl.org" ], "Delivered-To": [ "patchwork-incoming@bilbo.ozlabs.org", "intel-wired-lan@lists.osuosl.org" ], "Received": [ "from fraxinus.osuosl.org (smtp4.osuosl.org [140.211.166.137])\n\t(using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits))\n\t(No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 3ryxtv5ZShz9s9Y\n\tfor <incoming@patchwork.ozlabs.org>;\n\tTue, 26 Jul 2016 09:15:35 +1000 (AEST)", "from localhost (localhost [127.0.0.1])\n\tby fraxinus.osuosl.org (Postfix) with ESMTP id 47DE6889A6;\n\tMon, 25 Jul 2016 23:15:34 +0000 (UTC)", "from fraxinus.osuosl.org ([127.0.0.1])\n\tby localhost (.osuosl.org [127.0.0.1]) (amavisd-new, port 10024)\n\twith ESMTP id I3WXPJmjpZEp; Mon, 25 Jul 2016 23:15:30 +0000 (UTC)", "from ash.osuosl.org (ash.osuosl.org [140.211.166.34])\n\tby fraxinus.osuosl.org (Postfix) with ESMTP id E6ACF88880;\n\tMon, 25 Jul 2016 23:15:28 +0000 (UTC)", "from hemlock.osuosl.org (smtp2.osuosl.org [140.211.166.133])\n\tby ash.osuosl.org (Postfix) with ESMTP id 4C0E71C1511\n\tfor <intel-wired-lan@lists.osuosl.org>;\n\tMon, 25 Jul 2016 23:15:26 +0000 (UTC)", "from localhost (localhost [127.0.0.1])\n\tby hemlock.osuosl.org (Postfix) with ESMTP id 46D7C866E4\n\tfor <intel-wired-lan@lists.osuosl.org>;\n\tMon, 25 Jul 2016 23:15:26 +0000 (UTC)", "from hemlock.osuosl.org ([127.0.0.1])\n\tby localhost (.osuosl.org [127.0.0.1]) (amavisd-new, port 10024)\n\twith ESMTP id Fw+S1i0fp-Nm for <intel-wired-lan@lists.osuosl.org>;\n\tMon, 25 Jul 2016 23:15:25 +0000 (UTC)", "from mga01.intel.com (mga01.intel.com [192.55.52.88])\n\tby hemlock.osuosl.org (Postfix) with ESMTP id 6517488BAA\n\tfor <intel-wired-lan@lists.osuosl.org>;\n\tMon, 25 Jul 2016 23:15:25 +0000 (UTC)", "from orsmga003.jf.intel.com ([10.7.209.27])\n\tby fmsmga101.fm.intel.com with ESMTP; 25 Jul 2016 16:15:23 -0700", "from bimmy.jf.intel.com (HELO bimmy.linux1.jf.intel.com)\n\t([134.134.2.177])\n\tby orsmga003.jf.intel.com with ESMTP; 25 Jul 2016 16:15:23 -0700" ], "X-Virus-Scanned": [ "amavisd-new at osuosl.org", "amavisd-new at osuosl.org" ], "X-Greylist": "domain auto-whitelisted by SQLgrey-1.7.6", "X-ExtLoop1": "1", "X-IronPort-AV": "E=Sophos;i=\"5.28,421,1464678000\"; d=\"scan'208\";a=\"853301729\"", "From": "Bimmy Pujari <bimmy.pujari@intel.com>", "To": "intel-wired-lan@lists.osuosl.org", "Date": "Mon, 25 Jul 2016 16:15:54 -0700", "Message-Id": "<1469488555-28187-13-git-send-email-bimmy.pujari@intel.com>", "X-Mailer": "git-send-email 2.4.11", "In-Reply-To": "<1469488555-28187-1-git-send-email-bimmy.pujari@intel.com>", "References": "<1469488555-28187-1-git-send-email-bimmy.pujari@intel.com>", "Subject": "[Intel-wired-lan] [next PATCH S40 12/13] i40e: Allow RSS Hash set\n\twith less than four parameters", "X-BeenThere": "intel-wired-lan@lists.osuosl.org", "X-Mailman-Version": "2.1.18-1", "Precedence": "list", "List-Id": "Intel Wired Ethernet Linux Kernel Driver Development\n\t<intel-wired-lan.lists.osuosl.org>", "List-Unsubscribe": "<http://lists.osuosl.org/mailman/options/intel-wired-lan>, \n\t<mailto:intel-wired-lan-request@lists.osuosl.org?subject=unsubscribe>", "List-Archive": "<http://lists.osuosl.org/pipermail/intel-wired-lan/>", "List-Post": "<mailto:intel-wired-lan@lists.osuosl.org>", "List-Help": "<mailto:intel-wired-lan-request@lists.osuosl.org?subject=help>", "List-Subscribe": "<http://lists.osuosl.org/mailman/listinfo/intel-wired-lan>, \n\t<mailto:intel-wired-lan-request@lists.osuosl.org?subject=subscribe>", "MIME-Version": "1.0", "Content-Type": "text/plain; charset=\"us-ascii\"", "Content-Transfer-Encoding": "7bit", "Errors-To": "intel-wired-lan-bounces@lists.osuosl.org", "Sender": "\"Intel-wired-lan\" <intel-wired-lan-bounces@lists.osuosl.org>" }, "content": "From: Carolyn Wyborny <carolyn.wyborny@intel.com>\n\nThis patch implements a feature change which allows using ethtool to set\nrss hash opts using less than four parameters if desired.\n\nSigned-off-by: Carolyn Wyborny <carolyn.wyborny@intel.com>\nSigned-off-by: Kiran Patil <kiran.patil@intel.com>\nChange-ID: I0fbb91255d81e997c456697c21ac39cc9754821b\n---\n drivers/net/ethernet/intel/i40e/i40e.h | 3 -\n drivers/net/ethernet/intel/i40e/i40e_ethtool.c | 208 +++++++++++++++----------\n 2 files changed, 130 insertions(+), 81 deletions(-)", "diff": "diff --git a/drivers/net/ethernet/intel/i40e/i40e.h b/drivers/net/ethernet/intel/i40e/i40e.h\nindex 06e1835..6329233 100644\n--- a/drivers/net/ethernet/intel/i40e/i40e.h\n+++ b/drivers/net/ethernet/intel/i40e/i40e.h\n@@ -586,9 +586,6 @@ struct i40e_vsi {\n \n \t/* VSI specific handlers */\n \tirqreturn_t (*irq_handler)(int irq, void *data);\n-\n-\t/* current rxnfc data */\n-\tstruct ethtool_rxnfc rxnfc; /* current rss hash opts */\n } ____cacheline_internodealigned_in_smp;\n \n struct i40e_netdev_priv {\ndiff --git a/drivers/net/ethernet/intel/i40e/i40e_ethtool.c b/drivers/net/ethernet/intel/i40e/i40e_ethtool.c\nindex a49552f..5bd3848 100644\n--- a/drivers/net/ethernet/intel/i40e/i40e_ethtool.c\n+++ b/drivers/net/ethernet/intel/i40e/i40e_ethtool.c\n@@ -2141,41 +2141,72 @@ static int i40e_set_per_queue_coalesce(struct net_device *netdev, u32 queue,\n **/\n static int i40e_get_rss_hash_opts(struct i40e_pf *pf, struct ethtool_rxnfc *cmd)\n {\n+\tstruct i40e_hw *hw = &pf->hw;\n+\tu8 flow_pctype = 0;\n+\tu64 i_set = 0;\n+\n \tcmd->data = 0;\n \n-\tif (pf->vsi[pf->lan_vsi]->rxnfc.data != 0) {\n-\t\tcmd->data = pf->vsi[pf->lan_vsi]->rxnfc.data;\n-\t\tcmd->flow_type = pf->vsi[pf->lan_vsi]->rxnfc.flow_type;\n-\t\treturn 0;\n-\t}\n-\t/* Report default options for RSS on i40e */\n \tswitch (cmd->flow_type) {\n \tcase TCP_V4_FLOW:\n+\t\tflow_pctype = I40E_FILTER_PCTYPE_NONF_IPV4_TCP;\n+\t\tbreak;\n \tcase UDP_V4_FLOW:\n-\t\tcmd->data |= RXH_L4_B_0_1 | RXH_L4_B_2_3;\n-\t/* fall through to add IP fields */\n+\t\tflow_pctype = I40E_FILTER_PCTYPE_NONF_IPV4_UDP;\n+\t\tbreak;\n+\tcase TCP_V6_FLOW:\n+\t\tflow_pctype = I40E_FILTER_PCTYPE_NONF_IPV6_TCP;\n+\t\tbreak;\n+\tcase UDP_V6_FLOW:\n+\t\tflow_pctype = I40E_FILTER_PCTYPE_NONF_IPV6_UDP;\n+\t\tbreak;\n \tcase SCTP_V4_FLOW:\n \tcase AH_ESP_V4_FLOW:\n \tcase AH_V4_FLOW:\n \tcase ESP_V4_FLOW:\n \tcase IPV4_FLOW:\n-\t\tcmd->data |= RXH_IP_SRC | RXH_IP_DST;\n-\t\tbreak;\n-\tcase TCP_V6_FLOW:\n-\tcase UDP_V6_FLOW:\n-\t\tcmd->data |= RXH_L4_B_0_1 | RXH_L4_B_2_3;\n-\t/* fall through to add IP fields */\n \tcase SCTP_V6_FLOW:\n \tcase AH_ESP_V6_FLOW:\n \tcase AH_V6_FLOW:\n \tcase ESP_V6_FLOW:\n \tcase IPV6_FLOW:\n+\t\t/* Default is src/dest for IP, no matter the L4 hashing */\n \t\tcmd->data |= RXH_IP_SRC | RXH_IP_DST;\n \t\tbreak;\n \tdefault:\n \t\treturn -EINVAL;\n \t}\n \n+\t/* Read flow based hash input set register */\n+\tif (flow_pctype) {\n+\t\ti_set = (u64)i40e_read_rx_ctl(hw, I40E_GLQF_HASH_INSET(0,\n+\t\t\t\t\t flow_pctype)) |\n+\t\t\t((u64)i40e_read_rx_ctl(hw, I40E_GLQF_HASH_INSET(1,\n+\t\t\t\t\t flow_pctype)) << 32);\n+\t}\n+\n+\t/* Process bits of hash input set */\n+\tif (i_set) {\n+\t\tif (i_set & I40E_L4_SRC_MASK)\n+\t\t\tcmd->data |= RXH_L4_B_0_1;\n+\t\tif (i_set & I40E_L4_DST_MASK)\n+\t\t\tcmd->data |= RXH_L4_B_2_3;\n+\n+\t\tif (cmd->flow_type == TCP_V4_FLOW ||\n+\t\t cmd->flow_type == UDP_V4_FLOW) {\n+\t\t\tif (i_set & I40E_L3_SRC_MASK)\n+\t\t\t\tcmd->data |= RXH_IP_SRC;\n+\t\t\tif (i_set & I40E_L3_DST_MASK)\n+\t\t\t\tcmd->data |= RXH_IP_DST;\n+\t\t} else if (cmd->flow_type == TCP_V6_FLOW ||\n+\t\t\t cmd->flow_type == UDP_V6_FLOW) {\n+\t\t\tif (i_set & I40E_L3_V6_SRC_MASK)\n+\t\t\t\tcmd->data |= RXH_IP_SRC;\n+\t\t\tif (i_set & I40E_L3_V6_DST_MASK)\n+\t\t\t\tcmd->data |= RXH_IP_DST;\n+\t\t}\n+\t}\n+\n \treturn 0;\n }\n \n@@ -2318,6 +2349,51 @@ static int i40e_get_rxnfc(struct net_device *netdev, struct ethtool_rxnfc *cmd,\n }\n \n /**\n+ * i40e_get_rss_hash_bits - Read RSS Hash bits from register\n+ * @nfc: pointer to user request\n+ * @i_setc bits currently set\n+ *\n+ * Returns value of bits to be set per user request\n+ **/\n+static u64 i40e_get_rss_hash_bits(struct ethtool_rxnfc *nfc, u64 i_setc)\n+{\n+\tu64 i_set = i_setc;\n+\tu64 src_l3 = 0, dst_l3 = 0;\n+\n+\tif (nfc->data & RXH_L4_B_0_1)\n+\t\ti_set |= I40E_L4_SRC_MASK;\n+\telse\n+\t\ti_set &= ~I40E_L4_SRC_MASK;\n+\tif (nfc->data & RXH_L4_B_2_3)\n+\t\ti_set |= I40E_L4_DST_MASK;\n+\telse\n+\t\ti_set &= ~I40E_L4_DST_MASK;\n+\n+\tif (nfc->flow_type == TCP_V6_FLOW || nfc->flow_type == UDP_V6_FLOW) {\n+\t\tsrc_l3 = I40E_L3_V6_SRC_MASK;\n+\t\tdst_l3 = I40E_L3_V6_DST_MASK;\n+\t} else if (nfc->flow_type == TCP_V4_FLOW ||\n+\t\t nfc->flow_type == UDP_V4_FLOW) {\n+\t\tsrc_l3 = I40E_L3_SRC_MASK;\n+\t\tdst_l3 = I40E_L3_DST_MASK;\n+\t} else {\n+\t\t/* Any other flow type are not supported here */\n+\t\treturn i_set;\n+\t}\n+\n+\tif (nfc->data & RXH_IP_SRC)\n+\t\ti_set |= src_l3;\n+\telse\n+\t\ti_set &= ~src_l3;\n+\tif (nfc->data & RXH_IP_DST)\n+\t\ti_set |= dst_l3;\n+\telse\n+\t\ti_set &= ~dst_l3;\n+\n+\treturn i_set;\n+}\n+\n+/**\n * i40e_set_rss_hash_opt - Enable/Disable flow types for RSS hash\n * @pf: pointer to the physical function struct\n * @cmd: ethtool rxnfc command\n@@ -2329,6 +2405,8 @@ static int i40e_set_rss_hash_opt(struct i40e_pf *pf, struct ethtool_rxnfc *nfc)\n \tstruct i40e_hw *hw = &pf->hw;\n \tu64 hena = (u64)i40e_read_rx_ctl(hw, I40E_PFQF_HENA(0)) |\n \t\t ((u64)i40e_read_rx_ctl(hw, I40E_PFQF_HENA(1)) << 32);\n+\tu8 flow_pctype = 0;\n+\tu64 i_set, i_setc;\n \n \t/* RSS does not support anything other than hashing\n \t * to queues on src and dst IPs and ports\n@@ -2337,75 +2415,39 @@ static int i40e_set_rss_hash_opt(struct i40e_pf *pf, struct ethtool_rxnfc *nfc)\n \t\t\t RXH_L4_B_0_1 | RXH_L4_B_2_3))\n \t\treturn -EINVAL;\n \n-\t/* We need at least the IP SRC and DEST fields for hashing */\n-\tif (!(nfc->data & RXH_IP_SRC) ||\n-\t !(nfc->data & RXH_IP_DST))\n-\t\treturn -EINVAL;\n-\n \tswitch (nfc->flow_type) {\n \tcase TCP_V4_FLOW:\n-\t\tswitch (nfc->data & (RXH_L4_B_0_1 | RXH_L4_B_2_3)) {\n-\t\tcase 0:\n-\t\t\treturn -EINVAL;\n-\t\tcase (RXH_L4_B_0_1 | RXH_L4_B_2_3):\n-\t\t\tif (pf->flags & I40E_FLAG_MULTIPLE_TCP_UDP_RSS_PCTYPE)\n-\t\t\t\thena |=\n-\t\t\t BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV4_TCP_SYN_NO_ACK);\n-\n-\t\t\thena |= BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV4_TCP);\n-\t\t\tbreak;\n-\t\tdefault:\n-\t\t\treturn -EINVAL;\n-\t\t}\n+\t\tflow_pctype = I40E_FILTER_PCTYPE_NONF_IPV4_TCP;\n+\t\tif (pf->flags & I40E_FLAG_MULTIPLE_TCP_UDP_RSS_PCTYPE)\n+\t\t\thena |=\n+\t\t\t BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV4_TCP_SYN_NO_ACK);\n \t\tbreak;\n \tcase TCP_V6_FLOW:\n-\t\tswitch (nfc->data & (RXH_L4_B_0_1 | RXH_L4_B_2_3)) {\n-\t\tcase 0:\n-\t\t\treturn -EINVAL;\n-\t\tcase (RXH_L4_B_0_1 | RXH_L4_B_2_3):\n-\t\t\tif (pf->flags & I40E_FLAG_MULTIPLE_TCP_UDP_RSS_PCTYPE)\n-\t\t\t\thena |=\n-\t\t\t BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV6_TCP_SYN_NO_ACK);\n-\n-\t\t\thena |= BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV6_TCP);\n-\t\t\tbreak;\n-\t\tdefault:\n-\t\t\treturn -EINVAL;\n-\t\t}\n+\t\tflow_pctype = I40E_FILTER_PCTYPE_NONF_IPV6_TCP;\n+\t\tif (pf->flags & I40E_FLAG_MULTIPLE_TCP_UDP_RSS_PCTYPE)\n+\t\t\thena |=\n+\t\t\t BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV4_TCP_SYN_NO_ACK);\n+\t\tif (pf->flags & I40E_FLAG_MULTIPLE_TCP_UDP_RSS_PCTYPE)\n+\t\t\thena |=\n+\t\t\t BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV6_TCP_SYN_NO_ACK);\n \t\tbreak;\n \tcase UDP_V4_FLOW:\n-\t\tswitch (nfc->data & (RXH_L4_B_0_1 | RXH_L4_B_2_3)) {\n-\t\tcase 0:\n-\t\t\treturn -EINVAL;\n-\t\tcase (RXH_L4_B_0_1 | RXH_L4_B_2_3):\n-\t\t\tif (pf->flags & I40E_FLAG_MULTIPLE_TCP_UDP_RSS_PCTYPE)\n-\t\t\t\thena |=\n-\t\t\t BIT_ULL(I40E_FILTER_PCTYPE_NONF_UNICAST_IPV4_UDP) |\n-\t\t\t BIT_ULL(I40E_FILTER_PCTYPE_NONF_MULTICAST_IPV4_UDP);\n-\n-\t\t\thena |= (BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV4_UDP) |\n-\t\t\t\t BIT_ULL(I40E_FILTER_PCTYPE_FRAG_IPV4));\n-\t\t\tbreak;\n-\t\tdefault:\n-\t\t\treturn -EINVAL;\n-\t\t}\n+\t\tflow_pctype = I40E_FILTER_PCTYPE_NONF_IPV4_UDP;\n+\t\tif (pf->flags & I40E_FLAG_MULTIPLE_TCP_UDP_RSS_PCTYPE)\n+\t\t\thena |=\n+\t\t\t BIT_ULL(I40E_FILTER_PCTYPE_NONF_UNICAST_IPV4_UDP) |\n+\t\t\t BIT_ULL(I40E_FILTER_PCTYPE_NONF_MULTICAST_IPV4_UDP);\n+\n+\t\thena |= BIT_ULL(I40E_FILTER_PCTYPE_FRAG_IPV4);\n \t\tbreak;\n \tcase UDP_V6_FLOW:\n-\t\tswitch (nfc->data & (RXH_L4_B_0_1 | RXH_L4_B_2_3)) {\n-\t\tcase 0:\n-\t\t\treturn -EINVAL;\n-\t\tcase (RXH_L4_B_0_1 | RXH_L4_B_2_3):\n-\t\t\tif (pf->flags & I40E_FLAG_MULTIPLE_TCP_UDP_RSS_PCTYPE)\n-\t\t\t\thena |=\n-\t\t\t BIT_ULL(I40E_FILTER_PCTYPE_NONF_UNICAST_IPV6_UDP) |\n-\t\t\t BIT_ULL(I40E_FILTER_PCTYPE_NONF_MULTICAST_IPV6_UDP);\n-\n-\t\t\thena |= (BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV6_UDP) |\n-\t\t\t\t BIT_ULL(I40E_FILTER_PCTYPE_FRAG_IPV6));\n-\t\t\tbreak;\n-\t\tdefault:\n-\t\t\treturn -EINVAL;\n-\t\t}\n+\t\tflow_pctype = I40E_FILTER_PCTYPE_NONF_IPV6_UDP;\n+\t\tif (pf->flags & I40E_FLAG_MULTIPLE_TCP_UDP_RSS_PCTYPE)\n+\t\t\thena |=\n+\t\t\t BIT_ULL(I40E_FILTER_PCTYPE_NONF_UNICAST_IPV6_UDP) |\n+\t\t\t BIT_ULL(I40E_FILTER_PCTYPE_NONF_MULTICAST_IPV6_UDP);\n+\n+\t\thena |= BIT_ULL(I40E_FILTER_PCTYPE_FRAG_IPV6);\n \t\tbreak;\n \tcase AH_ESP_V4_FLOW:\n \tcase AH_V4_FLOW:\n@@ -2437,13 +2479,23 @@ static int i40e_set_rss_hash_opt(struct i40e_pf *pf, struct ethtool_rxnfc *nfc)\n \t\treturn -EINVAL;\n \t}\n \n+\tif (flow_pctype) {\n+\t\ti_setc = (u64)i40e_read_rx_ctl(hw, I40E_GLQF_HASH_INSET(0,\n+\t\t\t\t\t flow_pctype)) |\n+\t\t\t((u64)i40e_read_rx_ctl(hw, I40E_GLQF_HASH_INSET(1,\n+\t\t\t\t\t flow_pctype)) << 32);\n+\t\ti_set = i40e_get_rss_hash_bits(nfc, i_setc);\n+\t\ti40e_write_rx_ctl(hw, I40E_GLQF_HASH_INSET(0, flow_pctype),\n+\t\t\t\t (u32)i_set);\n+\t\ti40e_write_rx_ctl(hw, I40E_GLQF_HASH_INSET(1, flow_pctype),\n+\t\t\t\t (u32)(i_set >> 32));\n+\t\thena |= BIT_ULL(flow_pctype);\n+\t}\n+\n \ti40e_write_rx_ctl(hw, I40E_PFQF_HENA(0), (u32)hena);\n \ti40e_write_rx_ctl(hw, I40E_PFQF_HENA(1), (u32)(hena >> 32));\n \ti40e_flush(hw);\n \n-\t/* Save setting for future output/update */\n-\tpf->vsi[pf->lan_vsi]->rxnfc = *nfc;\n-\n \treturn 0;\n }\n \n", "prefixes": [ "next", "S40", "12/13" ] }