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{
    "id": 638456,
    "url": "http://patchwork.ozlabs.org/api/patches/638456/?format=api",
    "web_url": "http://patchwork.ozlabs.org/project/glibc/patch/1466485631-3532-8-git-send-email-ynorov@caviumnetworks.com/",
    "project": {
        "id": 41,
        "url": "http://patchwork.ozlabs.org/api/projects/41/?format=api",
        "name": "GNU C Library",
        "link_name": "glibc",
        "list_id": "libc-alpha.sourceware.org",
        "list_email": "libc-alpha@sourceware.org",
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    "msgid": "<1466485631-3532-8-git-send-email-ynorov@caviumnetworks.com>",
    "list_archive_url": null,
    "date": "2016-06-21T05:06:50",
    "name": "[06/27,AARCH64] Use PTR_REG/PTR_SIZE/PTR_SIZE_LOG in dl-tlsesc.S",
    "commit_ref": null,
    "pull_url": null,
    "state": "new",
    "archived": false,
    "hash": "3572541e0566d014372237e5213b6a822b1974c1",
    "submitter": {
        "id": 68471,
        "url": "http://patchwork.ozlabs.org/api/people/68471/?format=api",
        "name": "Yury Norov",
        "email": "ynorov@caviumnetworks.com"
    },
    "delegate": null,
    "mbox": "http://patchwork.ozlabs.org/project/glibc/patch/1466485631-3532-8-git-send-email-ynorov@caviumnetworks.com/mbox/",
    "series": [],
    "comments": "http://patchwork.ozlabs.org/api/patches/638456/comments/",
    "check": "pending",
    "checks": "http://patchwork.ozlabs.org/api/patches/638456/checks/",
    "tags": {},
    "related": [],
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        "X-HELO": "na01-by2-obe.outbound.protection.outlook.com",
        "From": "Yury Norov <ynorov@caviumnetworks.com>",
        "To": "<libc-alpha@sourceware.org>, <linux-kernel@vger.kernel.org>",
        "CC": "<arnd@arndb.de>, <catalin.marinas@arm.com>, <marcus.shawcroft@arm.com>, \n\t<philb@gnu.org>, <davem@davemloft.net>, <szabolcs.nagy@arm.com>,\n\t<maxim.kuvyrkov@linaro.org>, <joseph@codesourcery.com>,\n\t<pinskia@gmail.com>, Andrew Pinski <apinski@cavium.com>,\n\tYury Norov <ynorov@caviumnetworks.com>",
        "Subject": "[PATCH 06/27] [AARCH64] Use PTR_REG/PTR_SIZE/PTR_SIZE_LOG in\n\tdl-tlsesc.S",
        "Date": "Tue, 21 Jun 2016 08:06:50 +0300",
        "Message-ID": "<1466485631-3532-8-git-send-email-ynorov@caviumnetworks.com>",
        "In-Reply-To": "<1466485631-3532-1-git-send-email-ynorov@caviumnetworks.com>",
        "References": "<1466485631-3532-1-git-send-email-ynorov@caviumnetworks.com>",
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    },
    "content": "From: Andrew Pinski <apinski@cavium.com>\n\nThis converts dl-tlsdesc.S code over to use the new macros which allows for\nsharing between ILP32 and LP64 code.\n\n* sysdeps/aarch64/dl-tlsdesc.S (_dl_tlsdesc_return): Use PTR_REG.\n(_dl_tlsdesc_undefweak): Use PTR_REG, PTR_SIZE.\n(_dl_tlsdesc_dynamic): Likewise.\n(_dl_tlsdesc_resolve_rela): Likewise.\n(_dl_tlsdesc_resolve_hold): Likewise.\n\nSigned-off-by: Yury Norov <ynorov@caviumnetworks.com>\n---\n sysdeps/aarch64/dl-tlsdesc.S | 36 ++++++++++++++++++------------------\n 1 file changed, 18 insertions(+), 18 deletions(-)",
    "diff": "diff --git a/sysdeps/aarch64/dl-tlsdesc.S b/sysdeps/aarch64/dl-tlsdesc.S\nindex 05be370..fe8a17d 100644\n--- a/sysdeps/aarch64/dl-tlsdesc.S\n+++ b/sysdeps/aarch64/dl-tlsdesc.S\n@@ -74,7 +74,7 @@\n \tcfi_startproc\n \t.align 2\n _dl_tlsdesc_return:\n-\tldr\tx0, [x0, #8]\n+\tldr\tPTR_REG (0), [x0, #PTR_SIZE]\n \tRET\n \tcfi_endproc\n \t.size\t_dl_tlsdesc_return, .-_dl_tlsdesc_return\n@@ -126,9 +126,9 @@ _dl_tlsdesc_undefweak:\n \t   td->entry in _dl_tlsdesc_resolve_rela_fixup ensuring that the load\n \t   from [x0,#8] here happens after the initialization of td->arg.  */\n \tldar\txzr, [x0]\n-\tldr\tx0, [x0, #8]\n+\tldr\tPTR_REG (0), [x0, #PTR_SIZE]\n \tmrs\tx1, tpidr_el0\n-\tsub\tx0, x0, x1\n+\tsub\tPTR_REG (0), PTR_REG (0), PTR_REG (1)\n \tldr\tx1, [sp], #16\n \tcfi_adjust_cfa_offset (-16)\n \tRET\n@@ -189,20 +189,20 @@ _dl_tlsdesc_dynamic:\n \t   td->entry in _dl_tlsdesc_resolve_rela_fixup ensuring that the load\n \t   from [x0,#8] here happens after the initialization of td->arg.  */\n \tldar\txzr, [x0]\n-\tldr\tx1, [x0,#8]\n-\tldr\tx0, [x4]\n-\tldr\tx3, [x1,#16]\n-\tldr\tx2, [x0]\n-\tcmp\tx3, x2\n+\tldr\tPTR_REG (1), [x0,#PTR_SIZE]\n+\tldr\tPTR_REG (0), [x4]\n+\tldr\tPTR_REG (3), [x1,#(PTR_SIZE * 2)]\n+\tldr\tPTR_REG (2), [x0]\n+\tcmp\tPTR_REG (3), PTR_REG (2)\n \tb.hi\t2f\n-\tldr\tx2, [x1]\n-\tadd\tx0, x0, x2, lsl #4\n-\tldr\tx0, [x0]\n+\tldr\tPTR_REG (2), [x1]\n+\tadd\tPTR_REG (0), PTR_REG (0), PTR_REG (2), lsl #(PTR_LOG_SIZE + 1)\n+\tldr\tPTR_REG (0), [x0]\n \tcmn\tx0, #0x1\n \tb.eq\t2f\n-\tldr\tx1, [x1,#8]\n-\tadd\tx0, x0, x1\n-\tsub\tx0, x0, x4\n+\tldr\tPTR_REG (1), [x1,#(PTR_SIZE * 2)]\n+\tadd\tPTR_REG (0), PTR_REG (0), PTR_REG (1)\n+\tsub\tPTR_REG (0), PTR_REG (0), PTR_REG (4)\n 1:\n \tldp\t x1,  x2, [sp, #32+16*0]\n \tldp\t x3,  x4, [sp, #32+16*1]\n@@ -233,7 +233,7 @@ _dl_tlsdesc_dynamic:\n \tbl\t__tls_get_addr\n \n \tmrs\tx1, tpidr_el0\n-\tsub\tx0, x0, x1\n+\tsub\tPTR_REG (0), PTR_REG (0), PTR_REG (1)\n \n \tRESTORE_Q_REGISTERS\n \n@@ -279,13 +279,13 @@ _dl_tlsdesc_resolve_rela:\n \n \tSAVE_Q_REGISTERS\n \n-\tldr\tx1, [x3, #8]\n+\tldr\tPTR_REG (1), [x3, #PTR_SIZE]\n \tbl\t_dl_tlsdesc_resolve_rela_fixup\n \n \tRESTORE_Q_REGISTERS\n \n \tldr\tx0, [sp, #32+16*8]\n-\tldr\tx1, [x0]\n+\tldr\tPTR_REG (1), [x0]\n \tblr\tx1\n \n \tldp\t x1,  x4, [sp, #32+16*0]\n@@ -346,7 +346,7 @@ _dl_tlsdesc_resolve_hold:\n \tRESTORE_Q_REGISTERS\n \n \tldr\tx0, [sp, #32+16*9]\n-\tldr\tx1, [x0]\n+\tldr\tPTR_REG (1), [x0]\n \tblr\tx1\n \n \tldp\t x1,  x2, [sp, #32+16*0]\n",
    "prefixes": [
        "06/27",
        "AARCH64"
    ]
}