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GET /api/patches/624191/?format=api
{ "id": 624191, "url": "http://patchwork.ozlabs.org/api/patches/624191/?format=api", "web_url": "http://patchwork.ozlabs.org/project/openwrt/patch/1463682077-19339-20-git-send-email-sven.eckelmann@open-mesh.com/", "project": { "id": 45, "url": "http://patchwork.ozlabs.org/api/projects/45/?format=api", "name": "OpenWrt development", "link_name": "openwrt", "list_id": "openwrt-devel.lists.openwrt.org", "list_email": "openwrt-devel@lists.openwrt.org", "web_url": "http://openwrt.org/", "scm_url": "git://git.openwrt.org/openwrt.git", "webscm_url": "https://dev.openwrt.org/browser", "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<1463682077-19339-20-git-send-email-sven.eckelmann@open-mesh.com>", "list_archive_url": null, "date": "2016-05-19T18:21:03", "name": "[OpenWrt-Devel,CC,20/34] ar71xx: add kernel support for the OpenMesh OM5P-AC board", "commit_ref": null, "pull_url": null, "state": "accepted", "archived": false, "hash": "fb3d487cae77358dad04b323c5483f4ea93d668b", "submitter": { "id": 68437, "url": "http://patchwork.ozlabs.org/api/people/68437/?format=api", "name": "Sven Eckelmann", "email": "sven.eckelmann@open-mesh.com" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/openwrt/patch/1463682077-19339-20-git-send-email-sven.eckelmann@open-mesh.com/mbox/", "series": [], "comments": "http://patchwork.ozlabs.org/api/patches/624191/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/624191/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<openwrt-devel-bounces@lists.openwrt.org>", "X-Original-To": "incoming@patchwork.ozlabs.org", "Delivered-To": "patchwork-incoming@bilbo.ozlabs.org", "Received": [ "from arrakis.dune.hu (caladan.dune.hu [78.24.191.180])\n\t(using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits))\n\t(No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 3r9fhR0QlJz9sdg\n\tfor <incoming@patchwork.ozlabs.org>;\n\tFri, 20 May 2016 04:28:22 +1000 (AEST)", "from arrakis.dune.hu (localhost [127.0.0.1])\n\tby arrakis.dune.hu (Postfix) with ESMTP id 57816B9207F;\n\tThu, 19 May 2016 20:22:53 +0200 (CEST)", "from arrakis.dune.hu (localhost [127.0.0.1])\n\tby arrakis.dune.hu (Postfix) with ESMTP;\n\tThu, 19 May 2016 20:22:53 +0200 (CEST)", "from arrakis.dune.hu (localhost [127.0.0.1])\n\tby arrakis.dune.hu (Postfix) with ESMTP id 2A6F8B91FE6\n\tfor <openwrt-devel@lists.openwrt.org>;\n\tThu, 19 May 2016 20:22:05 +0200 (CEST)", "from mail-wm0-f49.google.com (mail-wm0-f49.google.com\n\t[74.125.82.49]) by arrakis.dune.hu (Postfix) with ESMTPS\n\tfor <openwrt-devel@lists.openwrt.org>;\n\tThu, 19 May 2016 20:22:05 +0200 (CEST)", "by mail-wm0-f49.google.com with SMTP id w143so439380wmw.0\n\tfor <openwrt-devel@lists.openwrt.org>;\n\tThu, 19 May 2016 11:22:05 -0700 (PDT)", "from sven-desktop.home.narfation.org\n\t(p579E6DC9.dip0.t-ipconnect.de. [87.158.109.201])\n\tby smtp.gmail.com with ESMTPSA id\n\thm7sm15653176wjb.41.2016.05.19.11.22.03\n\t(version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128);\n\tThu, 19 May 2016 11:22:04 -0700 (PDT)" ], "Authentication-Results": "ozlabs.org;\n\tdkim=fail reason=\"signature verification failed\" (2048-bit key;\n\tunprotected) header.d=open-mesh-com.20150623.gappssmtp.com\n\theader.i=@open-mesh-com.20150623.gappssmtp.com\n\theader.b=M4/jCMj8; dkim-atps=neutral", "X-Spam-Checker-Version": "SpamAssassin 3.4.1 (2015-04-28) on arrakis.dune.hu", "X-Spam-Level": "", "X-Spam-Status": "No, score=-1.5 required=5.0 tests=BAYES_00,T_DKIM_INVALID\n\tautolearn=unavailable autolearn_force=no version=3.4.1", "X-policyd-weight": "using cached result; rate: -7", "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed;\n\td=open-mesh-com.20150623.gappssmtp.com; s=20150623;\n\th=from:to:cc:subject:date:message-id:in-reply-to:references;\n\tbh=E/+j65LIgQ4y3RuzY/L6aXaekIv7m2+AEFEIXcyXnAM=;\n\tb=M4/jCMj8VI9Vlgp/0paXXfIXp6uMJYeaorR2sPFzQDlSVO76p8vkhmUELi3qXzAeD5\n\tYRxfCSepaNWJ0IgJjDsyaNypj9e1C+o0yPpYVDbrH+LtkbjrRoVRs1xxdGkLr2BDedSn\n\tsEat35ZD8dP1zzz2V5EfoWqONsZrD5UbtsffRHw8iR6JINocmnJgEQGdMNcGv+kOqNKs\n\tBEaj+wgUnCAiM/WlYYHpmhRSuglZBjzPr3cxyYE6gXSm8ZeFPR+5tuqENgRmMpOtvIBD\n\thqKdf0WCz+evtGPwfe6rl6njX5v96zLoH/SD36806glMVRW9fHRAhnOHKxikLnBbtaX7\n\t6jzw==", "X-Google-DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed;\n\td=1e100.net; s=20130820;\n\th=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to\n\t:references;\n\tbh=E/+j65LIgQ4y3RuzY/L6aXaekIv7m2+AEFEIXcyXnAM=;\n\tb=XqcjSP2mlRvl4bTUmDW2veuVG7ykZhgdByC2b8o670l9CUt1onfKrEaKOrWjCC7rRn\n\tV4ICkd2TQurCf/fB7vkLsmrRy50V39p/W1quNLmbZW2fOY0Ngo7mjiZ8XHcVngiJf+oG\n\t6hAifenBlwcouFKaUjTI1avlh5rgGlUmBNdVZ6//HFTeBvOpzcIEQTJpf3M0UvnREleb\n\tuF+ElVZ/D/prYS3+oc1tVIvwPilw8D4XHbD8r9n4o+C0ET1LI3i8w6n1Occ5ESY3BVCF\n\tIOipTJNkWAo/hjc9J0L1zygJrq8TNlUnJgsIuPSpWLqzVHpp9JMmBKLAUkp43aE6nD+M\n\tAyeA==", "X-Gm-Message-State": "AOPr4FXegZWEv9xduKqL2tum7ZWq9m9Ejcy4LTQ/zyIxSzJuOlmANQy1emGFMyGlNO5KXWem", "X-Received": "by 10.28.113.218 with SMTP id d87mr16220473wmi.52.1463682124657; \n\tThu, 19 May 2016 11:22:04 -0700 (PDT)", "From": "Sven Eckelmann <sven.eckelmann@open-mesh.com>", "To": "openwrt-devel@lists.openwrt.org", "Date": "Thu, 19 May 2016 20:21:03 +0200", "Message-Id": "<1463682077-19339-20-git-send-email-sven.eckelmann@open-mesh.com>", "X-Mailer": "git-send-email 2.8.1", "In-Reply-To": "<1463682077-19339-1-git-send-email-sven.eckelmann@open-mesh.com>", "References": "<1463682077-19339-1-git-send-email-sven.eckelmann@open-mesh.com>", "Subject": "[OpenWrt-Devel] [PATCH CC 20/34] ar71xx: add kernel support for the\n\tOpenMesh OM5P-AC board", "X-BeenThere": "openwrt-devel@lists.openwrt.org", "X-Mailman-Version": "2.1.20", "Precedence": "list", "List-Id": "OpenWrt Development List <openwrt-devel.lists.openwrt.org>", "List-Unsubscribe": "<https://lists.openwrt.org/cgi-bin/mailman/options/openwrt-devel>,\n\t<mailto:openwrt-devel-request@lists.openwrt.org?subject=unsubscribe>", "List-Archive": "<http://lists.openwrt.org/pipermail/openwrt-devel/>", "List-Post": "<mailto:openwrt-devel@lists.openwrt.org>", "List-Help": "<mailto:openwrt-devel-request@lists.openwrt.org?subject=help>", "List-Subscribe": "<https://lists.openwrt.org/cgi-bin/mailman/listinfo/openwrt-devel>,\n\t<mailto:openwrt-devel-request@lists.openwrt.org?subject=subscribe>", "Cc": "Sven Eckelmann <sven.eckelmann@open-mesh.com>", "MIME-Version": "1.0", "Content-Type": "text/plain; charset=\"utf-8\"", "Content-Transfer-Encoding": "base64", "Errors-To": "openwrt-devel-bounces@lists.openwrt.org", "Sender": "\"openwrt-devel\" <openwrt-devel-bounces@lists.openwrt.org>" }, "content": "Signed-off-by: Sven Eckelmann <sven.eckelmann@open-mesh.com>\n\nBackport of r49141\n---\n target/linux/ar71xx/config-3.18 | 1 +\n .../ar71xx/files/arch/mips/ath79/mach-om5pac.c | 193 +++++++++++++++++++++\n .../815-MIPS-ath79-add-om5pac-support.patch | 38 ++++\n 3 files changed, 232 insertions(+)\n create mode 100644 target/linux/ar71xx/files/arch/mips/ath79/mach-om5pac.c\n create mode 100644 target/linux/ar71xx/patches-3.18/815-MIPS-ath79-add-om5pac-support.patch", "diff": "diff --git a/target/linux/ar71xx/config-3.18 b/target/linux/ar71xx/config-3.18\nindex 2354c9c..9a66711 100644\n--- a/target/linux/ar71xx/config-3.18\n+++ b/target/linux/ar71xx/config-3.18\n@@ -91,6 +91,7 @@ CONFIG_ATH79_MACH_NBG460N=y\n CONFIG_ATH79_MACH_NBG6716=y\n CONFIG_ATH79_MACH_OM2P=y\n CONFIG_ATH79_MACH_OM5P=y\n+CONFIG_ATH79_MACH_OM5P_AC=y\n CONFIG_ATH79_MACH_ONION_OMEGA=y\n CONFIG_ATH79_MACH_PB42=y\n CONFIG_ATH79_MACH_PB44=y\ndiff --git a/target/linux/ar71xx/files/arch/mips/ath79/mach-om5pac.c b/target/linux/ar71xx/files/arch/mips/ath79/mach-om5pac.c\nnew file mode 100644\nindex 0000000..f6974af\n--- /dev/null\n+++ b/target/linux/ar71xx/files/arch/mips/ath79/mach-om5pac.c\n@@ -0,0 +1,193 @@\n+/*\n+ * OpenMesh OM5P-AC support\n+ *\n+ * Copyright (C) 2013 Marek Lindner <marek@open-mesh.com>\n+ * Copyright (C) 2014 Sven Eckelmann <sven@open-mesh.com>\n+ *\n+ * This program is free software; you can redistribute it and/or modify it\n+ * under the terms of the GNU General Public License version 2 as published\n+ * by the Free Software Foundation.\n+ */\n+\n+#include <linux/gpio.h>\n+#include <linux/mtd/mtd.h>\n+#include <linux/mtd/partitions.h>\n+#include <linux/platform_device.h>\n+#include <linux/i2c.h>\n+#include <linux/i2c-algo-bit.h>\n+#include <linux/i2c-gpio.h>\n+#include <linux/platform_data/phy-at803x.h>\n+\n+#include <asm/mach-ath79/ar71xx_regs.h>\n+#include <asm/mach-ath79/ath79.h>\n+\n+#include \"common.h\"\n+#include \"dev-ap9x-pci.h\"\n+#include \"dev-eth.h\"\n+#include \"dev-leds-gpio.h\"\n+#include \"dev-m25p80.h\"\n+#include \"dev-wmac.h\"\n+#include \"machtypes.h\"\n+#include \"pci.h\"\n+\n+#define OM5PAC_GPIO_LED_POWER\t18\n+#define OM5PAC_GPIO_LED_GREEN\t21\n+#define OM5PAC_GPIO_LED_RED\t23\n+#define OM5PAC_GPIO_LED_YELLOW\t22\n+#define OM5PAC_GPIO_LED_LAN\t20\n+#define OM5PAC_GPIO_LED_WAN\t19\n+#define OM5PAC_GPIO_I2C_SCL\t12\n+#define OM5PAC_GPIO_I2C_SDA\t11\n+\n+#define OM5PAC_KEYS_POLL_INTERVAL\t20\t/* msecs */\n+#define OM5PAC_KEYS_DEBOUNCE_INTERVAL\t(3 * OM5PAC_KEYS_POLL_INTERVAL)\n+\n+#define OM5PAC_WMAC_CALDATA_OFFSET\t0x1000\n+\n+static struct gpio_led om5pac_leds_gpio[] __initdata = {\n+\t{\n+\t\t.name\t\t= \"om5pac:blue:power\",\n+\t\t.gpio\t\t= OM5PAC_GPIO_LED_POWER,\n+\t\t.active_low\t= 1,\n+\t}, {\n+\t\t.name\t\t= \"om5pac:red:wifi\",\n+\t\t.gpio\t\t= OM5PAC_GPIO_LED_RED,\n+\t\t.active_low\t= 1,\n+\t}, {\n+\t\t.name\t\t= \"om5pac:yellow:wifi\",\n+\t\t.gpio\t\t= OM5PAC_GPIO_LED_YELLOW,\n+\t\t.active_low\t= 1,\n+\t}, {\n+\t\t.name\t\t= \"om5pac:green:wifi\",\n+\t\t.gpio\t\t= OM5PAC_GPIO_LED_GREEN,\n+\t\t.active_low\t= 1,\n+\t}, {\n+\t\t.name\t\t= \"om5pac:blue:lan\",\n+\t\t.gpio\t\t= OM5PAC_GPIO_LED_LAN,\n+\t\t.active_low\t= 1,\n+\t}, {\n+\t\t.name\t\t= \"om5pac:blue:wan\",\n+\t\t.gpio\t\t= OM5PAC_GPIO_LED_WAN,\n+\t\t.active_low\t= 1,\n+\t}\n+};\n+\n+static struct flash_platform_data om5pac_flash_data = {\n+\t.type = \"mx25l12805d\",\n+};\n+\n+static struct i2c_gpio_platform_data om5pac_i2c_device_platdata = {\n+\t.sda_pin\t\t= OM5PAC_GPIO_I2C_SDA,\n+\t.scl_pin\t\t= OM5PAC_GPIO_I2C_SCL,\n+\t.udelay\t\t\t= 10,\n+\t.sda_is_open_drain\t= 1,\n+\t.scl_is_open_drain\t= 1,\n+};\n+\n+static struct platform_device om5pac_i2c_device = {\n+\t.name\t\t= \"i2c-gpio\",\n+\t.id\t\t= 0,\n+\t.dev\t\t= {\n+\t\t.platform_data\t= &om5pac_i2c_device_platdata,\n+\t},\n+};\n+\n+static struct i2c_board_info om5pac_i2c_devs[] __initdata = {\n+\t{\n+\t\tI2C_BOARD_INFO(\"tmp423\", 0x4c),\n+\t},\n+};\n+\n+static struct at803x_platform_data om5pac_at803x_data = {\n+\t.disable_smarteee = 1,\n+\t.enable_rgmii_rx_delay = 1,\n+\t.enable_rgmii_tx_delay = 1,\n+};\n+\n+static struct mdio_board_info om5pac_mdio0_info[] = {\n+\t{\n+\t\t.bus_id = \"ag71xx-mdio.0\",\n+\t\t.phy_addr = 1,\n+\t\t.platform_data = &om5pac_at803x_data,\n+\t},\n+\t{\n+\t\t.bus_id = \"ag71xx-mdio.0\",\n+\t\t.phy_addr = 2,\n+\t\t.platform_data = &om5pac_at803x_data,\n+\t},\n+};\n+\n+static void __init om5p_ac_setup_qca955x_eth_cfg(u32 mask,\n+\t\t\t\t\t\t unsigned int rxd,\n+\t\t\t\t\t\t unsigned int rxdv,\n+\t\t\t\t\t\t unsigned int txd,\n+\t\t\t\t\t\t unsigned int txe)\n+{\n+\tvoid __iomem *base;\n+\tu32 t;\n+\n+\tbase = ioremap(QCA955X_GMAC_BASE, QCA955X_GMAC_SIZE);\n+\n+\tt = mask;\n+\tt |= rxd << QCA955X_ETH_CFG_RXD_DELAY_SHIFT;\n+\tt |= rxdv << QCA955X_ETH_CFG_RDV_DELAY_SHIFT;\n+\tt |= txd << QCA955X_ETH_CFG_TXD_DELAY_SHIFT;\n+\tt |= txe << QCA955X_ETH_CFG_TXE_DELAY_SHIFT;\n+\n+\t__raw_writel(t, base + QCA955X_GMAC_REG_ETH_CFG);\n+\n+\tiounmap(base);\n+}\n+\n+static void __init om5p_ac_setup(void)\n+{\n+\tu8 *art = (u8 *)KSEG1ADDR(0x1fff0000);\n+\tu8 mac[6];\n+\n+\t/* temperature sensor */\n+\tplatform_device_register(&om5pac_i2c_device);\n+\ti2c_register_board_info(0, om5pac_i2c_devs,\n+\t\t\t\tARRAY_SIZE(om5pac_i2c_devs));\n+\n+\tath79_gpio_output_select(OM5PAC_GPIO_LED_WAN, QCA955X_GPIO_OUT_GPIO);\n+\n+\tath79_register_m25p80(&om5pac_flash_data);\n+\tath79_register_leds_gpio(-1, ARRAY_SIZE(om5pac_leds_gpio),\n+\t\t\t\t om5pac_leds_gpio);\n+\n+\tath79_init_mac(mac, art, 0x02);\n+\tath79_register_wmac(art + OM5PAC_WMAC_CALDATA_OFFSET, mac);\n+\n+\tom5p_ac_setup_qca955x_eth_cfg(QCA955X_ETH_CFG_RGMII_EN, 3, 3, 0, 0);\n+\tath79_register_mdio(0, 0x0);\n+\n+\tmdiobus_register_board_info(om5pac_mdio0_info,\n+\t\t\t\t ARRAY_SIZE(om5pac_mdio0_info));\n+\n+\tath79_init_mac(ath79_eth0_data.mac_addr, art, 0x00);\n+\tath79_init_mac(ath79_eth1_data.mac_addr, art, 0x01);\n+\n+\t/* GMAC0 is connected to the PHY1 */\n+\tath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII;\n+\tath79_eth0_data.mii_bus_dev = &ath79_mdio0_device.dev;\n+\tath79_eth0_data.phy_mask = BIT(1);\n+\tath79_eth0_pll_data.pll_1000 = 0x82000101;\n+\tath79_eth0_pll_data.pll_100 = 0x80000101;\n+\tath79_eth0_pll_data.pll_10 = 0x80001313;\n+\tath79_register_eth(0);\n+\n+\t/* GMAC1 is connected to MDIO1 in SGMII mode */\n+\tath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_SGMII;\n+\tath79_eth1_data.mii_bus_dev = &ath79_mdio0_device.dev;\n+\tath79_eth1_data.phy_mask = BIT(2);\n+\tath79_eth1_pll_data.pll_1000 = 0x03000101;\n+\tath79_eth1_pll_data.pll_100 = 0x80000101;\n+\tath79_eth1_pll_data.pll_10 = 0x80001313;\n+\tath79_eth1_data.speed = SPEED_1000;\n+\tath79_eth1_data.duplex = DUPLEX_FULL;\n+\tath79_register_eth(1);\n+\n+\tath79_register_pci();\n+}\n+\n+MIPS_MACHINE(ATH79_MACH_OM5P_AC, \"OM5P-AC\", \"OpenMesh OM5P AC\", om5p_ac_setup);\ndiff --git a/target/linux/ar71xx/patches-3.18/815-MIPS-ath79-add-om5pac-support.patch b/target/linux/ar71xx/patches-3.18/815-MIPS-ath79-add-om5pac-support.patch\nnew file mode 100644\nindex 0000000..4accd03\n--- /dev/null\n+++ b/target/linux/ar71xx/patches-3.18/815-MIPS-ath79-add-om5pac-support.patch\n@@ -0,0 +1,38 @@\n+--- a/arch/mips/ath79/Kconfig\n++++ b/arch/mips/ath79/Kconfig\n+@@ -799,6 +799,15 @@ config ATH79_MACH_OM5P\n+ \tselect ATH79_DEV_M25P80\n+ \tselect ATH79_DEV_WMAC\n+ \n++config ATH79_MACH_OM5P_AC\n++\tbool \"OpenMesh OM5P-AC board support\"\n++\tselect SOC_QCA955X\n++\tselect ATH79_DEV_AP9X_PCI if PCI\n++\tselect ATH79_DEV_ETH\n++\tselect ATH79_DEV_LEDS_GPIO\n++\tselect ATH79_DEV_M25P80\n++\tselect ATH79_DEV_WMAC\n++\n+ config ATH79_MACH_ONION_OMEGA\n+ \tbool \"ONION OMEGA support\"\n+ \tselect SOC_AR933X\n+--- a/arch/mips/ath79/Makefile\n++++ b/arch/mips/ath79/Makefile\n+@@ -100,6 +100,7 @@ obj-$(CONFIG_ATH79_MACH_MZK_W300NH)\t+= m\n+ obj-$(CONFIG_ATH79_MACH_NBG460N)\t+= mach-nbg460n.o\n+ obj-$(CONFIG_ATH79_MACH_OM2P)\t\t+= mach-om2p.o\n+ obj-$(CONFIG_ATH79_MACH_OM5P)\t\t+= mach-om5p.o\n++obj-$(CONFIG_ATH79_MACH_OM5P_AC)\t+= mach-om5pac.o\n+ obj-$(CONFIG_ATH79_MACH_ONION_OMEGA)\t+= mach-onion-omega.o\n+ obj-$(CONFIG_ATH79_MACH_PB42)\t\t+= mach-pb42.o\n+ obj-$(CONFIG_ATH79_MACH_PB44)\t\t+= mach-pb44.o\n+--- a/arch/mips/ath79/machtypes.h\n++++ b/arch/mips/ath79/machtypes.h\n+@@ -95,6 +95,7 @@ enum ath79_mach_type {\n+ \tATH79_MACH_OM2P_LC,\t\t/* OpenMesh OM2P-LC */\n+ \tATH79_MACH_OM2Pv2,\t\t/* OpenMesh OM2Pv2 */\n+ \tATH79_MACH_OM2P,\t\t/* OpenMesh OM2P */\n++\tATH79_MACH_OM5P_AC,\t\t/* OpenMesh OM5P-AC */\n+ \tATH79_MACH_OM5P_AN,\t\t/* OpenMesh OM5P-AN */\n+ \tATH79_MACH_OM5P,\t\t/* OpenMesh OM5P */\n+ \tATH79_MACH_ONION_OMEGA,\t\t/* ONION OMEGA */\n", "prefixes": [ "OpenWrt-Devel", "CC", "20/34" ] }