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GET /api/patches/618698/?format=api
{ "id": 618698, "url": "http://patchwork.ozlabs.org/api/patches/618698/?format=api", "web_url": "http://patchwork.ozlabs.org/project/intel-wired-lan/patch/20160504220127.3998.27301.stgit@localhost6.localdomain6/", "project": { "id": 46, "url": "http://patchwork.ozlabs.org/api/projects/46/?format=api", "name": "Intel Wired Ethernet development", "link_name": "intel-wired-lan", "list_id": "intel-wired-lan.osuosl.org", "list_email": "intel-wired-lan@osuosl.org", "web_url": "", "scm_url": "", "webscm_url": "", "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<20160504220127.3998.27301.stgit@localhost6.localdomain6>", "list_archive_url": null, "date": "2016-05-04T22:01:27", "name": "ixgbe: use correct mask when enabling sriov", "commit_ref": null, "pull_url": null, "state": "accepted", "archived": false, "hash": "aae1a395b85c34f551c058ff2244786562fc522d", "submitter": { "id": 1670, "url": "http://patchwork.ozlabs.org/api/people/1670/?format=api", "name": "Tantilov, Emil S", "email": "emil.s.tantilov@intel.com" }, "delegate": { "id": 68, "url": "http://patchwork.ozlabs.org/api/users/68/?format=api", "username": "jtkirshe", "first_name": "Jeff", "last_name": "Kirsher", "email": "jeffrey.t.kirsher@intel.com" }, "mbox": "http://patchwork.ozlabs.org/project/intel-wired-lan/patch/20160504220127.3998.27301.stgit@localhost6.localdomain6/mbox/", "series": [], "comments": "http://patchwork.ozlabs.org/api/patches/618698/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/618698/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<intel-wired-lan-bounces@lists.osuosl.org>", "X-Original-To": [ "incoming@patchwork.ozlabs.org", "intel-wired-lan@lists.osuosl.org" ], "Delivered-To": [ "patchwork-incoming@bilbo.ozlabs.org", "intel-wired-lan@lists.osuosl.org" ], "Received": [ "from silver.osuosl.org (smtp3.osuosl.org [140.211.166.136])\n\tby ozlabs.org (Postfix) with ESMTP id 3r0X9n2y9rz9t3v\n\tfor <incoming@patchwork.ozlabs.org>;\n\tThu, 5 May 2016 08:03:41 +1000 (AEST)", "from localhost (localhost [127.0.0.1])\n\tby silver.osuosl.org (Postfix) with ESMTP id A982F312D1;\n\tWed, 4 May 2016 22:03:40 +0000 (UTC)", "from silver.osuosl.org ([127.0.0.1])\n\tby localhost (.osuosl.org [127.0.0.1]) (amavisd-new, port 10024)\n\twith ESMTP id axcDdvxSnoMY; Wed, 4 May 2016 22:03:39 +0000 (UTC)", "from ash.osuosl.org (ash.osuosl.org [140.211.166.34])\n\tby silver.osuosl.org (Postfix) with ESMTP id BCC6130F8D;\n\tWed, 4 May 2016 22:03:39 +0000 (UTC)", "from silver.osuosl.org (smtp3.osuosl.org [140.211.166.136])\n\tby ash.osuosl.org (Postfix) with ESMTP id 05E0A1C15DD\n\tfor <intel-wired-lan@lists.osuosl.org>;\n\tWed, 4 May 2016 22:03:38 +0000 (UTC)", "from localhost (localhost [127.0.0.1])\n\tby silver.osuosl.org (Postfix) with ESMTP id F3A503120A\n\tfor <intel-wired-lan@lists.osuosl.org>;\n\tWed, 4 May 2016 22:03:37 +0000 (UTC)", "from silver.osuosl.org ([127.0.0.1])\n\tby localhost (.osuosl.org [127.0.0.1]) (amavisd-new, port 10024)\n\twith ESMTP id 8HaXGf6ZHWKg for <intel-wired-lan@lists.osuosl.org>;\n\tWed, 4 May 2016 22:03:37 +0000 (UTC)", "from mga03.intel.com (mga03.intel.com [134.134.136.65])\n\tby silver.osuosl.org (Postfix) with ESMTP id 0273A30F8D\n\tfor <intel-wired-lan@lists.osuosl.org>;\n\tWed, 4 May 2016 22:03:36 +0000 (UTC)", "from orsmga002.jf.intel.com ([10.7.209.21])\n\tby orsmga103.jf.intel.com with ESMTP; 04 May 2016 15:03:09 -0700", "from estantil-desk3.jf.intel.com (HELO localhost6.localdomain6)\n\t([134.134.3.186])\n\tby orsmga002.jf.intel.com with ESMTP; 04 May 2016 15:03:09 -0700" ], "X-Virus-Scanned": [ "amavisd-new at osuosl.org", "amavisd-new at osuosl.org" ], "X-Greylist": "domain auto-whitelisted by SQLgrey-1.7.6", "X-ExtLoop1": "1", "X-IronPort-AV": "E=Sophos;i=\"5.24,579,1455004800\"; d=\"scan'208\";a=\"968900585\"", "From": "Emil Tantilov <emil.s.tantilov@intel.com>", "To": "intel-wired-lan@lists.osuosl.org", "Date": "Wed, 04 May 2016 15:01:27 -0700", "Message-ID": "<20160504220127.3998.27301.stgit@localhost6.localdomain6>", "User-Agent": "StGit/0.17.1-17-ge4e0", "MIME-Version": "1.0", "Subject": "[Intel-wired-lan] [PATCH] ixgbe: use correct mask when enabling\n\tsriov", "X-BeenThere": "intel-wired-lan@lists.osuosl.org", "X-Mailman-Version": "2.1.18-1", "Precedence": "list", "List-Id": "Intel Wired Ethernet Linux Kernel Driver Development\n\t<intel-wired-lan.lists.osuosl.org>", "List-Unsubscribe": "<http://lists.osuosl.org/mailman/options/intel-wired-lan>, \n\t<mailto:intel-wired-lan-request@lists.osuosl.org?subject=unsubscribe>", "List-Archive": "<http://lists.osuosl.org/pipermail/intel-wired-lan/>", "List-Post": "<mailto:intel-wired-lan@lists.osuosl.org>", "List-Help": "<mailto:intel-wired-lan-request@lists.osuosl.org?subject=help>", "List-Subscribe": "<http://lists.osuosl.org/mailman/listinfo/intel-wired-lan>, \n\t<mailto:intel-wired-lan-request@lists.osuosl.org?subject=subscribe>", "Content-Type": "text/plain; charset=\"us-ascii\"", "Content-Transfer-Encoding": "7bit", "Errors-To": "intel-wired-lan-bounces@lists.osuosl.org", "Sender": "\"Intel-wired-lan\" <intel-wired-lan-bounces@lists.osuosl.org>" }, "content": "Swap the parameters in GENMASK in order to generate the correct mask.\n\nThis change fixes Tx hangs when enabling SRIOV.\n\nSigned-off-by: Emil Tantilov <emil.s.tantilov@intel.com>\n---\n drivers/net/ethernet/intel/ixgbe/ixgbe_main.c | 4 ++--\n 1 file changed, 2 insertions(+), 2 deletions(-)", "diff": "diff --git a/drivers/net/ethernet/intel/ixgbe/ixgbe_main.c b/drivers/net/ethernet/intel/ixgbe/ixgbe_main.c\nindex c965b60..311910b 100644\n--- a/drivers/net/ethernet/intel/ixgbe/ixgbe_main.c\n+++ b/drivers/net/ethernet/intel/ixgbe/ixgbe_main.c\n@@ -3767,9 +3767,9 @@ static void ixgbe_configure_virtualization(struct ixgbe_adapter *adapter)\n \treg_offset = (VMDQ_P(0) >= 32) ? 1 : 0;\n \n \t/* Enable only the PF's pool for Tx/Rx */\n-\tIXGBE_WRITE_REG(hw, IXGBE_VFRE(reg_offset), GENMASK(vf_shift, 31));\n+\tIXGBE_WRITE_REG(hw, IXGBE_VFRE(reg_offset), GENMASK(31, vf_shift));\n \tIXGBE_WRITE_REG(hw, IXGBE_VFRE(reg_offset ^ 1), reg_offset - 1);\n-\tIXGBE_WRITE_REG(hw, IXGBE_VFTE(reg_offset), GENMASK(vf_shift, 31));\n+\tIXGBE_WRITE_REG(hw, IXGBE_VFTE(reg_offset), GENMASK(31, vf_shift));\n \tIXGBE_WRITE_REG(hw, IXGBE_VFTE(reg_offset ^ 1), reg_offset - 1);\n \tif (adapter->bridge_mode == BRIDGE_MODE_VEB)\n \t\tIXGBE_WRITE_REG(hw, IXGBE_PFDTXGSWC, IXGBE_PFDTXGSWC_VT_LBEN);\n", "prefixes": [] }