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GET /api/patches/615115/?format=api
{ "id": 615115, "url": "http://patchwork.ozlabs.org/api/patches/615115/?format=api", "web_url": "http://patchwork.ozlabs.org/project/intel-wired-lan/patch/20160426120026.8106.64120.stgit@ukketine.jf.intel.com/", "project": { "id": 46, "url": "http://patchwork.ozlabs.org/api/projects/46/?format=api", "name": "Intel Wired Ethernet development", "link_name": "intel-wired-lan", "list_id": "intel-wired-lan.osuosl.org", "list_email": "intel-wired-lan@osuosl.org", "web_url": "", "scm_url": "", "webscm_url": "", "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<20160426120026.8106.64120.stgit@ukketine.jf.intel.com>", "list_archive_url": null, "date": "2016-04-26T12:00:26", "name": "ixgbe: Disable DCB and FCoE for X550EM_x and x550em_a", "commit_ref": null, "pull_url": null, "state": "accepted", "archived": false, "hash": "5911461b063545ee24394960d2db140382f68c3b", "submitter": { "id": 67830, "url": "http://patchwork.ozlabs.org/api/people/67830/?format=api", "name": "Usha Ketineni", "email": "usha.k.ketineni@intel.com" }, "delegate": { "id": 68, "url": "http://patchwork.ozlabs.org/api/users/68/?format=api", "username": "jtkirshe", "first_name": "Jeff", "last_name": "Kirsher", "email": "jeffrey.t.kirsher@intel.com" }, "mbox": "http://patchwork.ozlabs.org/project/intel-wired-lan/patch/20160426120026.8106.64120.stgit@ukketine.jf.intel.com/mbox/", "series": [], "comments": "http://patchwork.ozlabs.org/api/patches/615115/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/615115/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<intel-wired-lan-bounces@lists.osuosl.org>", "X-Original-To": [ "incoming@patchwork.ozlabs.org", "intel-wired-lan@lists.osuosl.org" ], "Delivered-To": [ "patchwork-incoming@bilbo.ozlabs.org", "intel-wired-lan@lists.osuosl.org" ], "Received": [ "from fraxinus.osuosl.org (smtp4.osuosl.org [140.211.166.137])\n\tby ozlabs.org (Postfix) with ESMTP id 3qvXBt2SXpz9t3q\n\tfor <incoming@patchwork.ozlabs.org>;\n\tWed, 27 Apr 2016 04:47:18 +1000 (AEST)", "from localhost (localhost [127.0.0.1])\n\tby fraxinus.osuosl.org (Postfix) with ESMTP id 4241E87581;\n\tTue, 26 Apr 2016 18:47:17 +0000 (UTC)", "from fraxinus.osuosl.org ([127.0.0.1])\n\tby localhost (.osuosl.org [127.0.0.1]) (amavisd-new, port 10024)\n\twith ESMTP id sNXCsdvoykbQ; Tue, 26 Apr 2016 18:47:13 +0000 (UTC)", "from ash.osuosl.org (ash.osuosl.org [140.211.166.34])\n\tby fraxinus.osuosl.org (Postfix) with ESMTP id BAB648714B;\n\tTue, 26 Apr 2016 18:47:13 +0000 (UTC)", "from silver.osuosl.org (smtp3.osuosl.org [140.211.166.136])\n\tby ash.osuosl.org (Postfix) with ESMTP id CC93F1C120C\n\tfor <intel-wired-lan@lists.osuosl.org>;\n\tTue, 26 Apr 2016 18:47:12 +0000 (UTC)", "from localhost (localhost [127.0.0.1])\n\tby silver.osuosl.org (Postfix) with ESMTP id C466030994\n\tfor <intel-wired-lan@lists.osuosl.org>;\n\tTue, 26 Apr 2016 18:47:12 +0000 (UTC)", "from silver.osuosl.org ([127.0.0.1])\n\tby localhost (.osuosl.org [127.0.0.1]) (amavisd-new, port 10024)\n\twith ESMTP id Ge0Td8QtxE7R for <intel-wired-lan@lists.osuosl.org>;\n\tTue, 26 Apr 2016 18:47:11 +0000 (UTC)", "from mga11.intel.com (mga11.intel.com [192.55.52.93])\n\tby silver.osuosl.org (Postfix) with ESMTP id F010126EAF\n\tfor <intel-wired-lan@lists.osuosl.org>;\n\tTue, 26 Apr 2016 18:47:10 +0000 (UTC)", "from fmsmga004.fm.intel.com ([10.253.24.48])\n\tby fmsmga102.fm.intel.com with ESMTP; 26 Apr 2016 11:47:11 -0700", "from ukketine.jf.intel.com ([134.134.173.52])\n\tby fmsmga004.fm.intel.com with ESMTP; 26 Apr 2016 11:47:10 -0700" ], "X-Virus-Scanned": [ "amavisd-new at osuosl.org", "amavisd-new at osuosl.org" ], "X-Greylist": "domain auto-whitelisted by SQLgrey-1.7.6", "X-ExtLoop1": "1", "X-IronPort-AV": "E=Sophos;i=\"5.24,537,1455004800\"; d=\"scan'208\";a=\"92374532\"", "From": "Usha Ketineni <usha.k.ketineni@intel.com>", "To": "intel-wired-lan@lists.osuosl.org", "Date": "Tue, 26 Apr 2016 05:00:26 -0700", "Message-ID": "<20160426120026.8106.64120.stgit@ukketine.jf.intel.com>", "User-Agent": "StGit/0.17.1-dirty", "MIME-Version": "1.0", "Subject": "[Intel-wired-lan] [PATCH] ixgbe: Disable DCB and FCoE for X550EM_x\n\tand x550em_a", "X-BeenThere": "intel-wired-lan@lists.osuosl.org", "X-Mailman-Version": "2.1.18-1", "Precedence": "list", "List-Id": "Intel Wired Ethernet Linux Kernel Driver Development\n\t<intel-wired-lan.lists.osuosl.org>", "List-Unsubscribe": "<http://lists.osuosl.org/mailman/options/intel-wired-lan>, \n\t<mailto:intel-wired-lan-request@lists.osuosl.org?subject=unsubscribe>", "List-Archive": "<http://lists.osuosl.org/pipermail/intel-wired-lan/>", "List-Post": "<mailto:intel-wired-lan@lists.osuosl.org>", "List-Help": "<mailto:intel-wired-lan-request@lists.osuosl.org?subject=help>", "List-Subscribe": "<http://lists.osuosl.org/mailman/listinfo/intel-wired-lan>, \n\t<mailto:intel-wired-lan-request@lists.osuosl.org?subject=subscribe>", "Content-Type": "text/plain; charset=\"us-ascii\"", "Content-Transfer-Encoding": "7bit", "Errors-To": "intel-wired-lan-bounces@lists.osuosl.org", "Sender": "\"Intel-wired-lan\" <intel-wired-lan-bounces@lists.osuosl.org>" }, "content": "This patch adds IXGBE_FLAG_DCB_CAPABLE flag that is set\nfor all MACs other than X550EM_x and x550em_a. DCB and\nFCoE is disabled for these MACS. DCB initialization\ncode is moved to a seperate function.\n\nSigned-off-by: Usha Ketineni <usha.k.ketineni@intel.com>\n---\n drivers/net/ethernet/intel/ixgbe/ixgbe.h | 1 \n drivers/net/ethernet/intel/ixgbe/ixgbe_main.c | 111 ++++++++++++++++---------\n drivers/net/ethernet/intel/ixgbe/ixgbe_type.h | 1 \n 3 files changed, 71 insertions(+), 42 deletions(-)", "diff": "diff --git a/drivers/net/ethernet/intel/ixgbe/ixgbe.h b/drivers/net/ethernet/intel/ixgbe/ixgbe.h\nindex 781c878..874e968 100644\n--- a/drivers/net/ethernet/intel/ixgbe/ixgbe.h\n+++ b/drivers/net/ethernet/intel/ixgbe/ixgbe.h\n@@ -644,6 +644,7 @@ struct ixgbe_adapter {\n #define IXGBE_FLAG_VXLAN_OFFLOAD_CAPABLE\tBIT(24)\n #define IXGBE_FLAG_RX_HWTSTAMP_ENABLED\t\tBIT(25)\n #define IXGBE_FLAG_RX_HWTSTAMP_IN_REGISTER\tBIT(26)\n+#define IXGBE_FLAG_DCB_CAPABLE\t\t\tBIT(27)\n \n \tu32 flags2;\n #define IXGBE_FLAG2_RSC_CAPABLE\t\t\tBIT(0)\ndiff --git a/drivers/net/ethernet/intel/ixgbe/ixgbe_main.c b/drivers/net/ethernet/intel/ixgbe/ixgbe_main.c\nindex 0ef4a15..6467ec0 100644\n--- a/drivers/net/ethernet/intel/ixgbe/ixgbe_main.c\n+++ b/drivers/net/ethernet/intel/ixgbe/ixgbe_main.c\n@@ -5558,6 +5558,58 @@ static void ixgbe_tx_timeout(struct net_device *netdev)\n \tixgbe_tx_timeout_reset(adapter);\n }\n \n+#ifdef CONFIG_IXGBE_DCB\n+static void ixgbe_init_dcb(struct ixgbe_adapter *adapter)\n+{\n+\tstruct ixgbe_hw *hw = &adapter->hw;\n+\tstruct tc_configuration *tc;\n+\tint j;\n+\n+\tswitch (hw->mac.type) {\n+\tcase ixgbe_mac_82598EB:\n+\tcase ixgbe_mac_82599EB:\n+\t\tadapter->dcb_cfg.num_tcs.pg_tcs = MAX_TRAFFIC_CLASS;\n+\t\tadapter->dcb_cfg.num_tcs.pfc_tcs = MAX_TRAFFIC_CLASS;\n+\t\tbreak;\n+\tcase ixgbe_mac_X540:\n+\tcase ixgbe_mac_X550:\n+\t\tadapter->dcb_cfg.num_tcs.pg_tcs = X540_TRAFFIC_CLASS;\n+\t\tadapter->dcb_cfg.num_tcs.pfc_tcs = X540_TRAFFIC_CLASS;\n+\t\tbreak;\n+\tcase ixgbe_mac_X550EM_x:\n+\tcase ixgbe_mac_x550em_a:\n+\tdefault:\n+\t\tadapter->dcb_cfg.num_tcs.pg_tcs = DEF_TRAFFIC_CLASS;\n+\t\tadapter->dcb_cfg.num_tcs.pfc_tcs = DEF_TRAFFIC_CLASS;\n+\t\tbreak;\n+\t}\n+\n+\t/* Configure DCB traffic classes */\n+\tfor (j = 0; j < MAX_TRAFFIC_CLASS; j++) {\n+\t\ttc = &adapter->dcb_cfg.tc_config[j];\n+\t\ttc->path[DCB_TX_CONFIG].bwg_id = 0;\n+\t\ttc->path[DCB_TX_CONFIG].bwg_percent = 12 + (j & 1);\n+\t\ttc->path[DCB_RX_CONFIG].bwg_id = 0;\n+\t\ttc->path[DCB_RX_CONFIG].bwg_percent = 12 + (j & 1);\n+\t\ttc->dcb_pfc = pfc_disabled;\n+\t}\n+\n+\t/* Initialize default user to priority mapping, UPx->TC0 */\n+\ttc = &adapter->dcb_cfg.tc_config[0];\n+\ttc->path[DCB_TX_CONFIG].up_to_tc_bitmap = 0xFF;\n+\ttc->path[DCB_RX_CONFIG].up_to_tc_bitmap = 0xFF;\n+\n+\tadapter->dcb_cfg.bw_percentage[DCB_TX_CONFIG][0] = 100;\n+\tadapter->dcb_cfg.bw_percentage[DCB_RX_CONFIG][0] = 100;\n+\tadapter->dcb_cfg.pfc_mode_enable = false;\n+\tadapter->dcb_set_bitmap = 0x00;\n+\tif (adapter->flags & IXGBE_FLAG_DCB_CAPABLE)\n+\t\tadapter->dcbx_cap = DCB_CAP_DCBX_HOST | DCB_CAP_DCBX_VER_CEE;\n+\tmemcpy(&adapter->temp_dcb_cfg, &adapter->dcb_cfg,\n+\t sizeof(adapter->temp_dcb_cfg));\n+}\n+#endif\n+\n /**\n * ixgbe_sw_init - Initialize general software structures (struct ixgbe_adapter)\n * @adapter: board private structure to initialize\n@@ -5573,10 +5625,6 @@ static int ixgbe_sw_init(struct ixgbe_adapter *adapter)\n \tunsigned int rss, fdir;\n \tu32 fwsm;\n \tu16 device_caps;\n-#ifdef CONFIG_IXGBE_DCB\n-\tint j;\n-\tstruct tc_configuration *tc;\n-#endif\n \n \t/* PCI config space info */\n \n@@ -5598,6 +5646,10 @@ static int ixgbe_sw_init(struct ixgbe_adapter *adapter)\n #ifdef CONFIG_IXGBE_DCA\n \tadapter->flags |= IXGBE_FLAG_DCA_CAPABLE;\n #endif\n+#ifdef CONFIG_IXGBE_DCB\n+\tadapter->flags |= IXGBE_FLAG_DCB_CAPABLE;\n+\tadapter->flags &= ~IXGBE_FLAG_DCB_ENABLED;\n+#endif\n #ifdef IXGBE_FCOE\n \tadapter->flags |= IXGBE_FLAG_FCOE_CAPABLE;\n \tadapter->flags &= ~IXGBE_FLAG_FCOE_ENABLED;\n@@ -5647,6 +5699,16 @@ static int ixgbe_sw_init(struct ixgbe_adapter *adapter)\n \t\tbreak;\n \tcase ixgbe_mac_X550EM_x:\n \tcase ixgbe_mac_x550em_a:\n+#ifdef CONFIG_IXGBE_DCB\n+\t\tadapter->flags &= ~IXGBE_FLAG_DCB_CAPABLE;\n+#endif\n+#ifdef IXGBE_FCOE\n+\t\tadapter->flags &= ~IXGBE_FLAG_FCOE_CAPABLE;\n+#ifdef CONFIG_IXGBE_DCB\n+\t\tadapter->fcoe.up = 0;\n+#endif /* IXGBE_DCB */\n+#endif /* IXGBE_FCOE */\n+\t/* Fall Through */\n \tcase ixgbe_mac_X550:\n #ifdef CONFIG_IXGBE_DCA\n \t\tadapter->flags &= ~IXGBE_FLAG_DCA_CAPABLE;\n@@ -5668,43 +5730,7 @@ static int ixgbe_sw_init(struct ixgbe_adapter *adapter)\n \tspin_lock_init(&adapter->fdir_perfect_lock);\n \n #ifdef CONFIG_IXGBE_DCB\n-\tswitch (hw->mac.type) {\n-\tcase ixgbe_mac_X540:\n-\tcase ixgbe_mac_X550:\n-\tcase ixgbe_mac_X550EM_x:\n-\tcase ixgbe_mac_x550em_a:\n-\t\tadapter->dcb_cfg.num_tcs.pg_tcs = X540_TRAFFIC_CLASS;\n-\t\tadapter->dcb_cfg.num_tcs.pfc_tcs = X540_TRAFFIC_CLASS;\n-\t\tbreak;\n-\tdefault:\n-\t\tadapter->dcb_cfg.num_tcs.pg_tcs = MAX_TRAFFIC_CLASS;\n-\t\tadapter->dcb_cfg.num_tcs.pfc_tcs = MAX_TRAFFIC_CLASS;\n-\t\tbreak;\n-\t}\n-\n-\t/* Configure DCB traffic classes */\n-\tfor (j = 0; j < MAX_TRAFFIC_CLASS; j++) {\n-\t\ttc = &adapter->dcb_cfg.tc_config[j];\n-\t\ttc->path[DCB_TX_CONFIG].bwg_id = 0;\n-\t\ttc->path[DCB_TX_CONFIG].bwg_percent = 12 + (j & 1);\n-\t\ttc->path[DCB_RX_CONFIG].bwg_id = 0;\n-\t\ttc->path[DCB_RX_CONFIG].bwg_percent = 12 + (j & 1);\n-\t\ttc->dcb_pfc = pfc_disabled;\n-\t}\n-\n-\t/* Initialize default user to priority mapping, UPx->TC0 */\n-\ttc = &adapter->dcb_cfg.tc_config[0];\n-\ttc->path[DCB_TX_CONFIG].up_to_tc_bitmap = 0xFF;\n-\ttc->path[DCB_RX_CONFIG].up_to_tc_bitmap = 0xFF;\n-\n-\tadapter->dcb_cfg.bw_percentage[DCB_TX_CONFIG][0] = 100;\n-\tadapter->dcb_cfg.bw_percentage[DCB_RX_CONFIG][0] = 100;\n-\tadapter->dcb_cfg.pfc_mode_enable = false;\n-\tadapter->dcb_set_bitmap = 0x00;\n-\tadapter->dcbx_cap = DCB_CAP_DCBX_HOST | DCB_CAP_DCBX_VER_CEE;\n-\tmemcpy(&adapter->temp_dcb_cfg, &adapter->dcb_cfg,\n-\t sizeof(adapter->temp_dcb_cfg));\n-\n+\tixgbe_init_dcb(adapter);\n #endif\n \n \t/* default flow control settings */\n@@ -9352,7 +9378,8 @@ skip_sriov:\n \tnetdev->priv_flags |= IFF_SUPP_NOFCS;\n \n #ifdef CONFIG_IXGBE_DCB\n-\tnetdev->dcbnl_ops = &dcbnl_ops;\n+\tif (adapter->flags & IXGBE_FLAG_DCB_CAPABLE)\n+\t\tnetdev->dcbnl_ops = &dcbnl_ops;\n #endif\n \n #ifdef IXGBE_FCOE\ndiff --git a/drivers/net/ethernet/intel/ixgbe/ixgbe_type.h b/drivers/net/ethernet/intel/ixgbe/ixgbe_type.h\nindex 7af4514..44b256a 100644\n--- a/drivers/net/ethernet/intel/ixgbe/ixgbe_type.h\n+++ b/drivers/net/ethernet/intel/ixgbe/ixgbe_type.h\n@@ -548,6 +548,7 @@ struct ixgbe_thermal_sensor_data {\n /* DCB registers */\n #define MAX_TRAFFIC_CLASS 8\n #define X540_TRAFFIC_CLASS 4\n+#define DEF_TRAFFIC_CLASS 1\n #define IXGBE_RMCS 0x03D00\n #define IXGBE_DPMCS 0x07F40\n #define IXGBE_PDPMCS 0x0CD00\n", "prefixes": [] }