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GET /api/patches/613277/?format=api
{ "id": 613277, "url": "http://patchwork.ozlabs.org/api/patches/613277/?format=api", "web_url": "http://patchwork.ozlabs.org/project/intel-wired-lan/patch/20160421182851.13330.71861.stgit@ixgbe-dev.jf.intel.com/", "project": { "id": 46, "url": "http://patchwork.ozlabs.org/api/projects/46/?format=api", "name": "Intel Wired Ethernet development", "link_name": "intel-wired-lan", "list_id": "intel-wired-lan.osuosl.org", "list_email": "intel-wired-lan@osuosl.org", "web_url": "", "scm_url": "", "webscm_url": "", "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<20160421182851.13330.71861.stgit@ixgbe-dev.jf.intel.com>", "list_archive_url": null, "date": "2016-04-21T18:28:51", "name": "[2/3] ethtool/ixgbe: Correct offsets and support x550, x550em_x, x550em_a", "commit_ref": null, "pull_url": null, "state": "accepted", "archived": false, "hash": "b7ac8782e64cb4d93dab9e27e8370a0bce27193c", "submitter": { "id": 68833, "url": "http://patchwork.ozlabs.org/api/people/68833/?format=api", "name": "Preethi Banala", "email": "preethi.banala@intel.com" }, "delegate": { "id": 68, "url": "http://patchwork.ozlabs.org/api/users/68/?format=api", "username": "jtkirshe", "first_name": "Jeff", "last_name": "Kirsher", "email": "jeffrey.t.kirsher@intel.com" }, "mbox": "http://patchwork.ozlabs.org/project/intel-wired-lan/patch/20160421182851.13330.71861.stgit@ixgbe-dev.jf.intel.com/mbox/", "series": [], "comments": "http://patchwork.ozlabs.org/api/patches/613277/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/613277/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<intel-wired-lan-bounces@lists.osuosl.org>", "X-Original-To": [ "incoming@patchwork.ozlabs.org", "intel-wired-lan@lists.osuosl.org" ], "Delivered-To": [ "patchwork-incoming@bilbo.ozlabs.org", "intel-wired-lan@lists.osuosl.org" ], "Received": [ "from hemlock.osuosl.org (smtp2.osuosl.org [140.211.166.133])\n\tby ozlabs.org (Postfix) with ESMTP id 3qrSL730DFz9sf9\n\tfor <incoming@patchwork.ozlabs.org>;\n\tFri, 22 Apr 2016 04:42:55 +1000 (AEST)", "from localhost (localhost [127.0.0.1])\n\tby hemlock.osuosl.org (Postfix) with ESMTP id A36A4963FE;\n\tThu, 21 Apr 2016 18:42:54 +0000 (UTC)", "from hemlock.osuosl.org ([127.0.0.1])\n\tby localhost (.osuosl.org [127.0.0.1]) (amavisd-new, port 10024)\n\twith ESMTP id L4RYLhdi+qAj; Thu, 21 Apr 2016 18:42:54 +0000 (UTC)", "from ash.osuosl.org (ash.osuosl.org [140.211.166.34])\n\tby hemlock.osuosl.org (Postfix) with ESMTP id F3DAA95D72;\n\tThu, 21 Apr 2016 18:42:53 +0000 (UTC)", "from whitealder.osuosl.org (smtp1.osuosl.org [140.211.166.138])\n\tby ash.osuosl.org (Postfix) with ESMTP id 4AB111C1064\n\tfor <intel-wired-lan@lists.osuosl.org>;\n\tThu, 21 Apr 2016 18:42:53 +0000 (UTC)", "from localhost (localhost [127.0.0.1])\n\tby whitealder.osuosl.org (Postfix) with ESMTP id 6856892394\n\tfor <intel-wired-lan@lists.osuosl.org>;\n\tThu, 21 Apr 2016 18:42:51 +0000 (UTC)", "from whitealder.osuosl.org ([127.0.0.1])\n\tby localhost (.osuosl.org [127.0.0.1]) (amavisd-new, port 10024)\n\twith ESMTP id cRgLeR2eUFcO for <intel-wired-lan@lists.osuosl.org>;\n\tThu, 21 Apr 2016 18:42:49 +0000 (UTC)", "from mga03.intel.com (mga03.intel.com [134.134.136.65])\n\tby whitealder.osuosl.org (Postfix) with ESMTP id ACDC59231E\n\tfor <intel-wired-lan@lists.osuosl.org>;\n\tThu, 21 Apr 2016 18:42:49 +0000 (UTC)", "from fmsmga004.fm.intel.com ([10.253.24.48])\n\tby orsmga103.jf.intel.com with ESMTP; 21 Apr 2016 11:42:22 -0700", "from ixgbe-dev.jf.intel.com ([134.134.170.149])\n\tby fmsmga004.fm.intel.com with ESMTP; 21 Apr 2016 11:42:22 -0700" ], "X-Virus-Scanned": [ "amavisd-new at osuosl.org", "amavisd-new at osuosl.org" ], "X-Greylist": "domain auto-whitelisted by SQLgrey-1.7.6", "X-ExtLoop1": "1", "X-IronPort-AV": "E=Sophos;i=\"5.24,513,1455004800\"; d=\"scan'208\";a=\"89507588\"", "From": "Preethi Banala <preethi.banala@intel.com>", "To": "intel-wired-lan@lists.osuosl.org", "Date": "Thu, 21 Apr 2016 11:28:51 -0700", "Message-ID": "<20160421182851.13330.71861.stgit@ixgbe-dev.jf.intel.com>", "In-Reply-To": "<20160421182545.13330.59497.stgit@ixgbe-dev.jf.intel.com>", "References": "<20160421182545.13330.59497.stgit@ixgbe-dev.jf.intel.com>", "User-Agent": "StGit/0.17.1-dirty", "MIME-Version": "1.0", "Subject": "[Intel-wired-lan] [PATCH 2/3] ethtool/ixgbe: Correct offsets and\n\tsupport x550, x550em_x, x550em_a", "X-BeenThere": "intel-wired-lan@lists.osuosl.org", "X-Mailman-Version": "2.1.18-1", "Precedence": "list", "List-Id": "Intel Wired Ethernet Linux Kernel Driver Development\n\t<intel-wired-lan.lists.osuosl.org>", "List-Unsubscribe": "<http://lists.osuosl.org/mailman/options/intel-wired-lan>, \n\t<mailto:intel-wired-lan-request@lists.osuosl.org?subject=unsubscribe>", "List-Archive": "<http://lists.osuosl.org/pipermail/intel-wired-lan/>", "List-Post": "<mailto:intel-wired-lan@lists.osuosl.org>", "List-Help": "<mailto:intel-wired-lan-request@lists.osuosl.org?subject=help>", "List-Subscribe": "<http://lists.osuosl.org/mailman/listinfo/intel-wired-lan>, \n\t<mailto:intel-wired-lan-request@lists.osuosl.org?subject=subscribe>", "Content-Type": "text/plain; charset=\"us-ascii\"", "Content-Transfer-Encoding": "7bit", "Errors-To": "intel-wired-lan-bounces@lists.osuosl.org", "Sender": "\"Intel-wired-lan\" <intel-wired-lan-bounces@lists.osuosl.org>" }, "content": "Correct hard-coded wrong offset values and add several conditions to\ndisplay registers for x550, x550em_x and x550em_a based on datasheet/\nEAS document.\n\nSigned-off-by: Preethi Banala <preethi.banala@intel.com>\n---\n ixgbe.c | 74 +++++++++++++++++++++++++++++++++++----------------------------\n 1 file changed, 41 insertions(+), 33 deletions(-)", "diff": "diff --git a/ixgbe.c b/ixgbe.c\nindex a3757824e61a..4f5af779f763 100644\n--- a/ixgbe.c\n+++ b/ixgbe.c\n@@ -173,6 +173,7 @@ ixgbe_dump_regs(struct ethtool_drvinfo *info, struct ethtool_regs *regs)\n \tu32 *regs_buff = (u32 *)regs->data;\n \tu32 regs_buff_len = regs->len / sizeof(*regs_buff);\n \tu32 reg;\n+\tu32 offset;\n \tu16 hw_device_id = (u16) regs->version;\n \tu8 version = (u8)(regs->version >> 24);\n \tu8 i;\n@@ -273,7 +274,7 @@ ixgbe_dump_regs(struct ethtool_drvinfo *info, struct ethtool_regs *regs)\n \n \treg = regs_buff[1047];\n \tfprintf(stdout,\n-\t\"0x04250: HLREG0 (Highlander Control 0 register) 0x%08X\\n\"\n+\t\"0x04240: HLREG0 (Highlander Control 0 register) 0x%08X\\n\"\n \t\" Transmit CRC: %s\\n\"\n \t\" Receive CRC Strip: %s\\n\"\n \t\" Jumbo Frames: %s\\n\"\n@@ -320,17 +321,19 @@ ixgbe_dump_regs(struct ethtool_drvinfo *info, struct ethtool_regs *regs)\n \t\tregs_buff[7]);\n \n \t/* NVM Register */\n+\toffset = mac_type == ixgbe_mac_x550em_a ? 0x15FF8 : 0x10010;\n \tfprintf(stdout,\n-\t\t\"0x10010: EEC (EEPROM/Flash Control) 0x%08X\\n\",\n-\t\tregs_buff[8]);\n+\t\t\"0x%05X: EEC (EEPROM/Flash Control) 0x%08X\\n\",\n+\t\toffset, regs_buff[8]);\n \n \tfprintf(stdout,\n \t\t\"0x10014: EERD (EEPROM Read) 0x%08X\\n\",\n \t\tregs_buff[9]);\n \n+\toffset = mac_type == ixgbe_mac_x550em_a ? 0x15F6C : 0x1001C;\n \tfprintf(stdout,\n-\t\t\"0x1001C: FLA (Flash Access) 0x%08X\\n\",\n-\t\tregs_buff[10]);\n+\t\t\"0x%05X: FLA (Flash Access) 0x%08X\\n\",\n+\t\toffset, regs_buff[10]);\n \n \tfprintf(stdout,\n \t\t\"0x10110: EEMNGCTL (Manageability EEPROM Control) 0x%08X\\n\",\n@@ -341,7 +344,7 @@ ixgbe_dump_regs(struct ethtool_drvinfo *info, struct ethtool_regs *regs)\n \t\tregs_buff[12]);\n \n \tfprintf(stdout,\n-\t\t\"0x10110: FLMNGCTL (Manageability Flash Control) 0x%08X\\n\",\n+\t\t\"0x10118: FLMNGCTL (Manageability Flash Control) 0x%08X\\n\",\n \t\tregs_buff[13]);\n \n \tfprintf(stdout,\n@@ -356,9 +359,10 @@ ixgbe_dump_regs(struct ethtool_drvinfo *info, struct ethtool_regs *regs)\n \t\t\"0x1013C: FLOP (Flash Opcode) 0x%08X\\n\",\n \t\tregs_buff[16]);\n \n+\toffset = mac_type == ixgbe_mac_x550em_a ? 0x15F64 : 0x10200;\n \tfprintf(stdout,\n-\t\t\"0x10200: GRC (General Receive Control) 0x%08X\\n\",\n-\t\tregs_buff[17]);\n+\t\t\"0x%05X: GRC (General Receive Control) 0x%08X\\n\",\n+\t\toffset, regs_buff[17]);\n \n \t/* Interrupt */\n \tfprintf(stdout,\n@@ -690,7 +694,7 @@ ixgbe_dump_regs(struct ethtool_drvinfo *info, struct ethtool_regs *regs)\n \t\t\tfprintf(stdout,\n \t\t\t\"0x%05X: TDPT2TCSR%d (Tx Data Plane T2 TC Status %d) 0x%08X\\n\",\n \t\t\t0x0CD40 + (4 * i), i, i, regs_buff[873 + i]);\n-\t} else if (mac_type >= ixgbe_mac_82599EB) {\n+\t} else if (mac_type >= ixgbe_mac_82599EB && mac_type <= ixgbe_mac_x550) {\n \t\tfprintf(stdout,\n \t\t\t\"0x04900: RTTDCS (Tx Descr Plane Ctrl&Status) 0x%08X\\n\",\n \t\t\tregs_buff[830]);\n@@ -718,60 +722,64 @@ ixgbe_dump_regs(struct ethtool_drvinfo *info, struct ethtool_regs *regs)\n \t\t\t\"0x%05X: RTTDT2C%d (Tx Descr Plane T2 Config %d) 0x%08X\\n\",\n \t\t\t0x04910 + (4 * i), i, i, regs_buff[849 + i]);\n \n-\t\tfor (i = 0; i < 8; i++)\n-\t\t\tfprintf(stdout,\n-\t\t\t\"0x%05X: RTTDT2S%d (Tx Descr Plane T2 Status %d) 0x%08X\\n\",\n-\t\t\t0x04930 + (4 * i), i, i, regs_buff[857 + i]);\n+\t\tif (mac_type < ixgbe_mac_x550)\n+\t\t\tfor (i = 0; i < 8; i++)\n+\t\t\t\tfprintf(stdout,\n+\t\t\t\t\t\"0x%05X: RTTDT2S%d (Tx Descr Plane T2 Status %d) 0x%08X\\n\",\n+\t\t\t\t\t0x04930 + (4 * i), i, i, regs_buff[857 + i]);\n \n \t\tfor (i = 0; i < 8; i++)\n \t\t\tfprintf(stdout,\n \t\t\t\"0x%05X: RTTPT2C%d (Tx Packet Plane T2 Config %d) 0x%08X\\n\",\n \t\t\t0x0CD20 + (4 * i), i, i, regs_buff[865]);\n \n-\t\tfor (i = 0; i < 8; i++)\n-\t\t\tfprintf(stdout,\n-\t\t\t\"0x%05X: RTTPT2S%d (Tx Packet Plane T2 Status %d) 0x%08X\\n\",\n-\t\t\t0x0CD40 + (4 * i), i, i, regs_buff[873 + i]);\n+\t\tif (mac_type < ixgbe_mac_x550)\n+\t\t\tfor (i = 0; i < 8; i++)\n+\t\t\t\tfprintf(stdout,\n+\t\t\t\t\t\"0x%05X: RTTPT2S%d (Tx Packet Plane T2 Status %d) 0x%08X\\n\",\n+\t\t\t\t\t0x0CD40 + (4 * i), i, i, regs_buff[873 + i]);\n+\t}\n \n-\t\tif (regs_buff_len > 1129) {\n-\t\t\tfprintf(stdout,\n+\tif (regs_buff_len > 1129 && mac_type != ixgbe_mac_82598EB) {\n+\t\tfprintf(stdout,\n \t\t\t\"0x03020: RTRUP2TC (Rx User Prio to Traffic Classes)0x%08X\\n\",\n \t\t\tregs_buff[1129]);\n \n-\t\t\tfprintf(stdout,\n+\t\tfprintf(stdout,\n \t\t\t\"0x0C800: RTTUP2TC (Tx User Prio to Traffic Classes)0x%08X\\n\",\n \t\t\tregs_buff[1130]);\n \n+\t\tif (mac_type <= ixgbe_mac_x550)\n \t\t\tfor (i = 0; i < 4; i++)\n \t\t\t\tfprintf(stdout,\n-\t\t\t\t\"0x%05X: TXLLQ%d (Strict Low Lat Tx Queues %d) 0x%08X\\n\",\n-\t\t\t\t0x082E0 + (4 * i), i, i, regs_buff[1131 + i]);\n+\t\t\t\t\t\"0x%05X: TXLLQ%d (Strict Low Lat Tx Queues %d) 0x%08X\\n\",\n+\t\t\t\t\t0x082E0 + (4 * i), i, i, regs_buff[1131 + i]);\n \n-\t\t\tif (mac_type == ixgbe_mac_82599EB) {\n-\t\t\t\tfprintf(stdout,\n+\t\tif (mac_type == ixgbe_mac_82599EB) {\n+\t\t\tfprintf(stdout,\n \t\t\t\t\"0x04980: RTTBCNRM (DCB TX Rate Sched MMW) 0x%08X\\n\",\n \t\t\t\tregs_buff[1135]);\n \n-\t\t\t\tfprintf(stdout,\n+\t\t\tfprintf(stdout,\n \t\t\t\t\"0x0498C: RTTBCNRD (DCB TX Rate-Scheduler Drift) 0x%08X\\n\",\n \t\t\t\tregs_buff[1136]);\n-\t\t\t} else if (mac_type == ixgbe_mac_X540) {\n-\t\t\t\tfprintf(stdout,\n+\t\t} else if (mac_type <= ixgbe_mac_x550) {\n+\t\t\tfprintf(stdout,\n \t\t\t\t\"0x04980: RTTQCNRM (DCB TX QCN Rate Sched MMW) 0x%08X\\n\",\n \t\t\t\tregs_buff[1135]);\n \n-\t\t\t\tfprintf(stdout,\n+\t\t\tfprintf(stdout,\n \t\t\t\t\"0x0498C: RTTQCNRR (DCB TX QCN Rate Reset) 0x%08X\\n\",\n \t\t\t\tregs_buff[1136]);\n \n+\t\t\tif (mac_type < ixgbe_mac_x550)\n \t\t\t\tfprintf(stdout,\n-\t\t\t\t\"0x08B00: RTTQCNCR (DCB TX QCN Control) 0x%08X\\n\",\n-\t\t\t\tregs_buff[1137]);\n+\t\t\t\t\t\"0x08B00: RTTQCNCR (DCB TX QCN Control) 0x%08X\\n\",\n+\t\t\t\t\tregs_buff[1137]);\n \n-\t\t\t\tfprintf(stdout,\n+\t\t\tfprintf(stdout,\n \t\t\t\t\"0x04A90: RTTQCNTG (DCB TX QCN Tagging) 0x%08X\\n\",\n \t\t\t\tregs_buff[1138]);\n-\t\t\t}\n \t\t}\n \t}\n \n@@ -1127,7 +1135,7 @@ ixgbe_dump_regs(struct ethtool_drvinfo *info, struct ethtool_regs *regs)\n \t\t\tregs_buff[1068]);\n \n \t\tfprintf(stdout,\n-\t\t\t\"0x042B0: ANLP2 (Auto Neg Lnk Part. Ctrl Word 2) 0x%08X\\n\",\n+\t\t\t\"0x042B4: ANLP2 (Auto Neg Lnk Part. Ctrl Word 2) 0x%08X\\n\",\n \t\t\tregs_buff[1069]);\n \t}\n \n", "prefixes": [ "2/3" ] }