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GET /api/patches/603185/?format=api
HTTP 200 OK
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{
    "id": 603185,
    "url": "http://patchwork.ozlabs.org/api/patches/603185/?format=api",
    "web_url": "http://patchwork.ozlabs.org/project/intel-wired-lan/patch/20160329235746.68428.16711.stgit@mdrustad-wks.jf.intel.com/",
    "project": {
        "id": 46,
        "url": "http://patchwork.ozlabs.org/api/projects/46/?format=api",
        "name": "Intel Wired Ethernet development",
        "link_name": "intel-wired-lan",
        "list_id": "intel-wired-lan.osuosl.org",
        "list_email": "intel-wired-lan@osuosl.org",
        "web_url": "",
        "scm_url": "",
        "webscm_url": "",
        "list_archive_url": "",
        "list_archive_url_format": "",
        "commit_url_format": ""
    },
    "msgid": "<20160329235746.68428.16711.stgit@mdrustad-wks.jf.intel.com>",
    "list_archive_url": null,
    "date": "2016-03-29T23:57:46",
    "name": "[V4,04/11] ixgbe: Use new methods for PHY access",
    "commit_ref": null,
    "pull_url": null,
    "state": "superseded",
    "archived": false,
    "hash": "26725addc79c293bb04f57ad51263c9bb6aec135",
    "submitter": {
        "id": 13252,
        "url": "http://patchwork.ozlabs.org/api/people/13252/?format=api",
        "name": "Rustad, Mark D",
        "email": "mark.d.rustad@intel.com"
    },
    "delegate": {
        "id": 68,
        "url": "http://patchwork.ozlabs.org/api/users/68/?format=api",
        "username": "jtkirshe",
        "first_name": "Jeff",
        "last_name": "Kirsher",
        "email": "jeffrey.t.kirsher@intel.com"
    },
    "mbox": "http://patchwork.ozlabs.org/project/intel-wired-lan/patch/20160329235746.68428.16711.stgit@mdrustad-wks.jf.intel.com/mbox/",
    "series": [],
    "comments": "http://patchwork.ozlabs.org/api/patches/603185/comments/",
    "check": "pending",
    "checks": "http://patchwork.ozlabs.org/api/patches/603185/checks/",
    "tags": {},
    "related": [],
    "headers": {
        "Return-Path": "<intel-wired-lan-bounces@lists.osuosl.org>",
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            "from localhost (localhost [127.0.0.1])\n\tby fraxinus.osuosl.org (Postfix) with ESMTP id 8F0E389FB6;\n\tTue, 29 Mar 2016 23:57:48 +0000 (UTC)",
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            "from mdrustad-wks.jf.intel.com ([134.134.3.71])\n\tby fmsmga001.fm.intel.com with ESMTP; 29 Mar 2016 16:57:47 -0700"
        ],
        "X-Virus-Scanned": [
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        "X-ExtLoop1": "1",
        "X-IronPort-AV": "E=Sophos;i=\"5.24,413,1455004800\"; d=\"scan'208\";a=\"934309388\"",
        "From": "Mark D Rustad <mark.d.rustad@intel.com>",
        "To": "intel-wired-lan@lists.osuosl.org",
        "Date": "Tue, 29 Mar 2016 16:57:46 -0700",
        "Message-ID": "<20160329235746.68428.16711.stgit@mdrustad-wks.jf.intel.com>",
        "In-Reply-To": "<20160329235544.68428.93935.stgit@mdrustad-wks.jf.intel.com>",
        "References": "<20160329235544.68428.93935.stgit@mdrustad-wks.jf.intel.com>",
        "User-Agent": "StGit/unknown-version",
        "MIME-Version": "1.0",
        "Subject": "[Intel-wired-lan] [PATCH V4 04/11] ixgbe: Use new methods for PHY\n\taccess",
        "X-BeenThere": "intel-wired-lan@lists.osuosl.org",
        "X-Mailman-Version": "2.1.18-1",
        "Precedence": "list",
        "List-Id": "Intel Wired Ethernet Linux Kernel Driver Development\n\t<intel-wired-lan.lists.osuosl.org>",
        "List-Unsubscribe": "<http://lists.osuosl.org/mailman/options/intel-wired-lan>, \n\t<mailto:intel-wired-lan-request@lists.osuosl.org?subject=unsubscribe>",
        "List-Archive": "<http://lists.osuosl.org/pipermail/intel-wired-lan/>",
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        "List-Help": "<mailto:intel-wired-lan-request@lists.osuosl.org?subject=help>",
        "List-Subscribe": "<http://lists.osuosl.org/mailman/listinfo/intel-wired-lan>, \n\t<mailto:intel-wired-lan-request@lists.osuosl.org?subject=subscribe>",
        "Content-Type": "text/plain; charset=\"us-ascii\"",
        "Content-Transfer-Encoding": "7bit",
        "Errors-To": "intel-wired-lan-bounces@lists.osuosl.org",
        "Sender": "\"Intel-wired-lan\" <intel-wired-lan-bounces@lists.osuosl.org>"
    },
    "content": "Now x550em_a devices will use a new method for PHY access that will\nget the firmware token for each access.\n\nSigned-off-by: Mark Rustad <mark.d.rustad@intel.com>\n---\nChanges in V4:\n- This is a complete replacement of what was the 4th patch in the series\n- x550em_a requires a new phy access method, so this patch implements it\n---\n drivers/net/ethernet/intel/ixgbe/ixgbe_x550.c |   67 ++++++++++++++++++++++++-\n 1 file changed, 64 insertions(+), 3 deletions(-)",
    "diff": "diff --git a/drivers/net/ethernet/intel/ixgbe/ixgbe_x550.c b/drivers/net/ethernet/intel/ixgbe/ixgbe_x550.c\nindex ee925854c999..43681e098436 100644\n--- a/drivers/net/ethernet/intel/ixgbe/ixgbe_x550.c\n+++ b/drivers/net/ethernet/intel/ixgbe/ixgbe_x550.c\n@@ -2548,6 +2548,57 @@ static void ixgbe_release_swfw_sync_x550em_a(struct ixgbe_hw *hw, u32 mask)\n \t\tixgbe_release_swfw_sync_X540(hw, hmask);\n }\n \n+/**\n+ * ixgbe_read_phy_reg_x550a  - Reads specified PHY register\n+ * @hw: pointer to hardware structure\n+ * @reg_addr: 32 bit address of PHY register to read\n+ * @phy_data: Pointer to read data from PHY register\n+ *\n+ * Reads a value from a specified PHY register using the SWFW lock and PHY\n+ * Token. The PHY Token is needed since the MDIO is shared between to MAC\n+ * instances.\n+ */\n+static s32 ixgbe_read_phy_reg_x550a(struct ixgbe_hw *hw, u32 reg_addr,\n+\t\t\t\t    u32 device_type, u16 *phy_data)\n+{\n+\tu32 mask = hw->phy.phy_semaphore_mask | IXGBE_GSSR_TOKEN_SM;\n+\ts32 status;\n+\n+\tif (hw->mac.ops.acquire_swfw_sync(hw, mask))\n+\t\treturn IXGBE_ERR_SWFW_SYNC;\n+\n+\tstatus = hw->phy.ops.read_reg_mdi(hw, reg_addr, device_type, phy_data);\n+\n+\thw->mac.ops.release_swfw_sync(hw, mask);\n+\n+\treturn status;\n+}\n+\n+/**\n+ * ixgbe_write_phy_reg_x550a - Writes specified PHY register\n+ * @hw: pointer to hardware structure\n+ * @reg_addr: 32 bit PHY register to write\n+ * @device_type: 5 bit device type\n+ * @phy_data: Data to write to the PHY register\n+ *\n+ * Writes a value to specified PHY register using the SWFW lock and PHY Token. \n+ * The PHY Token is needed since the MDIO is shared between to MAC instances.\n+ */\n+static s32 ixgbe_write_phy_reg_x550a(struct ixgbe_hw *hw, u32 reg_addr,\n+\t\t\t\t     u32 device_type, u16 phy_data)\n+{\n+\tu32 mask = hw->phy.phy_semaphore_mask | IXGBE_GSSR_TOKEN_SM;\n+\ts32 status;\n+\n+\tif (hw->mac.ops.acquire_swfw_sync(hw, mask))\n+\t\treturn IXGBE_ERR_SWFW_SYNC;\n+\n+\tstatus = ixgbe_write_phy_reg_mdi(hw, reg_addr, device_type, phy_data);\n+\thw->mac.ops.release_swfw_sync(hw, mask);\n+\n+\treturn status;\n+}\n+\n #define X550_COMMON_MAC \\\n \t.init_hw\t\t\t= &ixgbe_init_hw_generic, \\\n \t.start_hw\t\t\t= &ixgbe_start_hw_X540, \\\n@@ -2673,8 +2724,6 @@ static const struct ixgbe_eeprom_operations eeprom_ops_X550EM_x = {\n \t.read_i2c_sff8472\t= &ixgbe_read_i2c_sff8472_generic, \\\n \t.read_i2c_eeprom\t= &ixgbe_read_i2c_eeprom_generic, \\\n \t.write_i2c_eeprom\t= &ixgbe_write_i2c_eeprom_generic, \\\n-\t.read_reg\t\t= &ixgbe_read_phy_reg_generic, \\\n-\t.write_reg\t\t= &ixgbe_write_phy_reg_generic, \\\n \t.setup_link\t\t= &ixgbe_setup_phy_link_generic, \\\n \t.set_phy_power\t\t= NULL, \\\n \t.check_overtemp\t\t= &ixgbe_tn_check_overtemp, \\\n@@ -2684,12 +2733,16 @@ static const struct ixgbe_phy_operations phy_ops_X550 = {\n \tX550_COMMON_PHY\n \t.init\t\t\t= NULL,\n \t.identify\t\t= &ixgbe_identify_phy_generic,\n+\t.read_reg\t\t= &ixgbe_read_phy_reg_generic,\n+\t.write_reg\t\t= &ixgbe_write_phy_reg_generic,\n };\n \n static const struct ixgbe_phy_operations phy_ops_X550EM_x = {\n \tX550_COMMON_PHY\n \t.init\t\t\t= &ixgbe_init_phy_ops_X550em,\n \t.identify\t\t= &ixgbe_identify_phy_x550em,\n+\t.read_reg\t\t= &ixgbe_read_phy_reg_generic,\n+\t.write_reg\t\t= &ixgbe_write_phy_reg_generic,\n \t.read_i2c_combined\t= &ixgbe_read_i2c_combined_generic,\n \t.write_i2c_combined\t= &ixgbe_write_i2c_combined_generic,\n \t.read_i2c_combined_unlocked = &ixgbe_read_i2c_combined_generic_unlocked,\n@@ -2697,6 +2750,14 @@ static const struct ixgbe_phy_operations phy_ops_X550EM_x = {\n \t\t\t\t     &ixgbe_write_i2c_combined_generic_unlocked,\n };\n \n+static const struct ixgbe_phy_operations phy_ops_x550em_a = {\n+\tX550_COMMON_PHY\n+\t.init\t\t\t= &ixgbe_init_phy_ops_X550em,\n+\t.identify\t\t= &ixgbe_identify_phy_x550em,\n+\t.read_reg\t\t= &ixgbe_read_phy_reg_x550a,\n+\t.write_reg\t\t= &ixgbe_write_phy_reg_x550a,\n+};\n+\n static const u32 ixgbe_mvals_X550[IXGBE_MVALS_IDX_LIMIT] = {\n \tIXGBE_MVALS_INIT(X550)\n };\n@@ -2734,7 +2795,7 @@ const struct ixgbe_info ixgbe_x550em_a_info = {\n \t.get_invariants\t\t= &ixgbe_get_invariants_X550_x,\n \t.mac_ops\t\t= &mac_ops_x550em_a,\n \t.eeprom_ops\t\t= &eeprom_ops_X550EM_x,\n-\t.phy_ops\t\t= &phy_ops_X550EM_x,\n+\t.phy_ops\t\t= &phy_ops_x550em_a,\n \t.mbx_ops\t\t= &mbx_ops_generic,\n \t.mvals\t\t\t= ixgbe_mvals_x550em_a,\n };\n",
    "prefixes": [
        "V4",
        "04/11"
    ]
}