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GET /api/patches/591656/?format=api
{ "id": 591656, "url": "http://patchwork.ozlabs.org/api/patches/591656/?format=api", "web_url": "http://patchwork.ozlabs.org/project/linuxppc-dev/patch/1457049194-9281-9-git-send-email-gwshan@linux.vnet.ibm.com/", "project": { "id": 2, "url": "http://patchwork.ozlabs.org/api/projects/2/?format=api", "name": "Linux PPC development", "link_name": "linuxppc-dev", "list_id": "linuxppc-dev.lists.ozlabs.org", "list_email": "linuxppc-dev@lists.ozlabs.org", "web_url": "https://github.com/linuxppc/wiki/wiki", "scm_url": "https://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux.git", "webscm_url": "https://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux.git/", "list_archive_url": "https://lore.kernel.org/linuxppc-dev/", "list_archive_url_format": "https://lore.kernel.org/linuxppc-dev/{}/", "commit_url_format": "https://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux.git/commit/?id={}" }, "msgid": "<1457049194-9281-9-git-send-email-gwshan@linux.vnet.ibm.com>", "list_archive_url": "https://lore.kernel.org/linuxppc-dev/1457049194-9281-9-git-send-email-gwshan@linux.vnet.ibm.com/", "date": "2016-03-03T23:53:10", "name": "[v15,08/12] powerpc/powernv: Support PCI config restore for VFs", "commit_ref": null, "pull_url": null, "state": "accepted", "archived": false, "hash": "b8a71d1a546f5b807ea144176babdcac1d2a6b30", "submitter": { "id": 63923, "url": "http://patchwork.ozlabs.org/api/people/63923/?format=api", "name": "Gavin Shan", "email": "gwshan@linux.vnet.ibm.com" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/linuxppc-dev/patch/1457049194-9281-9-git-send-email-gwshan@linux.vnet.ibm.com/mbox/", "series": [], "comments": "http://patchwork.ozlabs.org/api/patches/591656/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/591656/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<linuxppc-dev-bounces+patchwork-incoming=ozlabs.org@lists.ozlabs.org>", "X-Original-To": [ "patchwork-incoming@ozlabs.org", "linuxppc-dev@lists.ozlabs.org" ], "Delivered-To": [ "patchwork-incoming@ozlabs.org", "linuxppc-dev@lists.ozlabs.org" ], "Received": [ "from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3])\n\t(using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits))\n\t(No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id AA8011412CB\n\tfor <patchwork-incoming@ozlabs.org>;\n\tFri, 4 Mar 2016 11:07:00 +1100 (AEDT)", "from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3])\n\tby lists.ozlabs.org (Postfix) with ESMTP id 8F8061A1D7C\n\tfor <patchwork-incoming@ozlabs.org>;\n\tFri, 4 Mar 2016 11:07:00 +1100 (AEDT)", "from e23smtp08.au.ibm.com (e23smtp08.au.ibm.com [202.81.31.141])\n\t(using TLSv1.2 with cipher CAMELLIA256-SHA (256/256 bits))\n\t(No client certificate requested)\n\tby lists.ozlabs.org (Postfix) with ESMTPS id 900C41A0B99\n\tfor <linuxppc-dev@lists.ozlabs.org>;\n\tFri, 4 Mar 2016 10:54:41 +1100 (AEDT)", "from localhost\n\tby e23smtp08.au.ibm.com with IBM ESMTP SMTP Gateway: Authorized Use\n\tOnly! Violators will be prosecuted\n\tfor <linuxppc-dev@lists.ozlabs.org> from <gwshan@linux.vnet.ibm.com>; \n\tFri, 4 Mar 2016 09:54:41 +1000", "from d23dlp01.au.ibm.com (202.81.31.203)\n\tby e23smtp08.au.ibm.com (202.81.31.205) with IBM ESMTP SMTP Gateway:\n\tAuthorized Use Only! Violators will be prosecuted; \n\tFri, 4 Mar 2016 09:54:38 +1000", "from d23relay08.au.ibm.com (d23relay08.au.ibm.com [9.185.71.33])\n\tby d23dlp01.au.ibm.com (Postfix) with ESMTP id 9AEA62CE8056\n\tfor <linuxppc-dev@lists.ozlabs.org>;\n\tFri, 4 Mar 2016 10:54:37 +1100 (EST)", "from d23av02.au.ibm.com (d23av02.au.ibm.com [9.190.235.138])\n\tby d23relay08.au.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id\n\tu23NsTm262718082\n\tfor <linuxppc-dev@lists.ozlabs.org>; Fri, 4 Mar 2016 10:54:37 +1100", "from d23av02.au.ibm.com (localhost [127.0.0.1])\n\tby d23av02.au.ibm.com (8.14.4/8.14.4/NCO v10.0 AVout) with ESMTP id\n\tu23Ns5hh026026\n\tfor <linuxppc-dev@lists.ozlabs.org>; Fri, 4 Mar 2016 10:54:05 +1100", "from ozlabs.au.ibm.com (ozlabs.au.ibm.com [9.192.253.14])\n\tby d23av02.au.ibm.com (8.14.4/8.14.4/NCO v10.0 AVin) with ESMTP id\n\tu23Ns4oU025703; Fri, 4 Mar 2016 10:54:04 +1100", "from bran.ozlabs.ibm.com (haven.au.ibm.com [9.192.254.114])\n\tby ozlabs.au.ibm.com (Postfix) with ESMTP id ABFFDA02C7;\n\tFri, 4 Mar 2016 10:53:17 +1100 (AEDT)", "from gwshan (shangw.ozlabs.ibm.com [10.61.2.199])\n\tby bran.ozlabs.ibm.com (Postfix) with ESMTP id A540FE39EB;\n\tFri, 4 Mar 2016 10:53:17 +1100 (AEDT)", "by gwshan (Postfix, from userid 1000)\n\tid 92B929424AF; Fri, 4 Mar 2016 10:53:17 +1100 (AEDT)" ], "X-IBM-Helo": "d23dlp01.au.ibm.com", "X-IBM-MailFrom": "gwshan@linux.vnet.ibm.com", "X-IBM-RcptTo": "linuxppc-dev@lists.ozlabs.org", "From": "Gavin Shan <gwshan@linux.vnet.ibm.com>", "To": "linuxppc-dev@lists.ozlabs.org", "Subject": "[PATCH v15 08/12] powerpc/powernv: Support PCI config restore for\n\tVFs", "Date": "Fri, 4 Mar 2016 10:53:10 +1100", "Message-Id": "<1457049194-9281-9-git-send-email-gwshan@linux.vnet.ibm.com>", "X-Mailer": "git-send-email 2.1.0", "In-Reply-To": "<1457049194-9281-1-git-send-email-gwshan@linux.vnet.ibm.com>", "References": "<1457049194-9281-1-git-send-email-gwshan@linux.vnet.ibm.com>", "X-TM-AS-MML": "disable", "X-Content-Scanned": "Fidelis XPS MAILER", "x-cbid": "16030323-0029-0000-0000-00004428AE85", "X-BeenThere": "linuxppc-dev@lists.ozlabs.org", "X-Mailman-Version": "2.1.20", "Precedence": "list", "List-Id": "Linux on PowerPC Developers Mail List\n\t<linuxppc-dev.lists.ozlabs.org>", "List-Unsubscribe": "<https://lists.ozlabs.org/options/linuxppc-dev>,\n\t<mailto:linuxppc-dev-request@lists.ozlabs.org?subject=unsubscribe>", "List-Archive": "<http://lists.ozlabs.org/pipermail/linuxppc-dev/>", "List-Post": "<mailto:linuxppc-dev@lists.ozlabs.org>", "List-Help": "<mailto:linuxppc-dev-request@lists.ozlabs.org?subject=help>", "List-Subscribe": "<https://lists.ozlabs.org/listinfo/linuxppc-dev>,\n\t<mailto:linuxppc-dev-request@lists.ozlabs.org?subject=subscribe>", "Cc": "Wei Yang <weiyang@linux.vnet.ibm.com>", "MIME-Version": "1.0", "Content-Type": "text/plain; charset=\"utf-8\"", "Content-Transfer-Encoding": "base64", "Errors-To": "linuxppc-dev-bounces+patchwork-incoming=ozlabs.org@lists.ozlabs.org", "Sender": "\"Linuxppc-dev\"\n\t<linuxppc-dev-bounces+patchwork-incoming=ozlabs.org@lists.ozlabs.org>" }, "content": "From: Wei Yang <weiyang@linux.vnet.ibm.com>\n\nAfter PE reset, OPAL API opal_pci_reinit() is called on all devices\ncontained in the PE to reinitialize them. While skiboot is not aware of\nVFs, we have to implement the function in kernel to reinitialize VFs after\nreset on PE for VFs.\n\nIn this patch, two functions pnv_pci_fixup_vf_mps() and\npnv_eeh_restore_vf_config() both manipulate the MPS of the VF, since for a\nVF it has three cases.\n\n1. Normal creation for a VF\n In this case, pnv_pci_fixup_vf_mps() is called to make the MPS a proper\n value compared with its parent.\n2. EEH recovery without VF removed\n In this case, MPS is stored in pci_dn and pnv_eeh_restore_vf_config() is\n called to restore it and reinitialize other part.\n3. EEH recovery with VF removed\n In this case, VF will be removed then re-created. Both functions are\n called. First pnv_pci_fixup_vf_mps() is called to store the proper MPS\n to pci_dn and then pnv_eeh_restore_vf_config() is called to do proper\n thing.\n\nThis introduces two functions: pnv_pci_fixup_vf_mps() to fixup the VF's\nMPS to make sure it is equal to parent's and store this value in pci_dn\nfor future use. pnv_eeh_restore_vf_config() to re-initialize on VF by\nrestoring MPS, disabling completion timeout, enabling SERR, etc.\n\nSigned-off-by: Wei Yang <weiyang@linux.vnet.ibm.com>\nAcked-by: Gavin Shan <gwshan@linux.vnet.ibm.com>\n---\n arch/powerpc/include/asm/pci-bridge.h | 1 +\n arch/powerpc/platforms/powernv/eeh-powernv.c | 95 +++++++++++++++++++++++++++-\n 2 files changed, 93 insertions(+), 3 deletions(-)", "diff": "diff --git a/arch/powerpc/include/asm/pci-bridge.h b/arch/powerpc/include/asm/pci-bridge.h\nindex b0b43f5..f4d1758 100644\n--- a/arch/powerpc/include/asm/pci-bridge.h\n+++ b/arch/powerpc/include/asm/pci-bridge.h\n@@ -220,6 +220,7 @@ struct pci_dn {\n #define IODA_INVALID_M64 (-1)\n \tint (*m64_map)[PCI_SRIOV_NUM_BARS];\n #endif /* CONFIG_PCI_IOV */\n+\tint\tmps;\t\t\t/* Maximum Payload Size */\n #endif\n \tstruct list_head child_list;\n \tstruct list_head list;\ndiff --git a/arch/powerpc/platforms/powernv/eeh-powernv.c b/arch/powerpc/platforms/powernv/eeh-powernv.c\nindex e26256b..950b3e5 100644\n--- a/arch/powerpc/platforms/powernv/eeh-powernv.c\n+++ b/arch/powerpc/platforms/powernv/eeh-powernv.c\n@@ -1588,6 +1588,65 @@ static int pnv_eeh_next_error(struct eeh_pe **pe)\n \treturn ret;\n }\n \n+static int pnv_eeh_restore_vf_config(struct pci_dn *pdn)\n+{\n+\tstruct eeh_dev *edev = pdn_to_eeh_dev(pdn);\n+\tu32 devctl, cmd, cap2, aer_capctl;\n+\tint old_mps;\n+\n+\tif (edev->pcie_cap) {\n+\t\t/* Restore MPS */\n+\t\told_mps = (ffs(pdn->mps) - 8) << 5;\n+\t\teeh_ops->read_config(pdn, edev->pcie_cap + PCI_EXP_DEVCTL,\n+\t\t\t\t 2, &devctl);\n+\t\tdevctl &= ~PCI_EXP_DEVCTL_PAYLOAD;\n+\t\tdevctl |= old_mps;\n+\t\teeh_ops->write_config(pdn, edev->pcie_cap + PCI_EXP_DEVCTL,\n+\t\t\t\t 2, devctl);\n+\n+\t\t/* Disable Completion Timeout */\n+\t\teeh_ops->read_config(pdn, edev->pcie_cap + PCI_EXP_DEVCAP2,\n+\t\t\t\t 4, &cap2);\n+\t\tif (cap2 & 0x10) {\n+\t\t\teeh_ops->read_config(pdn,\n+\t\t\t\t\t edev->pcie_cap + PCI_EXP_DEVCTL2,\n+\t\t\t\t\t 4, &cap2);\n+\t\t\tcap2 |= 0x10;\n+\t\t\teeh_ops->write_config(pdn,\n+\t\t\t\t\t edev->pcie_cap + PCI_EXP_DEVCTL2,\n+\t\t\t\t\t 4, cap2);\n+\t\t}\n+\t}\n+\n+\t/* Enable SERR and parity checking */\n+\teeh_ops->read_config(pdn, PCI_COMMAND, 2, &cmd);\n+\tcmd |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR);\n+\teeh_ops->write_config(pdn, PCI_COMMAND, 2, cmd);\n+\n+\t/* Enable report various errors */\n+\tif (edev->pcie_cap) {\n+\t\teeh_ops->read_config(pdn, edev->pcie_cap + PCI_EXP_DEVCTL,\n+\t\t\t\t 2, &devctl);\n+\t\tdevctl &= ~PCI_EXP_DEVCTL_CERE;\n+\t\tdevctl |= (PCI_EXP_DEVCTL_NFERE |\n+\t\t\t PCI_EXP_DEVCTL_FERE |\n+\t\t\t PCI_EXP_DEVCTL_URRE);\n+\t\teeh_ops->write_config(pdn, edev->pcie_cap + PCI_EXP_DEVCTL,\n+\t\t\t\t 2, devctl);\n+\t}\n+\n+\t/* Enable ECRC generation and check */\n+\tif (edev->pcie_cap && edev->aer_cap) {\n+\t\teeh_ops->read_config(pdn, edev->aer_cap + PCI_ERR_CAP,\n+\t\t\t\t 4, &aer_capctl);\n+\t\taer_capctl |= (PCI_ERR_CAP_ECRC_GENE | PCI_ERR_CAP_ECRC_CHKE);\n+\t\teeh_ops->write_config(pdn, edev->aer_cap + PCI_ERR_CAP,\n+\t\t\t\t 4, aer_capctl);\n+\t}\n+\n+\treturn 0;\n+}\n+\n static int pnv_eeh_restore_config(struct pci_dn *pdn)\n {\n \tstruct eeh_dev *edev = pdn_to_eeh_dev(pdn);\n@@ -1597,9 +1656,21 @@ static int pnv_eeh_restore_config(struct pci_dn *pdn)\n \tif (!edev)\n \t\treturn -EEXIST;\n \n-\tphb = edev->phb->private_data;\n-\tret = opal_pci_reinit(phb->opal_id,\n-\t\t\t OPAL_REINIT_PCI_DEV, edev->config_addr);\n+\t/*\n+\t * We have to restore the PCI config space after reset since the\n+\t * firmware can't see SRIOV VFs.\n+\t *\n+\t * FIXME: The MPS, error routing rules, timeout setting are worthy\n+\t * to be exported by firmware in extendible way.\n+\t */\n+\tif (edev->physfn) {\n+\t\tret = pnv_eeh_restore_vf_config(pdn);\n+\t} else {\n+\t\tphb = edev->phb->private_data;\n+\t\tret = opal_pci_reinit(phb->opal_id,\n+\t\t\t\t OPAL_REINIT_PCI_DEV, edev->config_addr);\n+\t}\n+\n \tif (ret) {\n \t\tpr_warn(\"%s: Can't reinit PCI dev 0x%x (%lld)\\n\",\n \t\t\t__func__, edev->config_addr, ret);\n@@ -1644,6 +1715,24 @@ void pcibios_bus_add_device(struct pci_dev *pdev)\n \teeh_sysfs_add_device(pdev);\n }\n \n+#ifdef CONFIG_PCI_IOV\n+static void pnv_pci_fixup_vf_mps(struct pci_dev *pdev)\n+{\n+\tstruct pci_dn *pdn = pci_get_pdn(pdev);\n+\tint parent_mps;\n+\n+\tif (!pdev->is_virtfn)\n+\t\treturn;\n+\n+\t/* Synchronize MPS for VF and PF */\n+\tparent_mps = pcie_get_mps(pdev->physfn);\n+\tif ((128 << pdev->pcie_mpss) >= parent_mps)\n+\t\tpcie_set_mps(pdev, parent_mps);\n+\tpdn->mps = pcie_get_mps(pdev);\n+}\n+DECLARE_PCI_FIXUP_HEADER(PCI_ANY_ID, PCI_ANY_ID, pnv_pci_fixup_vf_mps);\n+#endif /* CONFIG_PCI_IOV */\n+\n /**\n * eeh_powernv_init - Register platform dependent EEH operations\n *\n", "prefixes": [ "v15", "08/12" ] }