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GET /api/patches/572054/?format=api
{ "id": 572054, "url": "http://patchwork.ozlabs.org/api/patches/572054/?format=api", "web_url": "http://patchwork.ozlabs.org/project/intel-wired-lan/patch/20160123014235.49376.51296.stgit@mdrustad-wks.jf.intel.com/", "project": { "id": 46, "url": "http://patchwork.ozlabs.org/api/projects/46/?format=api", "name": "Intel Wired Ethernet development", "link_name": "intel-wired-lan", "list_id": "intel-wired-lan.osuosl.org", "list_email": "intel-wired-lan@osuosl.org", "web_url": "", "scm_url": "", "webscm_url": "", "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<20160123014235.49376.51296.stgit@mdrustad-wks.jf.intel.com>", "list_archive_url": null, "date": "2016-01-23T01:42:35", "name": "ixgbe: Fix flow control for BDX-DE KR backplane", "commit_ref": null, "pull_url": null, "state": "changes-requested", "archived": false, "hash": "f9c6f00b956bd997f847676f90226f7f423bf5d9", "submitter": { "id": 13252, "url": "http://patchwork.ozlabs.org/api/people/13252/?format=api", "name": "Rustad, Mark D", "email": "mark.d.rustad@intel.com" }, "delegate": { "id": 68, "url": "http://patchwork.ozlabs.org/api/users/68/?format=api", "username": "jtkirshe", "first_name": "Jeff", "last_name": "Kirsher", "email": "jeffrey.t.kirsher@intel.com" }, "mbox": "http://patchwork.ozlabs.org/project/intel-wired-lan/patch/20160123014235.49376.51296.stgit@mdrustad-wks.jf.intel.com/mbox/", "series": [], "comments": "http://patchwork.ozlabs.org/api/patches/572054/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/572054/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<intel-wired-lan-bounces@lists.osuosl.org>", "X-Original-To": [ "incoming@patchwork.ozlabs.org", "intel-wired-lan@lists.osuosl.org" ], "Delivered-To": [ "patchwork-incoming@bilbo.ozlabs.org", "intel-wired-lan@lists.osuosl.org" ], "Received": [ "from fraxinus.osuosl.org (smtp4.osuosl.org [140.211.166.137])\n\tby ozlabs.org (Postfix) with ESMTP id A429F1402D9\n\tfor <incoming@patchwork.ozlabs.org>;\n\tSat, 23 Jan 2016 12:42:53 +1100 (AEDT)", "from localhost (localhost [127.0.0.1])\n\tby fraxinus.osuosl.org (Postfix) with ESMTP id 7E4E6A5928;\n\tSat, 23 Jan 2016 01:42:52 +0000 (UTC)", "from fraxinus.osuosl.org ([127.0.0.1])\n\tby localhost (.osuosl.org [127.0.0.1]) (amavisd-new, port 10024)\n\twith ESMTP id 4b7RRKgbrX1p; Sat, 23 Jan 2016 01:42:51 +0000 (UTC)", "from ash.osuosl.org (ash.osuosl.org [140.211.166.34])\n\tby fraxinus.osuosl.org (Postfix) with ESMTP id 81544A588C;\n\tSat, 23 Jan 2016 01:42:51 +0000 (UTC)", "from hemlock.osuosl.org (smtp2.osuosl.org [140.211.166.133])\n\tby ash.osuosl.org (Postfix) with ESMTP id C1DF31C1F38\n\tfor <intel-wired-lan@lists.osuosl.org>;\n\tSat, 23 Jan 2016 01:42:50 +0000 (UTC)", "from localhost (localhost [127.0.0.1])\n\tby hemlock.osuosl.org (Postfix) with ESMTP id BBA2E94CBB\n\tfor <intel-wired-lan@lists.osuosl.org>;\n\tSat, 23 Jan 2016 01:42:50 +0000 (UTC)", "from hemlock.osuosl.org ([127.0.0.1])\n\tby localhost (.osuosl.org [127.0.0.1]) (amavisd-new, port 10024)\n\twith ESMTP id P3Pp37aQuto0 for <intel-wired-lan@lists.osuosl.org>;\n\tSat, 23 Jan 2016 01:42:49 +0000 (UTC)", "from mga14.intel.com (mga14.intel.com [192.55.52.115])\n\tby hemlock.osuosl.org (Postfix) with ESMTP id 763F494C22\n\tfor <intel-wired-lan@lists.osuosl.org>;\n\tSat, 23 Jan 2016 01:42:49 +0000 (UTC)", "from orsmga001.jf.intel.com ([10.7.209.18])\n\tby fmsmga103.fm.intel.com with ESMTP; 22 Jan 2016 17:42:35 -0800", "from mdrustad-wks.jf.intel.com ([134.134.176.85])\n\tby orsmga001.jf.intel.com with ESMTP; 22 Jan 2016 17:42:35 -0800" ], "X-Virus-Scanned": [ "amavisd-new at osuosl.org", "amavisd-new at osuosl.org" ], "X-Greylist": "domain auto-whitelisted by SQLgrey-1.7.6", "X-ExtLoop1": "1", "X-IronPort-AV": "E=Sophos;i=\"5.22,334,1449561600\"; d=\"scan'208\";a=\"866585610\"", "From": "Mark D Rustad <mark.d.rustad@intel.com>", "To": "intel-wired-lan@lists.osuosl.org", "Date": "Fri, 22 Jan 2016 17:42:35 -0800", "Message-ID": "<20160123014235.49376.51296.stgit@mdrustad-wks.jf.intel.com>", "User-Agent": "StGit/unknown-version", "MIME-Version": "1.0", "Subject": "[Intel-wired-lan] [PATCH] ixgbe: Fix flow control for BDX-DE KR\n\tbackplane", "X-BeenThere": "intel-wired-lan@lists.osuosl.org", "X-Mailman-Version": "2.1.18-1", "Precedence": "list", "List-Id": "Intel Wired Ethernet Linux Kernel Driver Development\n\t<intel-wired-lan.lists.osuosl.org>", "List-Unsubscribe": "<http://lists.osuosl.org/mailman/options/intel-wired-lan>, \n\t<mailto:intel-wired-lan-request@lists.osuosl.org?subject=unsubscribe>", "List-Archive": "<http://lists.osuosl.org/pipermail/intel-wired-lan/>", "List-Post": "<mailto:intel-wired-lan@lists.osuosl.org>", "List-Help": "<mailto:intel-wired-lan-request@lists.osuosl.org?subject=help>", "List-Subscribe": "<http://lists.osuosl.org/mailman/listinfo/intel-wired-lan>, \n\t<mailto:intel-wired-lan-request@lists.osuosl.org?subject=subscribe>", "Content-Type": "text/plain; charset=\"us-ascii\"", "Content-Transfer-Encoding": "7bit", "Errors-To": "intel-wired-lan-bounces@lists.osuosl.org", "Sender": "\"Intel-wired-lan\" <intel-wired-lan-bounces@lists.osuosl.org>" }, "content": "BDX-DE KR backplane is different from other backplanes,\nin that we can't use auto-negotiation to determine the\nmode. Instead, use whatever the user configured.\n\nSigned-off-by: Mark Rustad <mark.d.rustad@intel.com>\n---\n drivers/net/ethernet/intel/ixgbe/ixgbe_82598.c | 1 \n drivers/net/ethernet/intel/ixgbe/ixgbe_82599.c | 1 \n drivers/net/ethernet/intel/ixgbe/ixgbe_common.c | 8 +-\n drivers/net/ethernet/intel/ixgbe/ixgbe_common.h | 3 +\n drivers/net/ethernet/intel/ixgbe/ixgbe_type.h | 5 +\n drivers/net/ethernet/intel/ixgbe/ixgbe_x540.c | 1 \n drivers/net/ethernet/intel/ixgbe/ixgbe_x550.c | 81 ++++++++++++++++++++++-\n 7 files changed, 93 insertions(+), 7 deletions(-)", "diff": "diff --git a/drivers/net/ethernet/intel/ixgbe/ixgbe_82598.c b/drivers/net/ethernet/intel/ixgbe/ixgbe_82598.c\nindex 9790d0274f7f..f47eb12a9c50 100644\n--- a/drivers/net/ethernet/intel/ixgbe/ixgbe_82598.c\n+++ b/drivers/net/ethernet/intel/ixgbe/ixgbe_82598.c\n@@ -1192,6 +1192,7 @@ static const struct ixgbe_mac_operations mac_ops_82598 = {\n \t.clear_vfta\t\t= &ixgbe_clear_vfta_82598,\n \t.set_vfta\t\t= &ixgbe_set_vfta_82598,\n \t.fc_enable\t\t= &ixgbe_fc_enable_82598,\n+\t.setup_fc\t\t= ixgbe_setup_fc_generic,\n \t.set_fw_drv_ver = NULL,\n \t.acquire_swfw_sync = &ixgbe_acquire_swfw_sync,\n \t.release_swfw_sync = &ixgbe_release_swfw_sync,\ndiff --git a/drivers/net/ethernet/intel/ixgbe/ixgbe_82599.c b/drivers/net/ethernet/intel/ixgbe/ixgbe_82599.c\nindex b276fe0bc665..c3ae5a701d43 100644\n--- a/drivers/net/ethernet/intel/ixgbe/ixgbe_82599.c\n+++ b/drivers/net/ethernet/intel/ixgbe/ixgbe_82599.c\n@@ -2220,6 +2220,7 @@ static const struct ixgbe_mac_operations mac_ops_82599 = {\n \t.clear_vfta = &ixgbe_clear_vfta_generic,\n \t.set_vfta = &ixgbe_set_vfta_generic,\n \t.fc_enable = &ixgbe_fc_enable_generic,\n+\t.setup_fc\t\t= ixgbe_setup_fc_generic,\n \t.set_fw_drv_ver = &ixgbe_set_fw_drv_ver_generic,\n \t.init_uta_tables = &ixgbe_init_uta_tables_generic,\n \t.setup_sfp = &ixgbe_setup_sfp_modules_82599,\ndiff --git a/drivers/net/ethernet/intel/ixgbe/ixgbe_common.c b/drivers/net/ethernet/intel/ixgbe/ixgbe_common.c\nindex 64045053e874..8c7e78b21c4e 100644\n--- a/drivers/net/ethernet/intel/ixgbe/ixgbe_common.c\n+++ b/drivers/net/ethernet/intel/ixgbe/ixgbe_common.c\n@@ -1,7 +1,7 @@\n /*******************************************************************************\n \n Intel 10 Gigabit PCI Express Linux driver\n- Copyright(c) 1999 - 2015 Intel Corporation.\n+ Copyright(c) 1999 - 2016 Intel Corporation.\n \n This program is free software; you can redistribute it and/or modify it\n under the terms and conditions of the GNU General Public License,\n@@ -111,12 +111,12 @@ bool ixgbe_device_supports_autoneg_fc(struct ixgbe_hw *hw)\n }\n \n /**\n- * ixgbe_setup_fc - Set up flow control\n+ * ixgbe_setup_fc_generic - Set up flow control\n * @hw: pointer to hardware structure\n *\n * Called at init time to set up flow control.\n **/\n-static s32 ixgbe_setup_fc(struct ixgbe_hw *hw)\n+s32 ixgbe_setup_fc_generic(struct ixgbe_hw *hw)\n {\n \ts32 ret_val = 0;\n \tu32 reg = 0, reg_bp = 0;\n@@ -296,7 +296,7 @@ s32 ixgbe_start_hw_generic(struct ixgbe_hw *hw)\n \tIXGBE_WRITE_FLUSH(hw);\n \n \t/* Setup flow control */\n-\tret_val = ixgbe_setup_fc(hw);\n+\tret_val = hw->mac.ops.setup_fc(hw);\n \tif (ret_val)\n \t\treturn ret_val;\n \ndiff --git a/drivers/net/ethernet/intel/ixgbe/ixgbe_common.h b/drivers/net/ethernet/intel/ixgbe/ixgbe_common.h\nindex 2b9563137fd8..2e290150ab54 100644\n--- a/drivers/net/ethernet/intel/ixgbe/ixgbe_common.h\n+++ b/drivers/net/ethernet/intel/ixgbe/ixgbe_common.h\n@@ -1,7 +1,7 @@\n /*******************************************************************************\n \n Intel 10 Gigabit PCI Express Linux driver\n- Copyright(c) 1999 - 2014 Intel Corporation.\n+ Copyright(c) 1999 - 2016 Intel Corporation.\n \n This program is free software; you can redistribute it and/or modify it\n under the terms and conditions of the GNU General Public License,\n@@ -81,6 +81,7 @@ s32 ixgbe_disable_rx_buff_generic(struct ixgbe_hw *hw);\n s32 ixgbe_enable_rx_buff_generic(struct ixgbe_hw *hw);\n s32 ixgbe_enable_rx_dma_generic(struct ixgbe_hw *hw, u32 regval);\n s32 ixgbe_fc_enable_generic(struct ixgbe_hw *hw);\n+s32 ixgbe_setup_fc_generic(struct ixgbe_hw *);\n bool ixgbe_device_supports_autoneg_fc(struct ixgbe_hw *hw);\n void ixgbe_fc_autoneg(struct ixgbe_hw *hw);\n \ndiff --git a/drivers/net/ethernet/intel/ixgbe/ixgbe_type.h b/drivers/net/ethernet/intel/ixgbe/ixgbe_type.h\nindex 29e0b0e1cb67..787d2b21465e 100644\n--- a/drivers/net/ethernet/intel/ixgbe/ixgbe_type.h\n+++ b/drivers/net/ethernet/intel/ixgbe/ixgbe_type.h\n@@ -3308,6 +3308,7 @@ struct ixgbe_mac_operations {\n \n \t/* Flow Control */\n \ts32 (*fc_enable)(struct ixgbe_hw *);\n+\ts32 (*setup_fc)(struct ixgbe_hw *);\n \n \t/* Manageability interface */\n \ts32 (*set_fw_drv_ver)(struct ixgbe_hw *, u8, u8, u8, u8);\n@@ -3525,6 +3526,7 @@ struct ixgbe_info {\n \n #define IXGBE_KRM_PORT_CAR_GEN_CTRL(P)\t((P) ? 0x8010 : 0x4010)\n #define IXGBE_KRM_LINK_CTRL_1(P)\t((P) ? 0x820C : 0x420C)\n+#define IXGBE_KRM_AN_CNTL_1(P)\t\t((P) ? 0x822C : 0x422C)\n #define IXGBE_KRM_DSP_TXFFE_STATE_4(P)\t((P) ? 0x8634 : 0x4634)\n #define IXGBE_KRM_DSP_TXFFE_STATE_5(P)\t((P) ? 0x8638 : 0x4638)\n #define IXGBE_KRM_RX_TRN_LINKUP_CTRL(P)\t((P) ? 0x8B00 : 0x4B00)\n@@ -3547,6 +3549,9 @@ struct ixgbe_info {\n #define IXGBE_KRM_LINK_CTRL_1_TETH_AN_ENABLE\t\t(1 << 29)\n #define IXGBE_KRM_LINK_CTRL_1_TETH_AN_RESTART\t\t(1 << 31)\n \n+#define IXGBE_KRM_AN_CNTL_1_SYM_PAUSE\t\t\t(1 << 28)\n+#define IXGBE_KRM_AN_CNTL_1_ASM_PAUSE\t\t\t(1 << 29)\n+\n #define IXGBE_KRM_DSP_TXFFE_STATE_C0_EN\t\t\t(1 << 6)\n #define IXGBE_KRM_DSP_TXFFE_STATE_CP1_CN1_EN\t\t(1 << 15)\n #define IXGBE_KRM_DSP_TXFFE_STATE_CO_ADAPT_EN\t\t(1 << 16)\ndiff --git a/drivers/net/ethernet/intel/ixgbe/ixgbe_x540.c b/drivers/net/ethernet/intel/ixgbe/ixgbe_x540.c\nindex 0d69564f3a1b..c00b67b4c1dc 100644\n--- a/drivers/net/ethernet/intel/ixgbe/ixgbe_x540.c\n+++ b/drivers/net/ethernet/intel/ixgbe/ixgbe_x540.c\n@@ -846,6 +846,7 @@ static const struct ixgbe_mac_operations mac_ops_X540 = {\n \t.clear_vfta = &ixgbe_clear_vfta_generic,\n \t.set_vfta = &ixgbe_set_vfta_generic,\n \t.fc_enable = &ixgbe_fc_enable_generic,\n+\t.setup_fc\t\t= ixgbe_setup_fc_generic,\n \t.set_fw_drv_ver = &ixgbe_set_fw_drv_ver_generic,\n \t.init_uta_tables = &ixgbe_init_uta_tables_generic,\n \t.setup_sfp = NULL,\ndiff --git a/drivers/net/ethernet/intel/ixgbe/ixgbe_x550.c b/drivers/net/ethernet/intel/ixgbe/ixgbe_x550.c\nindex eae344fcfe7a..c0a9c6976910 100644\n--- a/drivers/net/ethernet/intel/ixgbe/ixgbe_x550.c\n+++ b/drivers/net/ethernet/intel/ixgbe/ixgbe_x550.c\n@@ -1842,6 +1842,81 @@ static s32 ixgbe_get_lcd_t_x550em(struct ixgbe_hw *hw,\n \treturn status;\n }\n \n+/**\n+ * ixgbe_setup_fc_x550em - Set up flow control\n+ * @hw: pointer to hardware structure\n+ */\n+static s32 ixgbe_setup_fc_x550em(struct ixgbe_hw *hw)\n+{\n+\tbool pause, asm_dir;\n+\tu32 reg_val;\n+\ts32 rc;\n+\n+\t/* Validate the requested mode */\n+\tif (hw->fc.strict_ieee && hw->fc.requested_mode == ixgbe_fc_rx_pause) {\n+\t\thw_err(hw, \"ixgbe_fc_rx_pause not valid in strict IEEE mode\\n\");\n+\t\treturn IXGBE_ERR_INVALID_LINK_SETTINGS;\n+\t}\n+\n+\t/* 10gig parts do not have a word in the EEPROM to determine the\n+\t * default flow control setting, so we explicitly set it to full.\n+\t */\n+\tif (hw->fc.requested_mode == ixgbe_fc_default)\n+\t\thw->fc.requested_mode = ixgbe_fc_full;\n+\n+\t/* Determine PAUSE and ASM_DIR bits. */\n+\tswitch (hw->fc.requested_mode) {\n+\tcase ixgbe_fc_none:\n+\t\tpause = false;\n+\t\tasm_dir = false;\n+\t\tbreak;\n+\tcase ixgbe_fc_tx_pause:\n+\t\tpause = false;\n+\t\tasm_dir = true;\n+\t\tbreak;\n+\tcase ixgbe_fc_rx_pause:\n+\t\t/* Rx Flow control is enabled and Tx Flow control is\n+\t\t * disabled by software override. Since there really\n+\t\t * isn't a way to advertise that we are capable of RX\n+\t\t * Pause ONLY, we will advertise that we support both\n+\t\t * symmetric and asymmetric Rx PAUSE, as such we fall\n+\t\t * through to the fc_full statement. Later, we will\n+\t\t * disable the adapter's ability to send PAUSE frames.\n+\t\t */\n+\t\t/* Fallthrough */\n+\tcase ixgbe_fc_full:\n+\t\tpause = true;\n+\t\tasm_dir = true;\n+\t\tbreak;\n+\tdefault:\n+\t\thw_err(hw, \"Flow control param set incorrectly\\n\");\n+\t\treturn IXGBE_ERR_CONFIG;\n+\t}\n+\n+\tif (hw->phy.media_type != ixgbe_media_type_backplane)\n+\t\treturn 0;\n+\n+\trc = ixgbe_read_iosf_sb_reg_x550(hw,\n+\t\t\t\t\t IXGBE_KRM_AN_CNTL_1(hw->bus.lan_id),\n+\t\t\t\t\t IXGBE_SB_IOSF_TARGET_KR_PHY, ®_val);\n+\tif (rc)\n+\t\treturn rc;\n+\treg_val &= ~(IXGBE_KRM_AN_CNTL_1_SYM_PAUSE |\n+\t\t IXGBE_KRM_AN_CNTL_1_ASM_PAUSE);\n+\tif (pause)\n+\t\treg_val |= IXGBE_KRM_AN_CNTL_1_SYM_PAUSE;\n+\tif (asm_dir)\n+\t\treg_val |= IXGBE_KRM_AN_CNTL_1_ASM_PAUSE;\n+\trc = ixgbe_write_iosf_sb_reg_x550(hw,\n+\t\t\t\t\t IXGBE_KRM_AN_CNTL_1(hw->bus.lan_id),\n+\t\t\t\t\t IXGBE_SB_IOSF_TARGET_KR_PHY, reg_val);\n+\n+\t/* Not all devices fully support AN. */\n+\tif (hw->device_id == IXGBE_DEV_ID_X550EM_X_KR)\n+\t\thw->fc.disable_fc_autoneg = true;\n+\treturn rc;\n+}\n+\n /** ixgbe_enter_lplu_x550em - Transition to low power states\n * @hw: pointer to hardware structure\n *\n@@ -2337,8 +2412,6 @@ static void ixgbe_release_swfw_sync_X550em(struct ixgbe_hw *hw, u32 mask)\n \t.enable_rx_buff\t\t\t= &ixgbe_enable_rx_buff_generic, \\\n \t.get_thermal_sensor_data\t= NULL, \\\n \t.init_thermal_sensor_thresh\t= NULL, \\\n-\t.prot_autoc_read\t\t= &prot_autoc_read_generic, \\\n-\t.prot_autoc_write\t\t= &prot_autoc_write_generic, \\\n \t.enable_rx\t\t\t= &ixgbe_enable_rx_generic, \\\n \t.disable_rx\t\t\t= &ixgbe_disable_rx_x550, \\\n \n@@ -2354,6 +2427,9 @@ static const struct ixgbe_mac_operations mac_ops_X550 = {\n \t.setup_sfp\t\t= NULL,\n \t.acquire_swfw_sync\t= &ixgbe_acquire_swfw_sync_X540,\n \t.release_swfw_sync\t= &ixgbe_release_swfw_sync_X540,\n+\t.prot_autoc_read\t= prot_autoc_read_generic,\n+\t.prot_autoc_write\t= prot_autoc_write_generic,\n+\t.setup_fc\t\t= ixgbe_setup_fc_generic,\n };\n \n static const struct ixgbe_mac_operations mac_ops_X550EM_x = {\n@@ -2368,6 +2444,7 @@ static const struct ixgbe_mac_operations mac_ops_X550EM_x = {\n \t.setup_sfp\t\t= ixgbe_setup_sfp_modules_X550em,\n \t.acquire_swfw_sync\t= &ixgbe_acquire_swfw_sync_X550em,\n \t.release_swfw_sync\t= &ixgbe_release_swfw_sync_X550em,\n+\t.setup_fc\t\t= ixgbe_setup_fc_x550em,\n };\n \n #define X550_COMMON_EEP \\\n", "prefixes": [] }