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GET /api/patches/568516/?format=api
{ "id": 568516, "url": "http://patchwork.ozlabs.org/api/patches/568516/?format=api", "web_url": "http://patchwork.ozlabs.org/project/intel-wired-lan/patch/1452897202-15204-10-git-send-email-joshua.a.hay@intel.com/", "project": { "id": 46, "url": "http://patchwork.ozlabs.org/api/projects/46/?format=api", "name": "Intel Wired Ethernet development", "link_name": "intel-wired-lan", "list_id": "intel-wired-lan.osuosl.org", "list_email": "intel-wired-lan@osuosl.org", "web_url": "", "scm_url": "", "webscm_url": "", "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<1452897202-15204-10-git-send-email-joshua.a.hay@intel.com>", "list_archive_url": null, "date": "2016-01-15T22:33:16", "name": "[next,S28,09/15] i40e: Do not disable queues in the Legacy/MSI Interrupt handler", "commit_ref": null, "pull_url": null, "state": "accepted", "archived": false, "hash": "98f1fe0c9df034aad034dc6914747622f2604dbb", "submitter": { "id": 19461, "url": "http://patchwork.ozlabs.org/api/people/19461/?format=api", "name": "Joshua Hay", "email": "joshua.a.hay@intel.com" }, "delegate": { "id": 68, "url": "http://patchwork.ozlabs.org/api/users/68/?format=api", "username": "jtkirshe", "first_name": "Jeff", "last_name": "Kirsher", "email": "jeffrey.t.kirsher@intel.com" }, "mbox": "http://patchwork.ozlabs.org/project/intel-wired-lan/patch/1452897202-15204-10-git-send-email-joshua.a.hay@intel.com/mbox/", "series": [], "comments": "http://patchwork.ozlabs.org/api/patches/568516/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/568516/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<intel-wired-lan-bounces@lists.osuosl.org>", "X-Original-To": [ "incoming@patchwork.ozlabs.org", "intel-wired-lan@lists.osuosl.org" ], "Delivered-To": [ "patchwork-incoming@bilbo.ozlabs.org", "intel-wired-lan@lists.osuosl.org" ], "Received": [ "from whitealder.osuosl.org (smtp1.osuosl.org [140.211.166.138])\n\tby ozlabs.org (Postfix) with ESMTP id 7E78C140BAB\n\tfor <incoming@patchwork.ozlabs.org>;\n\tSat, 16 Jan 2016 09:33:43 +1100 (AEDT)", "from localhost (localhost [127.0.0.1])\n\tby whitealder.osuosl.org (Postfix) with ESMTP id DAAF691A70;\n\tFri, 15 Jan 2016 22:33:41 +0000 (UTC)", "from whitealder.osuosl.org ([127.0.0.1])\n\tby localhost (.osuosl.org [127.0.0.1]) (amavisd-new, port 10024)\n\twith ESMTP id 2K1XatY-ykKS; Fri, 15 Jan 2016 22:33:39 +0000 (UTC)", "from ash.osuosl.org (ash.osuosl.org [140.211.166.34])\n\tby whitealder.osuosl.org (Postfix) with ESMTP id 0CCCA91A9D;\n\tFri, 15 Jan 2016 22:33:31 +0000 (UTC)", "from fraxinus.osuosl.org (smtp4.osuosl.org [140.211.166.137])\n\tby ash.osuosl.org (Postfix) with ESMTP id D1ADD1C2189\n\tfor <intel-wired-lan@lists.osuosl.org>;\n\tFri, 15 Jan 2016 22:33:26 +0000 (UTC)", "from localhost (localhost [127.0.0.1])\n\tby fraxinus.osuosl.org (Postfix) with ESMTP id CD89F8A047\n\tfor <intel-wired-lan@lists.osuosl.org>;\n\tFri, 15 Jan 2016 22:33:26 +0000 (UTC)", "from fraxinus.osuosl.org ([127.0.0.1])\n\tby localhost (.osuosl.org [127.0.0.1]) (amavisd-new, port 10024)\n\twith ESMTP id NCeOgXL-4ex8 for <intel-wired-lan@lists.osuosl.org>;\n\tFri, 15 Jan 2016 22:33:24 +0000 (UTC)", "from mga14.intel.com (mga14.intel.com [192.55.52.115])\n\tby fraxinus.osuosl.org (Postfix) with ESMTP id 0347EA571C\n\tfor <intel-wired-lan@lists.osuosl.org>;\n\tFri, 15 Jan 2016 22:33:23 +0000 (UTC)", "from fmsmga002.fm.intel.com ([10.253.24.26])\n\tby fmsmga103.fm.intel.com with ESMTP; 15 Jan 2016 14:33:23 -0800", "from jahay1-mobl2.amr.corp.intel.com (HELO\n\tlocalhost.localdomain.localdomain) ([134.134.176.81])\n\tby fmsmga002.fm.intel.com with ESMTP; 15 Jan 2016 14:33:22 -0800" ], "X-Virus-Scanned": [ "amavisd-new at osuosl.org", "amavisd-new at osuosl.org" ], "X-Greylist": "domain auto-whitelisted by SQLgrey-1.7.6", "X-ExtLoop1": "1", "X-IronPort-AV": "E=Sophos;i=\"5.22,302,1449561600\"; d=\"scan'208\";a=\"894132185\"", "From": "Joshua Hay <joshua.a.hay@intel.com>", "To": "intel-wired-lan@lists.osuosl.org", "Date": "Fri, 15 Jan 2016 14:33:16 -0800", "Message-Id": "<1452897202-15204-10-git-send-email-joshua.a.hay@intel.com>", "X-Mailer": "git-send-email 2.1.0", "In-Reply-To": "<1452897202-15204-1-git-send-email-joshua.a.hay@intel.com>", "References": "<1452897202-15204-1-git-send-email-joshua.a.hay@intel.com>", "Subject": "[Intel-wired-lan] [next PATCH S28 09/15] i40e: Do not disable\n\tqueues in the Legacy/MSI Interrupt handler", "X-BeenThere": "intel-wired-lan@lists.osuosl.org", "X-Mailman-Version": "2.1.18-1", "Precedence": "list", "List-Id": "Intel Wired Ethernet Linux Kernel Driver Development\n\t<intel-wired-lan.lists.osuosl.org>", "List-Unsubscribe": "<http://lists.osuosl.org/mailman/options/intel-wired-lan>, \n\t<mailto:intel-wired-lan-request@lists.osuosl.org?subject=unsubscribe>", "List-Archive": "<http://lists.osuosl.org/pipermail/intel-wired-lan/>", "List-Post": "<mailto:intel-wired-lan@lists.osuosl.org>", "List-Help": "<mailto:intel-wired-lan-request@lists.osuosl.org?subject=help>", "List-Subscribe": "<http://lists.osuosl.org/mailman/listinfo/intel-wired-lan>, \n\t<mailto:intel-wired-lan-request@lists.osuosl.org?subject=subscribe>", "MIME-Version": "1.0", "Content-Type": "text/plain; charset=\"us-ascii\"", "Content-Transfer-Encoding": "7bit", "Errors-To": "intel-wired-lan-bounces@lists.osuosl.org", "Sender": "\"Intel-wired-lan\" <intel-wired-lan-bounces@lists.osuosl.org>" }, "content": "From: Anjali Singhai Jain <anjali.singhai@intel.com>\n\nThe queues should never be enabled/disabled in the interrupt handler,\nICR0 interrupt enable should be the only thing that needs to be\ndynamically changed in the handler.\n\nThis patch fixes that. Without this patch X722 platforms were\nseeing weird ping timings when in Legacy mode since it takes\na whole lot of time for the HW/FW to re-enable queues.\n\nSigned-off-by: Anjali Singhai Jain <anjali.singhai@intel.com>\nChange-ID: If065afc45d81c5a19d4a94a00cd5b8f61cefc40c\n---\nTesting Hints (Required if no HSD): Test with legacy mode\nenabled.\n\n drivers/net/ethernet/intel/i40e/i40e_main.c | 16 ++++++----------\n drivers/net/ethernet/intel/i40e/i40e_txrx.c | 13 -------------\n 2 files changed, 6 insertions(+), 23 deletions(-)", "diff": "diff --git a/drivers/net/ethernet/intel/i40e/i40e_main.c b/drivers/net/ethernet/intel/i40e/i40e_main.c\nindex 90e37f4..5e7a7a1 100644\n--- a/drivers/net/ethernet/intel/i40e/i40e_main.c\n+++ b/drivers/net/ethernet/intel/i40e/i40e_main.c\n@@ -3462,16 +3462,12 @@ static irqreturn_t i40e_intr(int irq, void *data)\n \t\tstruct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];\n \t\tstruct i40e_q_vector *q_vector = vsi->q_vectors[0];\n \n-\t\t/* temporarily disable queue cause for NAPI processing */\n-\t\tu32 qval = rd32(hw, I40E_QINT_RQCTL(0));\n-\n-\t\tqval &= ~I40E_QINT_RQCTL_CAUSE_ENA_MASK;\n-\t\twr32(hw, I40E_QINT_RQCTL(0), qval);\n-\n-\t\tqval = rd32(hw, I40E_QINT_TQCTL(0));\n-\t\tqval &= ~I40E_QINT_TQCTL_CAUSE_ENA_MASK;\n-\t\twr32(hw, I40E_QINT_TQCTL(0), qval);\n-\n+\t\t/* We do not have a way to disarm Queue causes while leaving\n+\t\t * interrupt enabled for all other causes, ideally\n+\t\t * interrupt should be disabled while we are in NAPI but\n+\t\t * this is not a performance path and napi_schedule()\n+\t\t * can deal with rescheduling.\n+\t\t */\n \t\tif (!test_bit(__I40E_DOWN, &pf->state))\n \t\t\tnapi_schedule_irqoff(&q_vector->napi);\n \t}\ndiff --git a/drivers/net/ethernet/intel/i40e/i40e_txrx.c b/drivers/net/ethernet/intel/i40e/i40e_txrx.c\nindex cd9bb7f..61e98f5 100644\n--- a/drivers/net/ethernet/intel/i40e/i40e_txrx.c\n+++ b/drivers/net/ethernet/intel/i40e/i40e_txrx.c\n@@ -2051,19 +2051,6 @@ tx_only:\n \tif (vsi->back->flags & I40E_FLAG_MSIX_ENABLED) {\n \t\ti40e_update_enable_itr(vsi, q_vector);\n \t} else { /* Legacy mode */\n-\t\tstruct i40e_hw *hw = &vsi->back->hw;\n-\t\t/* We re-enable the queue 0 cause, but\n-\t\t * don't worry about dynamic_enable\n-\t\t * because we left it on for the other\n-\t\t * possible interrupts during napi\n-\t\t */\n-\t\tu32 qval = rd32(hw, I40E_QINT_RQCTL(0)) |\n-\t\t\t I40E_QINT_RQCTL_CAUSE_ENA_MASK;\n-\n-\t\twr32(hw, I40E_QINT_RQCTL(0), qval);\n-\t\tqval = rd32(hw, I40E_QINT_TQCTL(0)) |\n-\t\t I40E_QINT_TQCTL_CAUSE_ENA_MASK;\n-\t\twr32(hw, I40E_QINT_TQCTL(0), qval);\n \t\ti40e_irq_dynamic_enable_icr0(vsi->back, false);\n \t}\n \treturn 0;\n", "prefixes": [ "next", "S28", "09/15" ] }