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GET /api/patches/567104/?format=api
HTTP 200 OK
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{
    "id": 567104,
    "url": "http://patchwork.ozlabs.org/api/patches/567104/?format=api",
    "web_url": "http://patchwork.ozlabs.org/project/intel-wired-lan/patch/1452687149-11281-5-git-send-email-christopher.s.hall@intel.com/",
    "project": {
        "id": 46,
        "url": "http://patchwork.ozlabs.org/api/projects/46/?format=api",
        "name": "Intel Wired Ethernet development",
        "link_name": "intel-wired-lan",
        "list_id": "intel-wired-lan.osuosl.org",
        "list_email": "intel-wired-lan@osuosl.org",
        "web_url": "",
        "scm_url": "",
        "webscm_url": "",
        "list_archive_url": "",
        "list_archive_url_format": "",
        "commit_url_format": ""
    },
    "msgid": "<1452687149-11281-5-git-send-email-christopher.s.hall@intel.com>",
    "list_archive_url": null,
    "date": "2016-01-13T12:12:24",
    "name": "[v6,4/9] Always Running Timer (ART) correlated clocksource",
    "commit_ref": null,
    "pull_url": null,
    "state": "superseded",
    "archived": false,
    "hash": "de9e30741ddff32d5e387096234a3b5b987467db",
    "submitter": {
        "id": 66720,
        "url": "http://patchwork.ozlabs.org/api/people/66720/?format=api",
        "name": "Hall, Christopher S",
        "email": "christopher.s.hall@intel.com"
    },
    "delegate": {
        "id": 68,
        "url": "http://patchwork.ozlabs.org/api/users/68/?format=api",
        "username": "jtkirshe",
        "first_name": "Jeff",
        "last_name": "Kirsher",
        "email": "jeffrey.t.kirsher@intel.com"
    },
    "mbox": "http://patchwork.ozlabs.org/project/intel-wired-lan/patch/1452687149-11281-5-git-send-email-christopher.s.hall@intel.com/mbox/",
    "series": [],
    "comments": "http://patchwork.ozlabs.org/api/patches/567104/comments/",
    "check": "pending",
    "checks": "http://patchwork.ozlabs.org/api/patches/567104/checks/",
    "tags": {},
    "related": [],
    "headers": {
        "Return-Path": "<intel-wired-lan-bounces@lists.osuosl.org>",
        "X-Original-To": [
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        "Delivered-To": [
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            "intel-wired-lan@lists.osuosl.org"
        ],
        "Received": [
            "from hemlock.osuosl.org (smtp2.osuosl.org [140.211.166.133])\n\tby ozlabs.org (Postfix) with ESMTP id 4597B1402C4\n\tfor <incoming@patchwork.ozlabs.org>;\n\tThu, 14 Jan 2016 06:18:42 +1100 (AEDT)",
            "from localhost (localhost [127.0.0.1])\n\tby hemlock.osuosl.org (Postfix) with ESMTP id 8AE29949F6;\n\tWed, 13 Jan 2016 19:18:41 +0000 (UTC)",
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            "from foofoo.jf.intel.com (HELO localhost.localdomain)\n\t([134.134.172.151])\n\tby FMSMGA003.fm.intel.com with ESMTP; 13 Jan 2016 11:18:37 -0800"
        ],
        "X-Virus-Scanned": [
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        "X-ExtLoop1": "1",
        "X-IronPort-AV": "E=Sophos;i=\"5.22,290,1449561600\"; d=\"scan'208\";a=\"632939095\"",
        "From": "\"Christopher S. Hall\" <christopher.s.hall@intel.com>",
        "To": "tglx@linutronix.de, richardcochran@gmail.com, mingo@redhat.com,\n\tjohn.stultz@linaro.org, hpa@zytor.com, jeffrey.t.kirsher@intel.com",
        "Date": "Wed, 13 Jan 2016 04:12:24 -0800",
        "Message-Id": "<1452687149-11281-5-git-send-email-christopher.s.hall@intel.com>",
        "X-Mailer": "git-send-email 2.1.4",
        "In-Reply-To": "<1452687149-11281-1-git-send-email-christopher.s.hall@intel.com>",
        "References": "<1452687149-11281-1-git-send-email-christopher.s.hall@intel.com>",
        "MIME-Version": "1.0",
        "Cc": "\"Christopher S. Hall\" <christopher.s.hall@intel.com>,\n\tkevin.b.stanton@intel.com, netdev@vger.kernel.org, x86@kernel.org,\n\tlinux-kernel@vger.kernel.org, intel-wired-lan@lists.osuosl.org",
        "Subject": "[Intel-wired-lan] [PATCH v6 4/9] Always Running Timer (ART)\n\tcorrelated clocksource",
        "X-BeenThere": "intel-wired-lan@lists.osuosl.org",
        "X-Mailman-Version": "2.1.18-1",
        "Precedence": "list",
        "List-Id": "Intel Wired Ethernet Linux Kernel Driver Development\n\t<intel-wired-lan.lists.osuosl.org>",
        "List-Unsubscribe": "<http://lists.osuosl.org/mailman/options/intel-wired-lan>, \n\t<mailto:intel-wired-lan-request@lists.osuosl.org?subject=unsubscribe>",
        "List-Archive": "<http://lists.osuosl.org/pipermail/intel-wired-lan/>",
        "List-Post": "<mailto:intel-wired-lan@lists.osuosl.org>",
        "List-Help": "<mailto:intel-wired-lan-request@lists.osuosl.org?subject=help>",
        "List-Subscribe": "<http://lists.osuosl.org/mailman/listinfo/intel-wired-lan>, \n\t<mailto:intel-wired-lan-request@lists.osuosl.org?subject=subscribe>",
        "Content-Type": "text/plain; charset=\"utf-8\"",
        "Content-Transfer-Encoding": "base64",
        "Errors-To": "intel-wired-lan-bounces@lists.osuosl.org",
        "Sender": "\"Intel-wired-lan\" <intel-wired-lan-bounces@lists.osuosl.org>"
    },
    "content": "On modern Intel systems TSC is derived from the new Always Running Timer\n(ART). ART can be captured simultaneous to the capture of\naudio and network device clocks, allowing a correlation between timebases\nto be constructed. Upon capture, the driver converts the captured ART\nvalue to the appropriate system clock using the correlated clocksource\nmechanism.\n\nOn systems that support ART a new CPUID leaf (0x15) returns parameters\n“m” and “n” such that:\n\nTSC_value = (ART_value * m) / n + k [n >= 2]\n\n[k is an offset that can adjusted by a privileged agent. The\nIA32_TSC_ADJUST MSR is an example of an interface to adjust k.\nSee 17.14.4 of the Intel SDM for more details]\n\nSigned-off-by: Christopher S. Hall <christopher.s.hall@intel.com>\n---\n arch/x86/include/asm/cpufeature.h |  2 +-\n arch/x86/include/asm/tsc.h        |  2 ++\n arch/x86/kernel/tsc.c             | 46 +++++++++++++++++++++++++++++++++++++++\n 3 files changed, 49 insertions(+), 1 deletion(-)",
    "diff": "diff --git a/arch/x86/include/asm/cpufeature.h b/arch/x86/include/asm/cpufeature.h\nindex f7ba9fb..b940fa1 100644\n--- a/arch/x86/include/asm/cpufeature.h\n+++ b/arch/x86/include/asm/cpufeature.h\n@@ -85,7 +85,7 @@\n #define X86_FEATURE_P4\t\t( 3*32+ 7) /* \"\" P4 */\n #define X86_FEATURE_CONSTANT_TSC ( 3*32+ 8) /* TSC ticks at a constant rate */\n #define X86_FEATURE_UP\t\t( 3*32+ 9) /* smp kernel running on up */\n-/* free, was #define X86_FEATURE_FXSAVE_LEAK ( 3*32+10) * \"\" FXSAVE leaks FOP/FIP/FOP */\n+#define X86_FEATURE_ART\t\t(3*32+10) /* Platform has always running timer (ART) */\n #define X86_FEATURE_ARCH_PERFMON ( 3*32+11) /* Intel Architectural PerfMon */\n #define X86_FEATURE_PEBS\t( 3*32+12) /* Precise-Event Based Sampling */\n #define X86_FEATURE_BTS\t\t( 3*32+13) /* Branch Trace Store */\ndiff --git a/arch/x86/include/asm/tsc.h b/arch/x86/include/asm/tsc.h\nindex 6d7c547..9474c9c 100644\n--- a/arch/x86/include/asm/tsc.h\n+++ b/arch/x86/include/asm/tsc.h\n@@ -29,6 +29,8 @@ static inline cycles_t get_cycles(void)\n \treturn rdtsc();\n }\n \n+extern struct correlated_cs art_timestamper;\n+\n extern void tsc_init(void);\n extern void mark_tsc_unstable(char *reason);\n extern int unsynchronized_tsc(void);\ndiff --git a/arch/x86/kernel/tsc.c b/arch/x86/kernel/tsc.c\nindex c7c4d9c..26dcf63 100644\n--- a/arch/x86/kernel/tsc.c\n+++ b/arch/x86/kernel/tsc.c\n@@ -949,10 +949,36 @@ static struct notifier_block time_cpufreq_notifier_block = {\n \t.notifier_call  = time_cpufreq_notifier\n };\n \n+#define ART_CPUID_LEAF (0x15)\n+/* The denominator will never be less that 2 */\n+#define ART_MIN_DENOMINATOR (2)\n+\n+static u32 art_to_tsc_numerator;\n+static u32 art_to_tsc_denominator;\n+\n+/*\n+ * If ART is present detect the numerator:denominator to convert to TSC\n+ */\n+static void detect_art(void)\n+{\n+\tunsigned int unused[2];\n+\n+\tif (boot_cpu_data.cpuid_level >= ART_CPUID_LEAF) {\n+\t\tcpuid(ART_CPUID_LEAF, &art_to_tsc_denominator,\n+\t\t      &art_to_tsc_numerator, unused, unused+1);\n+\n+\t\tif (art_to_tsc_denominator >= ART_MIN_DENOMINATOR)\n+\t\t\tset_cpu_cap(&boot_cpu_data, X86_FEATURE_ART);\n+\t}\n+}\n+\n static int __init cpufreq_tsc(void)\n {\n \tif (!cpu_has_tsc)\n \t\treturn 0;\n+\n+\tdetect_art();\n+\n \tif (boot_cpu_has(X86_FEATURE_CONSTANT_TSC))\n \t\treturn 0;\n \tcpufreq_register_notifier(&time_cpufreq_notifier_block,\n@@ -1071,6 +1097,24 @@ int unsynchronized_tsc(void)\n \treturn 0;\n }\n \n+/*\n+ * Convert ART to TSC given numerator/denominator found in detect_art()\n+ */\n+static u64 convert_art_to_tsc(struct correlated_cs *cs, u64 cycles)\n+{\n+\tu64 tmp, res;\n+\n+\tres = (cycles / art_to_tsc_denominator) * art_to_tsc_numerator;\n+\ttmp = (cycles % art_to_tsc_denominator) * art_to_tsc_numerator;\n+\tres += tmp / art_to_tsc_denominator;\n+\n+\treturn res;\n+}\n+\n+struct correlated_cs art_timestamper = {\n+\t.convert\t= convert_art_to_tsc,\n+};\n+EXPORT_SYMBOL(art_timestamper);\n \n static void tsc_refine_calibration_work(struct work_struct *work);\n static DECLARE_DELAYED_WORK(tsc_irqwork, tsc_refine_calibration_work);\n@@ -1142,6 +1186,8 @@ static void tsc_refine_calibration_work(struct work_struct *work)\n \t\t(unsigned long)tsc_khz % 1000);\n \n out:\n+\tif (boot_cpu_has(X86_FEATURE_ART))\n+\t\tart_timestamper.related_cs = &clocksource_tsc;\n \tclocksource_register_khz(&clocksource_tsc, tsc_khz);\n }\n \n",
    "prefixes": [
        "v6",
        "4/9"
    ]
}