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GET /api/patches/562/?format=api
{ "id": 562, "url": "http://patchwork.ozlabs.org/api/patches/562/?format=api", "web_url": "http://patchwork.ozlabs.org/project/linuxppc-dev/patch/1221777901-2967-2-git-send-email-galak@kernel.crashing.org/", "project": { "id": 2, "url": "http://patchwork.ozlabs.org/api/projects/2/?format=api", "name": "Linux PPC development", "link_name": "linuxppc-dev", "list_id": "linuxppc-dev.lists.ozlabs.org", "list_email": "linuxppc-dev@lists.ozlabs.org", "web_url": "https://github.com/linuxppc/wiki/wiki", "scm_url": "https://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux.git", "webscm_url": "https://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux.git/", "list_archive_url": "https://lore.kernel.org/linuxppc-dev/", "list_archive_url_format": "https://lore.kernel.org/linuxppc-dev/{}/", "commit_url_format": "https://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux.git/commit/?id={}" }, "msgid": "<1221777901-2967-2-git-send-email-galak@kernel.crashing.org>", "list_archive_url": "https://lore.kernel.org/linuxppc-dev/1221777901-2967-2-git-send-email-galak@kernel.crashing.org/", "date": "2008-09-18T22:44:59", "name": "[v8,2/4] powerpc: Fixes for CONFIG_PTE_64BIT for SMP support", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "c80246a643b855f3ca47db4903957010b337bb60", "submitter": { "id": 5, "url": "http://patchwork.ozlabs.org/api/people/5/?format=api", "name": "Kumar Gala", "email": "galak@kernel.crashing.org" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/linuxppc-dev/patch/1221777901-2967-2-git-send-email-galak@kernel.crashing.org/mbox/", "series": [], "comments": "http://patchwork.ozlabs.org/api/patches/562/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/562/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<linuxppc-dev-bounces+patchwork-incoming=ozlabs.org@ozlabs.org>", "X-Original-To": [ "patchwork-incoming@ozlabs.org", "linuxppc-dev@ozlabs.org" ], "Delivered-To": [ "patchwork-incoming@ozlabs.org", "linuxppc-dev@ozlabs.org" ], "Received": [ "from ozlabs.org (localhost [127.0.0.1])\n\tby ozlabs.org (Postfix) with ESMTP id 1DF9ADE1BA\n\tfor <patchwork-incoming@ozlabs.org>;\n\tFri, 19 Sep 2008 08:46:15 +1000 (EST)", "from gate.crashing.org (gate.crashing.org [63.228.1.57])\n\t(using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits))\n\t(Client did not present a certificate)\n\tby ozlabs.org (Postfix) with ESMTPS id 981F0DDF76\n\tfor <linuxppc-dev@ozlabs.org>; Fri, 19 Sep 2008 08:45:06 +1000 (EST)", "from localhost (localhost.localdomain [127.0.0.1])\n\tby gate.crashing.org (8.14.1/8.13.8) with ESMTP id m8IMj2Nh019853\n\tfor <linuxppc-dev@ozlabs.org>; Thu, 18 Sep 2008 17:45:03 -0500" ], "From": "Kumar Gala <galak@kernel.crashing.org>", "To": "linuxppc-dev@ozlabs.org", "Subject": "[PATCH v8 2/4] powerpc: Fixes for CONFIG_PTE_64BIT for SMP support", "Date": "Thu, 18 Sep 2008 17:44:59 -0500", "Message-Id": "<1221777901-2967-2-git-send-email-galak@kernel.crashing.org>", "X-Mailer": "git-send-email 1.5.5.1", "In-Reply-To": "<1221777901-2967-1-git-send-email-galak@kernel.crashing.org>", "References": "<1221777901-2967-1-git-send-email-galak@kernel.crashing.org>", "X-BeenThere": "linuxppc-dev@ozlabs.org", "X-Mailman-Version": "2.1.11", "Precedence": "list", "List-Id": "Linux on PowerPC Developers Mail List <linuxppc-dev.ozlabs.org>", "List-Unsubscribe": "<https://ozlabs.org/mailman/options/linuxppc-dev>,\n\t<mailto:linuxppc-dev-request@ozlabs.org?subject=unsubscribe>", "List-Archive": "<http://ozlabs.org/pipermail/linuxppc-dev>", "List-Post": "<mailto:linuxppc-dev@ozlabs.org>", "List-Help": "<mailto:linuxppc-dev-request@ozlabs.org?subject=help>", "List-Subscribe": "<https://ozlabs.org/mailman/listinfo/linuxppc-dev>,\n\t<mailto:linuxppc-dev-request@ozlabs.org?subject=subscribe>", "MIME-Version": "1.0", "Content-Type": "text/plain; charset=\"us-ascii\"", "Content-Transfer-Encoding": "7bit", "Sender": "linuxppc-dev-bounces+patchwork-incoming=ozlabs.org@ozlabs.org", "Errors-To": "linuxppc-dev-bounces+patchwork-incoming=ozlabs.org@ozlabs.org" }, "content": "There are some minor issues with support 64-bit PTEs on a 32-bit processor\nwhen dealing with SMP.\n\n* We need to order the stores in set_pte_at to make sure the flag word\n is set second.\n* Change pte_clear to use pte_update so only the flag word is cleared\n* Added a WARN_ON to set_pte_at to ensure the pte isn't present for\n the 64-bit pte/SMP case (to ensure our assumption of this fact).\n\nSigned-off-by: Kumar Gala <galak@kernel.crashing.org>", "diff": "diff --git a/arch/powerpc/include/asm/highmem.h b/arch/powerpc/include/asm/highmem.h\nindex 5d99b64..91c5895 100644\n--- a/arch/powerpc/include/asm/highmem.h\n+++ b/arch/powerpc/include/asm/highmem.h\n@@ -84,7 +84,7 @@ static inline void *kmap_atomic_prot(struct page *page, enum km_type type, pgpro\n #ifdef CONFIG_DEBUG_HIGHMEM\n \tBUG_ON(!pte_none(*(kmap_pte-idx)));\n #endif\n-\tset_pte_at(&init_mm, vaddr, kmap_pte-idx, mk_pte(page, prot));\n+\t__set_pte_at(&init_mm, vaddr, kmap_pte-idx, mk_pte(page, prot));\n \tflush_tlb_page(NULL, vaddr);\n \n \treturn (void*) vaddr;\ndiff --git a/arch/powerpc/include/asm/pgtable-ppc32.h b/arch/powerpc/include/asm/pgtable-ppc32.h\nindex 6fe39e3..1b4c86d 100644\n--- a/arch/powerpc/include/asm/pgtable-ppc32.h\n+++ b/arch/powerpc/include/asm/pgtable-ppc32.h\n@@ -517,7 +517,8 @@ extern unsigned long bad_call_to_PMD_PAGE_SIZE(void);\n \n #define pte_none(pte)\t\t((pte_val(pte) & ~_PTE_NONE_MASK) == 0)\n #define pte_present(pte)\t(pte_val(pte) & _PAGE_PRESENT)\n-#define pte_clear(mm,addr,ptep)\tdo { set_pte_at((mm), (addr), (ptep), __pte(0)); } while (0)\n+#define pte_clear(mm, addr, ptep) \\\n+\tdo { pte_update(ptep, ~_PAGE_HASHPTE, 0); } while (0)\n \n #define pmd_none(pmd)\t\t(!pmd_val(pmd))\n #define\tpmd_bad(pmd)\t\t(pmd_val(pmd) & _PMD_BAD)\n@@ -612,9 +613,6 @@ static inline unsigned long pte_update(pte_t *p,\n \treturn old;\n }\n #else /* CONFIG_PTE_64BIT */\n-/* TODO: Change that to only modify the low word and move set_pte_at()\n- * out of line\n- */\n static inline unsigned long long pte_update(pte_t *p,\n \t\t\t\t\t unsigned long clr,\n \t\t\t\t\t unsigned long set)\n@@ -652,16 +650,33 @@ static inline unsigned long long pte_update(pte_t *p,\n * On machines which use an MMU hash table we avoid changing the\n * _PAGE_HASHPTE bit.\n */\n-static inline void set_pte_at(struct mm_struct *mm, unsigned long addr,\n+\n+static inline void __set_pte_at(struct mm_struct *mm, unsigned long addr,\n \t\t\t pte_t *ptep, pte_t pte)\n {\n #if _PAGE_HASHPTE != 0\n \tpte_update(ptep, ~_PAGE_HASHPTE, pte_val(pte) & ~_PAGE_HASHPTE);\n+#elif defined(CONFIG_PTE_64BIT) && defined(CONFIG_SMP)\n+\t__asm__ __volatile__(\"\\\n+\t\tstw%U0%X0 %2,%0\\n\\\n+\t\teieio\\n\\\n+\t\tstw%U0%X0 %L2,%1\"\n+\t: \"=m\" (*ptep), \"=m\" (*((unsigned char *)ptep+4))\n+\t: \"r\" (pte) : \"memory\");\n #else\n \t*ptep = pte;\n #endif\n }\n \n+static inline void set_pte_at(struct mm_struct *mm, unsigned long addr,\n+\t\t\t pte_t *ptep, pte_t pte)\n+{\n+#if defined(CONFIG_PTE_64BIT) && define(CONFIG_SMP)\n+\tWARN_ON(pte_present(*ptep));\n+#endif\n+\t__set_pte_at(mm, addr, ptep, pte);\n+}\n+\n /*\n * 2.6 calls this without flushing the TLB entry; this is wrong\n * for our hash-based implementation, we fix that up here.\n", "prefixes": [ "v8", "2/4" ] }