Patch Detail
get:
Show a patch.
patch:
Update a patch.
put:
Update a patch.
GET /api/patches/560023/?format=api
{ "id": 560023, "url": "http://patchwork.ozlabs.org/api/patches/560023/?format=api", "web_url": "http://patchwork.ozlabs.org/project/intel-wired-lan/patch/1450791305-11285-2-git-send-email-raanan.avargil@intel.com/", "project": { "id": 46, "url": "http://patchwork.ozlabs.org/api/projects/46/?format=api", "name": "Intel Wired Ethernet development", "link_name": "intel-wired-lan", "list_id": "intel-wired-lan.osuosl.org", "list_email": "intel-wired-lan@osuosl.org", "web_url": "", "scm_url": "", "webscm_url": "", "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<1450791305-11285-2-git-send-email-raanan.avargil@intel.com>", "list_archive_url": null, "date": "2015-12-22T13:35:02", "name": "[2/5] e1000e: Increase PHY PLL clock gate timing", "commit_ref": null, "pull_url": null, "state": "accepted", "archived": false, "hash": "19d2b3d8383b7c3928e29f399a8240f6bcc32fe4", "submitter": { "id": 66787, "url": "http://patchwork.ozlabs.org/api/people/66787/?format=api", "name": "Raanan Avargil", "email": "raanan.avargil@intel.com" }, "delegate": { "id": 68, "url": "http://patchwork.ozlabs.org/api/users/68/?format=api", "username": "jtkirshe", "first_name": "Jeff", "last_name": "Kirsher", "email": "jeffrey.t.kirsher@intel.com" }, "mbox": "http://patchwork.ozlabs.org/project/intel-wired-lan/patch/1450791305-11285-2-git-send-email-raanan.avargil@intel.com/mbox/", "series": [], "comments": "http://patchwork.ozlabs.org/api/patches/560023/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/560023/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<intel-wired-lan-bounces@lists.osuosl.org>", "X-Original-To": [ "incoming@patchwork.ozlabs.org", "intel-wired-lan@lists.osuosl.org" ], "Delivered-To": [ "patchwork-incoming@bilbo.ozlabs.org", "intel-wired-lan@lists.osuosl.org" ], "Received": [ "from whitealder.osuosl.org (smtp1.osuosl.org [140.211.166.138])\n\tby ozlabs.org (Postfix) with ESMTP id 6FDBE14017E\n\tfor <incoming@patchwork.ozlabs.org>;\n\tWed, 23 Dec 2015 00:27:05 +1100 (AEDT)", "from localhost (localhost [127.0.0.1])\n\tby whitealder.osuosl.org (Postfix) with ESMTP id C1E57924B2;\n\tTue, 22 Dec 2015 13:27:04 +0000 (UTC)", "from whitealder.osuosl.org ([127.0.0.1])\n\tby localhost (.osuosl.org [127.0.0.1]) (amavisd-new, port 10024)\n\twith ESMTP id oLzkcRCxGj5K; Tue, 22 Dec 2015 13:27:02 +0000 (UTC)", "from ash.osuosl.org (ash.osuosl.org [140.211.166.34])\n\tby whitealder.osuosl.org (Postfix) with ESMTP id 77D7D924B5;\n\tTue, 22 Dec 2015 13:27:02 +0000 (UTC)", "from silver.osuosl.org (smtp3.osuosl.org [140.211.166.136])\n\tby ash.osuosl.org (Postfix) with ESMTP id 3F4301C0B99\n\tfor <intel-wired-lan@lists.osuosl.org>;\n\tTue, 22 Dec 2015 13:27:00 +0000 (UTC)", "from localhost (localhost [127.0.0.1])\n\tby silver.osuosl.org (Postfix) with ESMTP id 38C43331E7\n\tfor <intel-wired-lan@lists.osuosl.org>;\n\tTue, 22 Dec 2015 13:27:00 +0000 (UTC)", "from silver.osuosl.org ([127.0.0.1])\n\tby localhost (.osuosl.org [127.0.0.1]) (amavisd-new, port 10024)\n\twith ESMTP id U97PFkq4zCPk for <intel-wired-lan@lists.osuosl.org>;\n\tTue, 22 Dec 2015 13:26:59 +0000 (UTC)", "from mga14.intel.com (mga14.intel.com [192.55.52.115])\n\tby silver.osuosl.org (Postfix) with ESMTP id 70460331E5\n\tfor <intel-wired-lan@lists.osuosl.org>;\n\tTue, 22 Dec 2015 13:26:59 +0000 (UTC)", "from fmsmga003.fm.intel.com ([10.253.24.29])\n\tby fmsmga103.fm.intel.com with ESMTP; 22 Dec 2015 05:26:59 -0800", "from unknown (HELO ccdpc198.iil.intel.com) ([143.185.160.81])\n\tby FMSMGA003.fm.intel.com with ESMTP; 22 Dec 2015 05:26:58 -0800" ], "X-Virus-Scanned": [ "amavisd-new at osuosl.org", "amavisd-new at osuosl.org" ], "X-Greylist": "domain auto-whitelisted by SQLgrey-1.7.6", "X-ExtLoop1": "1", "X-IronPort-AV": "E=Sophos;i=\"5.20,464,1444719600\"; d=\"scan'208\";a=\"622217738\"", "From": "Raanan Avargil <raanan.avargil@intel.com>", "To": "intel-wired-lan@lists.osuosl.org", "Date": "Tue, 22 Dec 2015 15:35:02 +0200", "Message-Id": "<1450791305-11285-2-git-send-email-raanan.avargil@intel.com>", "X-Mailer": "git-send-email 2.1.0", "In-Reply-To": "<1450791305-11285-1-git-send-email-raanan.avargil@intel.com>", "References": "<1450791305-11285-1-git-send-email-raanan.avargil@intel.com>", "Subject": "[Intel-wired-lan] [PATCH 2/5] e1000e: Increase PHY PLL clock gate\n\ttiming", "X-BeenThere": "intel-wired-lan@lists.osuosl.org", "X-Mailman-Version": "2.1.18-1", "Precedence": "list", "List-Id": "Intel Wired Ethernet Linux Kernel Driver Development\n\t<intel-wired-lan.lists.osuosl.org>", "List-Unsubscribe": "<http://lists.osuosl.org/mailman/options/intel-wired-lan>, \n\t<mailto:intel-wired-lan-request@lists.osuosl.org?subject=unsubscribe>", "List-Archive": "<http://lists.osuosl.org/pipermail/intel-wired-lan/>", "List-Post": "<mailto:intel-wired-lan@lists.osuosl.org>", "List-Help": "<mailto:intel-wired-lan-request@lists.osuosl.org?subject=help>", "List-Subscribe": "<http://lists.osuosl.org/mailman/listinfo/intel-wired-lan>, \n\t<mailto:intel-wired-lan-request@lists.osuosl.org?subject=subscribe>", "MIME-Version": "1.0", "Content-Type": "text/plain; charset=\"us-ascii\"", "Content-Transfer-Encoding": "7bit", "Errors-To": "intel-wired-lan-bounces@lists.osuosl.org", "Sender": "\"Intel-wired-lan\" <intel-wired-lan-bounces@lists.osuosl.org>" }, "content": "Several packet loss issues were reported for which the root cause for\nthem was an incorrect configuration of internal HW Phy clock gating\nmechanism by SW.\nThis patch provides the correct mechanism.\n\nSigned-off-by: Raanan Avargil <raanan.avargil@intel.com>\n---\n drivers/net/ethernet/intel/e1000e/ich8lan.c | 12 ++++++++++++\n drivers/net/ethernet/intel/e1000e/ich8lan.h | 3 +++\n 2 files changed, 15 insertions(+)", "diff": "diff --git a/drivers/net/ethernet/intel/e1000e/ich8lan.c b/drivers/net/ethernet/intel/e1000e/ich8lan.c\nindex c731465..786d214 100644\n--- a/drivers/net/ethernet/intel/e1000e/ich8lan.c\n+++ b/drivers/net/ethernet/intel/e1000e/ich8lan.c\n@@ -1433,6 +1433,18 @@ static s32 e1000_check_for_copper_link_ich8lan(struct e1000_hw *hw)\n \t\t\temi_addr = I217_RX_CONFIG;\n \t\tret_val = e1000_write_emi_reg_locked(hw, emi_addr, emi_val);\n \n+\t\tif (hw->mac.type == e1000_pch_lpt ||\n+\t\t hw->mac.type == e1000_pch_spt) {\n+\t\t\tu16 phy_reg;\n+\n+\t\t\te1e_rphy_locked(hw, I217_PLL_CLOCK_GATE_REG, &phy_reg);\n+\t\t\tphy_reg &= ~I217_PLL_CLOCK_GATE_MASK;\n+\t\t\tif (speed == SPEED_100 || speed == SPEED_10)\n+\t\t\t\tphy_reg |= 0x3E8;\n+\t\t\telse\n+\t\t\t\tphy_reg |= 0xFA;\n+\t\t\te1e_wphy_locked(hw, I217_PLL_CLOCK_GATE_REG, phy_reg);\n+\t\t}\n \t\thw->phy.ops.release(hw);\n \n \t\tif (ret_val)\ndiff --git a/drivers/net/ethernet/intel/e1000e/ich8lan.h b/drivers/net/ethernet/intel/e1000e/ich8lan.h\nindex 34c551e..7d85f00 100644\n--- a/drivers/net/ethernet/intel/e1000e/ich8lan.h\n+++ b/drivers/net/ethernet/intel/e1000e/ich8lan.h\n@@ -226,6 +226,9 @@\n #define HV_PM_CTRL_PLL_STOP_IN_K1_GIGA\t0x100\n #define HV_PM_CTRL_K1_ENABLE\t\t0x4000\n \n+#define I217_PLL_CLOCK_GATE_REG\tPHY_REG(772, 28)\n+#define I217_PLL_CLOCK_GATE_MASK\t0x07FF\n+\n #define SW_FLAG_TIMEOUT\t\t1000\t/* SW Semaphore flag timeout in ms */\n \n /* Inband Control */\n", "prefixes": [ "2/5" ] }