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GET /api/patches/555313/?format=api
{ "id": 555313, "url": "http://patchwork.ozlabs.org/api/patches/555313/?format=api", "web_url": "http://patchwork.ozlabs.org/project/intel-wired-lan/patch/1449776331-8330-1-git-send-email-joshua.a.hay@intel.com/", "project": { "id": 46, "url": "http://patchwork.ozlabs.org/api/projects/46/?format=api", "name": "Intel Wired Ethernet development", "link_name": "intel-wired-lan", "list_id": "intel-wired-lan.osuosl.org", "list_email": "intel-wired-lan@osuosl.org", "web_url": "", "scm_url": "", "webscm_url": "", "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<1449776331-8330-1-git-send-email-joshua.a.hay@intel.com>", "list_archive_url": null, "date": "2015-12-10T19:38:49", "name": "[v2,next,S23,08/13] i40e: define function capabilities in only one place", "commit_ref": null, "pull_url": null, "state": "accepted", "archived": false, "hash": "96bd02079c1677542bb965fc3fa41138b463ec70", "submitter": { "id": 19461, "url": "http://patchwork.ozlabs.org/api/people/19461/?format=api", "name": "Joshua Hay", "email": "joshua.a.hay@intel.com" }, "delegate": { "id": 68, "url": "http://patchwork.ozlabs.org/api/users/68/?format=api", "username": "jtkirshe", "first_name": "Jeff", "last_name": "Kirsher", "email": "jeffrey.t.kirsher@intel.com" }, "mbox": "http://patchwork.ozlabs.org/project/intel-wired-lan/patch/1449776331-8330-1-git-send-email-joshua.a.hay@intel.com/mbox/", "series": [], "comments": "http://patchwork.ozlabs.org/api/patches/555313/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/555313/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<intel-wired-lan-bounces@lists.osuosl.org>", "X-Original-To": [ "incoming@patchwork.ozlabs.org", "intel-wired-lan@lists.osuosl.org" ], "Delivered-To": [ "patchwork-incoming@bilbo.ozlabs.org", "intel-wired-lan@lists.osuosl.org" ], "Received": [ "from silver.osuosl.org (smtp3.osuosl.org [140.211.166.136])\n\tby ozlabs.org (Postfix) with ESMTP id 76922140BE2\n\tfor <incoming@patchwork.ozlabs.org>;\n\tFri, 11 Dec 2015 06:38:57 +1100 (AEDT)", "from localhost (localhost [127.0.0.1])\n\tby silver.osuosl.org (Postfix) with ESMTP id BC28C33B9F;\n\tThu, 10 Dec 2015 19:38:56 +0000 (UTC)", "from silver.osuosl.org ([127.0.0.1])\n\tby localhost (.osuosl.org [127.0.0.1]) (amavisd-new, port 10024)\n\twith ESMTP id aOPaKaBdob5D; Thu, 10 Dec 2015 19:38:54 +0000 (UTC)", "from ash.osuosl.org (ash.osuosl.org [140.211.166.34])\n\tby silver.osuosl.org (Postfix) with ESMTP id 2B1C533BA1;\n\tThu, 10 Dec 2015 19:38:54 +0000 (UTC)", "from whitealder.osuosl.org (smtp1.osuosl.org [140.211.166.138])\n\tby ash.osuosl.org (Postfix) with ESMTP id 661061C11DE\n\tfor <intel-wired-lan@lists.osuosl.org>;\n\tThu, 10 Dec 2015 19:38:53 +0000 (UTC)", "from localhost (localhost [127.0.0.1])\n\tby whitealder.osuosl.org (Postfix) with ESMTP id 6281D928E8\n\tfor <intel-wired-lan@lists.osuosl.org>;\n\tThu, 10 Dec 2015 19:38:53 +0000 (UTC)", "from whitealder.osuosl.org ([127.0.0.1])\n\tby localhost (.osuosl.org [127.0.0.1]) (amavisd-new, port 10024)\n\twith ESMTP id likXKsH7+lZq for <intel-wired-lan@lists.osuosl.org>;\n\tThu, 10 Dec 2015 19:38:52 +0000 (UTC)", "from mga09.intel.com (mga09.intel.com [134.134.136.24])\n\tby whitealder.osuosl.org (Postfix) with ESMTP id 72F1E927BB\n\tfor <intel-wired-lan@lists.osuosl.org>;\n\tThu, 10 Dec 2015 19:38:52 +0000 (UTC)", "from fmsmga002.fm.intel.com ([10.253.24.26])\n\tby orsmga102.jf.intel.com with ESMTP; 10 Dec 2015 11:38:52 -0800", "from jahay1-mobl2.amr.corp.intel.com (HELO\n\tlocalhost.localdomain.localdomain) ([134.134.176.76])\n\tby fmsmga002.fm.intel.com with ESMTP; 10 Dec 2015 11:38:51 -0800" ], "X-Virus-Scanned": [ "amavisd-new at osuosl.org", "amavisd-new at osuosl.org" ], "X-Greylist": "domain auto-whitelisted by SQLgrey-1.7.6", "X-ExtLoop1": "1", "X-IronPort-AV": "E=Sophos;i=\"5.20,409,1444719600\"; d=\"scan'208\";a=\"871108418\"", "From": "Joshua Hay <joshua.a.hay@intel.com>", "To": "intel-wired-lan@lists.osuosl.org", "Date": "Thu, 10 Dec 2015 11:38:49 -0800", "Message-Id": "<1449776331-8330-1-git-send-email-joshua.a.hay@intel.com>", "X-Mailer": "git-send-email 2.1.0", "Subject": "[Intel-wired-lan] [v2 next PATCH S23 08/13] i40e: define function\n\tcapabilities in only one place", "X-BeenThere": "intel-wired-lan@lists.osuosl.org", "X-Mailman-Version": "2.1.18-1", "Precedence": "list", "List-Id": "Intel Wired Ethernet Linux Kernel Driver Development\n\t<intel-wired-lan.lists.osuosl.org>", "List-Unsubscribe": "<http://lists.osuosl.org/mailman/options/intel-wired-lan>, \n\t<mailto:intel-wired-lan-request@lists.osuosl.org?subject=unsubscribe>", "List-Archive": "<http://lists.osuosl.org/pipermail/intel-wired-lan/>", "List-Post": "<mailto:intel-wired-lan@lists.osuosl.org>", "List-Help": "<mailto:intel-wired-lan-request@lists.osuosl.org?subject=help>", "List-Subscribe": "<http://lists.osuosl.org/mailman/listinfo/intel-wired-lan>, \n\t<mailto:intel-wired-lan-request@lists.osuosl.org?subject=subscribe>", "MIME-Version": "1.0", "Content-Type": "text/plain; charset=\"us-ascii\"", "Content-Transfer-Encoding": "7bit", "Errors-To": "intel-wired-lan-bounces@lists.osuosl.org", "Sender": "\"Intel-wired-lan\" <intel-wired-lan-bounces@lists.osuosl.org>" }, "content": "From: Shannon Nelson <shannon.nelson@intel.com>\n\nThe device capabilities were defined in two places, and neither had all\nthe definitions. It really belongs with the AQ API definition, so this\npatch removes the other set of definitions and fills out the missing item.\n\nSigned-off-by: Shannon Nelson <shannon.nelson@intel.com>\nAcked-by: Jesse Brandeburg <jesse.brandeburg@intel.com>\nChange-ID: I273ba7d79a476cd11d2e0ca5825fec1716740de2\n---\nV2: remove second signed-off-by\n\nTesting Hints: Apply and compile cleanly\n\n drivers/net/ethernet/intel/i40e/i40e_adminq_cmd.h | 1 +\n drivers/net/ethernet/intel/i40e/i40e_common.c | 85 +++++++---------------\n .../net/ethernet/intel/i40evf/i40e_adminq_cmd.h | 1 +\n 3 files changed, 30 insertions(+), 57 deletions(-)", "diff": "diff --git a/drivers/net/ethernet/intel/i40e/i40e_adminq_cmd.h b/drivers/net/ethernet/intel/i40e/i40e_adminq_cmd.h\nindex b22012a..256ce65 100644\n--- a/drivers/net/ethernet/intel/i40e/i40e_adminq_cmd.h\n+++ b/drivers/net/ethernet/intel/i40e/i40e_adminq_cmd.h\n@@ -422,6 +422,7 @@ struct i40e_aqc_list_capabilities_element_resp {\n #define I40E_AQ_CAP_ID_LED\t\t0x0061\n #define I40E_AQ_CAP_ID_SDP\t\t0x0062\n #define I40E_AQ_CAP_ID_MDIO\t\t0x0063\n+#define I40E_AQ_CAP_ID_WSR_PROT\t\t0x0064\n #define I40E_AQ_CAP_ID_FLEX10\t\t0x00F1\n #define I40E_AQ_CAP_ID_CEM\t\t0x00F2\n \ndiff --git a/drivers/net/ethernet/intel/i40e/i40e_common.c b/drivers/net/ethernet/intel/i40e/i40e_common.c\nindex 6a034dd..4bdb08b 100644\n--- a/drivers/net/ethernet/intel/i40e/i40e_common.c\n+++ b/drivers/net/ethernet/intel/i40e/i40e_common.c\n@@ -2765,35 +2765,6 @@ i40e_aq_erase_nvm_exit:\n \treturn status;\n }\n \n-#define I40E_DEV_FUNC_CAP_SWITCH_MODE\t0x01\n-#define I40E_DEV_FUNC_CAP_MGMT_MODE\t0x02\n-#define I40E_DEV_FUNC_CAP_NPAR\t\t0x03\n-#define I40E_DEV_FUNC_CAP_OS2BMC\t0x04\n-#define I40E_DEV_FUNC_CAP_VALID_FUNC\t0x05\n-#define I40E_DEV_FUNC_CAP_SRIOV_1_1\t0x12\n-#define I40E_DEV_FUNC_CAP_VF\t\t0x13\n-#define I40E_DEV_FUNC_CAP_VMDQ\t\t0x14\n-#define I40E_DEV_FUNC_CAP_802_1_QBG\t0x15\n-#define I40E_DEV_FUNC_CAP_802_1_QBH\t0x16\n-#define I40E_DEV_FUNC_CAP_VSI\t\t0x17\n-#define I40E_DEV_FUNC_CAP_DCB\t\t0x18\n-#define I40E_DEV_FUNC_CAP_FCOE\t\t0x21\n-#define I40E_DEV_FUNC_CAP_ISCSI\t\t0x22\n-#define I40E_DEV_FUNC_CAP_RSS\t\t0x40\n-#define I40E_DEV_FUNC_CAP_RX_QUEUES\t0x41\n-#define I40E_DEV_FUNC_CAP_TX_QUEUES\t0x42\n-#define I40E_DEV_FUNC_CAP_MSIX\t\t0x43\n-#define I40E_DEV_FUNC_CAP_MSIX_VF\t0x44\n-#define I40E_DEV_FUNC_CAP_FLOW_DIRECTOR\t0x45\n-#define I40E_DEV_FUNC_CAP_IEEE_1588\t0x46\n-#define I40E_DEV_FUNC_CAP_FLEX10\t0xF1\n-#define I40E_DEV_FUNC_CAP_CEM\t\t0xF2\n-#define I40E_DEV_FUNC_CAP_IWARP\t\t0x51\n-#define I40E_DEV_FUNC_CAP_LED\t\t0x61\n-#define I40E_DEV_FUNC_CAP_SDP\t\t0x62\n-#define I40E_DEV_FUNC_CAP_MDIO\t\t0x63\n-#define I40E_DEV_FUNC_CAP_WR_CSR_PROT\t0x64\n-\n /**\n * i40e_parse_discover_capabilities\n * @hw: pointer to the hw struct\n@@ -2832,79 +2803,79 @@ static void i40e_parse_discover_capabilities(struct i40e_hw *hw, void *buff,\n \t\tmajor_rev = cap->major_rev;\n \n \t\tswitch (id) {\n-\t\tcase I40E_DEV_FUNC_CAP_SWITCH_MODE:\n+\t\tcase I40E_AQ_CAP_ID_SWITCH_MODE:\n \t\t\tp->switch_mode = number;\n \t\t\tbreak;\n-\t\tcase I40E_DEV_FUNC_CAP_MGMT_MODE:\n+\t\tcase I40E_AQ_CAP_ID_MNG_MODE:\n \t\t\tp->management_mode = number;\n \t\t\tbreak;\n-\t\tcase I40E_DEV_FUNC_CAP_NPAR:\n+\t\tcase I40E_AQ_CAP_ID_NPAR_ACTIVE:\n \t\t\tp->npar_enable = number;\n \t\t\tbreak;\n-\t\tcase I40E_DEV_FUNC_CAP_OS2BMC:\n+\t\tcase I40E_AQ_CAP_ID_OS2BMC_CAP:\n \t\t\tp->os2bmc = number;\n \t\t\tbreak;\n-\t\tcase I40E_DEV_FUNC_CAP_VALID_FUNC:\n+\t\tcase I40E_AQ_CAP_ID_FUNCTIONS_VALID:\n \t\t\tp->valid_functions = number;\n \t\t\tbreak;\n-\t\tcase I40E_DEV_FUNC_CAP_SRIOV_1_1:\n+\t\tcase I40E_AQ_CAP_ID_SRIOV:\n \t\t\tif (number == 1)\n \t\t\t\tp->sr_iov_1_1 = true;\n \t\t\tbreak;\n-\t\tcase I40E_DEV_FUNC_CAP_VF:\n+\t\tcase I40E_AQ_CAP_ID_VF:\n \t\t\tp->num_vfs = number;\n \t\t\tp->vf_base_id = logical_id;\n \t\t\tbreak;\n-\t\tcase I40E_DEV_FUNC_CAP_VMDQ:\n+\t\tcase I40E_AQ_CAP_ID_VMDQ:\n \t\t\tif (number == 1)\n \t\t\t\tp->vmdq = true;\n \t\t\tbreak;\n-\t\tcase I40E_DEV_FUNC_CAP_802_1_QBG:\n+\t\tcase I40E_AQ_CAP_ID_8021QBG:\n \t\t\tif (number == 1)\n \t\t\t\tp->evb_802_1_qbg = true;\n \t\t\tbreak;\n-\t\tcase I40E_DEV_FUNC_CAP_802_1_QBH:\n+\t\tcase I40E_AQ_CAP_ID_8021QBR:\n \t\t\tif (number == 1)\n \t\t\t\tp->evb_802_1_qbh = true;\n \t\t\tbreak;\n-\t\tcase I40E_DEV_FUNC_CAP_VSI:\n+\t\tcase I40E_AQ_CAP_ID_VSI:\n \t\t\tp->num_vsis = number;\n \t\t\tbreak;\n-\t\tcase I40E_DEV_FUNC_CAP_DCB:\n+\t\tcase I40E_AQ_CAP_ID_DCB:\n \t\t\tif (number == 1) {\n \t\t\t\tp->dcb = true;\n \t\t\t\tp->enabled_tcmap = logical_id;\n \t\t\t\tp->maxtc = phys_id;\n \t\t\t}\n \t\t\tbreak;\n-\t\tcase I40E_DEV_FUNC_CAP_FCOE:\n+\t\tcase I40E_AQ_CAP_ID_FCOE:\n \t\t\tif (number == 1)\n \t\t\t\tp->fcoe = true;\n \t\t\tbreak;\n-\t\tcase I40E_DEV_FUNC_CAP_ISCSI:\n+\t\tcase I40E_AQ_CAP_ID_ISCSI:\n \t\t\tif (number == 1)\n \t\t\t\tp->iscsi = true;\n \t\t\tbreak;\n-\t\tcase I40E_DEV_FUNC_CAP_RSS:\n+\t\tcase I40E_AQ_CAP_ID_RSS:\n \t\t\tp->rss = true;\n \t\t\tp->rss_table_size = number;\n \t\t\tp->rss_table_entry_width = logical_id;\n \t\t\tbreak;\n-\t\tcase I40E_DEV_FUNC_CAP_RX_QUEUES:\n+\t\tcase I40E_AQ_CAP_ID_RXQ:\n \t\t\tp->num_rx_qp = number;\n \t\t\tp->base_queue = phys_id;\n \t\t\tbreak;\n-\t\tcase I40E_DEV_FUNC_CAP_TX_QUEUES:\n+\t\tcase I40E_AQ_CAP_ID_TXQ:\n \t\t\tp->num_tx_qp = number;\n \t\t\tp->base_queue = phys_id;\n \t\t\tbreak;\n-\t\tcase I40E_DEV_FUNC_CAP_MSIX:\n+\t\tcase I40E_AQ_CAP_ID_MSIX:\n \t\t\tp->num_msix_vectors = number;\n \t\t\tbreak;\n-\t\tcase I40E_DEV_FUNC_CAP_MSIX_VF:\n+\t\tcase I40E_AQ_CAP_ID_VF_MSIX:\n \t\t\tp->num_msix_vectors_vf = number;\n \t\t\tbreak;\n-\t\tcase I40E_DEV_FUNC_CAP_FLEX10:\n+\t\tcase I40E_AQ_CAP_ID_FLEX10:\n \t\t\tif (major_rev == 1) {\n \t\t\t\tif (number == 1) {\n \t\t\t\t\tp->flex10_enable = true;\n@@ -2920,38 +2891,38 @@ static void i40e_parse_discover_capabilities(struct i40e_hw *hw, void *buff,\n \t\t\tp->flex10_mode = logical_id;\n \t\t\tp->flex10_status = phys_id;\n \t\t\tbreak;\n-\t\tcase I40E_DEV_FUNC_CAP_CEM:\n+\t\tcase I40E_AQ_CAP_ID_CEM:\n \t\t\tif (number == 1)\n \t\t\t\tp->mgmt_cem = true;\n \t\t\tbreak;\n-\t\tcase I40E_DEV_FUNC_CAP_IWARP:\n+\t\tcase I40E_AQ_CAP_ID_IWARP:\n \t\t\tif (number == 1)\n \t\t\t\tp->iwarp = true;\n \t\t\tbreak;\n-\t\tcase I40E_DEV_FUNC_CAP_LED:\n+\t\tcase I40E_AQ_CAP_ID_LED:\n \t\t\tif (phys_id < I40E_HW_CAP_MAX_GPIO)\n \t\t\t\tp->led[phys_id] = true;\n \t\t\tbreak;\n-\t\tcase I40E_DEV_FUNC_CAP_SDP:\n+\t\tcase I40E_AQ_CAP_ID_SDP:\n \t\t\tif (phys_id < I40E_HW_CAP_MAX_GPIO)\n \t\t\t\tp->sdp[phys_id] = true;\n \t\t\tbreak;\n-\t\tcase I40E_DEV_FUNC_CAP_MDIO:\n+\t\tcase I40E_AQ_CAP_ID_MDIO:\n \t\t\tif (number == 1) {\n \t\t\t\tp->mdio_port_num = phys_id;\n \t\t\t\tp->mdio_port_mode = logical_id;\n \t\t\t}\n \t\t\tbreak;\n-\t\tcase I40E_DEV_FUNC_CAP_IEEE_1588:\n+\t\tcase I40E_AQ_CAP_ID_1588:\n \t\t\tif (number == 1)\n \t\t\t\tp->ieee_1588 = true;\n \t\t\tbreak;\n-\t\tcase I40E_DEV_FUNC_CAP_FLOW_DIRECTOR:\n+\t\tcase I40E_AQ_CAP_ID_FLOW_DIRECTOR:\n \t\t\tp->fd = true;\n \t\t\tp->fd_filters_guaranteed = number;\n \t\t\tp->fd_filters_best_effort = logical_id;\n \t\t\tbreak;\n-\t\tcase I40E_DEV_FUNC_CAP_WR_CSR_PROT:\n+\t\tcase I40E_AQ_CAP_ID_WSR_PROT:\n \t\t\tp->wr_csr_prot = (u64)number;\n \t\t\tp->wr_csr_prot |= (u64)logical_id << 32;\n \t\t\tbreak;\ndiff --git a/drivers/net/ethernet/intel/i40evf/i40e_adminq_cmd.h b/drivers/net/ethernet/intel/i40evf/i40e_adminq_cmd.h\nindex f5b2b36..0d3bc3b 100644\n--- a/drivers/net/ethernet/intel/i40evf/i40e_adminq_cmd.h\n+++ b/drivers/net/ethernet/intel/i40evf/i40e_adminq_cmd.h\n@@ -419,6 +419,7 @@ struct i40e_aqc_list_capabilities_element_resp {\n #define I40E_AQ_CAP_ID_LED\t\t0x0061\n #define I40E_AQ_CAP_ID_SDP\t\t0x0062\n #define I40E_AQ_CAP_ID_MDIO\t\t0x0063\n+#define I40E_AQ_CAP_ID_WSR_PROT\t\t0x0064\n #define I40E_AQ_CAP_ID_FLEX10\t\t0x00F1\n #define I40E_AQ_CAP_ID_CEM\t\t0x00F2\n \n", "prefixes": [ "v2", "next", "S23", "08/13" ] }