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GET /api/patches/531513/?format=api
{ "id": 531513, "url": "http://patchwork.ozlabs.org/api/patches/531513/?format=api", "web_url": "http://patchwork.ozlabs.org/project/intel-wired-lan/patch/1445018231-3196-11-git-send-email-jacob.e.keller@intel.com/", "project": { "id": 46, "url": "http://patchwork.ozlabs.org/api/projects/46/?format=api", "name": "Intel Wired Ethernet development", "link_name": "intel-wired-lan", "list_id": "intel-wired-lan.osuosl.org", "list_email": "intel-wired-lan@osuosl.org", "web_url": "", "scm_url": "", "webscm_url": "", "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<1445018231-3196-11-git-send-email-jacob.e.keller@intel.com>", "list_archive_url": null, "date": "2015-10-16T17:57:05", "name": "[next-queue,v5,11/17] fm10k: Add support for ITR scaling based on PCIe link speed", "commit_ref": null, "pull_url": null, "state": "accepted", "archived": false, "hash": "b6faac89420ef284d05e8c96744c17b7bc40ee54", "submitter": { "id": 9784, "url": "http://patchwork.ozlabs.org/api/people/9784/?format=api", "name": "Jacob Keller", "email": "jacob.e.keller@intel.com" }, "delegate": { "id": 68, "url": "http://patchwork.ozlabs.org/api/users/68/?format=api", "username": "jtkirshe", "first_name": "Jeff", "last_name": "Kirsher", "email": "jeffrey.t.kirsher@intel.com" }, "mbox": "http://patchwork.ozlabs.org/project/intel-wired-lan/patch/1445018231-3196-11-git-send-email-jacob.e.keller@intel.com/mbox/", "series": [], "comments": "http://patchwork.ozlabs.org/api/patches/531513/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/531513/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<intel-wired-lan-bounces@lists.osuosl.org>", "X-Original-To": [ "incoming@patchwork.ozlabs.org", "intel-wired-lan@lists.osuosl.org" ], "Delivered-To": [ "patchwork-incoming@bilbo.ozlabs.org", "intel-wired-lan@lists.osuosl.org" ], "Received": [ "from silver.osuosl.org (smtp3.osuosl.org [140.211.166.136])\n\tby ozlabs.org (Postfix) with ESMTP id 11FB814110D\n\tfor <incoming@patchwork.ozlabs.org>;\n\tSat, 17 Oct 2015 04:57:35 +1100 (AEDT)", "from localhost (localhost [127.0.0.1])\n\tby silver.osuosl.org (Postfix) with ESMTP id 5F50930BEE;\n\tFri, 16 Oct 2015 17:57:34 +0000 (UTC)", "from silver.osuosl.org ([127.0.0.1])\n\tby localhost (.osuosl.org [127.0.0.1]) (amavisd-new, port 10024)\n\twith ESMTP id zdMhhwnCO1XD; Fri, 16 Oct 2015 17:57:29 +0000 (UTC)", "from ash.osuosl.org (ash.osuosl.org [140.211.166.34])\n\tby silver.osuosl.org (Postfix) with ESMTP id 69643332FC;\n\tFri, 16 Oct 2015 17:57:20 +0000 (UTC)", "from hemlock.osuosl.org (smtp2.osuosl.org [140.211.166.133])\n\tby ash.osuosl.org (Postfix) with ESMTP id C4AC51C16C8\n\tfor <intel-wired-lan@lists.osuosl.org>;\n\tFri, 16 Oct 2015 17:57:16 +0000 (UTC)", "from localhost (localhost [127.0.0.1])\n\tby hemlock.osuosl.org (Postfix) with ESMTP id C106E8ACA5\n\tfor <intel-wired-lan@lists.osuosl.org>;\n\tFri, 16 Oct 2015 17:57:16 +0000 (UTC)", "from hemlock.osuosl.org ([127.0.0.1])\n\tby localhost (.osuosl.org [127.0.0.1]) (amavisd-new, port 10024)\n\twith ESMTP id 0ULarho5ShvZ for <intel-wired-lan@lists.osuosl.org>;\n\tFri, 16 Oct 2015 17:57:15 +0000 (UTC)", "from mga03.intel.com (mga03.intel.com [134.134.136.65])\n\tby hemlock.osuosl.org (Postfix) with ESMTP id 3461493B1F\n\tfor <intel-wired-lan@lists.osuosl.org>;\n\tFri, 16 Oct 2015 17:57:15 +0000 (UTC)", "from fmsmga001.fm.intel.com ([10.253.24.23])\n\tby orsmga103.jf.intel.com with ESMTP; 16 Oct 2015 10:57:15 -0700", "from jekeller-desk.amr.corp.intel.com ([134.134.3.123])\n\tby fmsmga001.fm.intel.com with ESMTP; 16 Oct 2015 10:57:15 -0700" ], "X-Virus-Scanned": [ "amavisd-new at osuosl.org", "amavisd-new at osuosl.org" ], "X-Greylist": "domain auto-whitelisted by SQLgrey-1.7.6", "X-ExtLoop1": "1", "X-IronPort-AV": "E=Sophos;i=\"5.17,689,1437462000\"; d=\"scan'208\";a=\"812781785\"", "From": "Jacob Keller <jacob.e.keller@intel.com>", "To": "Intel Wired LAN <intel-wired-lan@lists.osuosl.org>", "Date": "Fri, 16 Oct 2015 10:57:05 -0700", "Message-Id": "<1445018231-3196-11-git-send-email-jacob.e.keller@intel.com>", "X-Mailer": "git-send-email 2.6.1.264.gbab76a9", "In-Reply-To": "<1445018231-3196-1-git-send-email-jacob.e.keller@intel.com>", "References": "<1445018231-3196-1-git-send-email-jacob.e.keller@intel.com>", "Subject": "[Intel-wired-lan] [next-queue v5 11/17] fm10k: Add support for ITR\n\tscaling based on PCIe link speed", "X-BeenThere": "intel-wired-lan@lists.osuosl.org", "X-Mailman-Version": "2.1.18-1", "Precedence": "list", "List-Id": "Intel Wired Ethernet Linux Kernel Driver Development\n\t<intel-wired-lan.lists.osuosl.org>", "List-Unsubscribe": "<http://lists.osuosl.org/mailman/options/intel-wired-lan>, \n\t<mailto:intel-wired-lan-request@lists.osuosl.org?subject=unsubscribe>", "List-Archive": "<http://lists.osuosl.org/pipermail/intel-wired-lan/>", "List-Post": "<mailto:intel-wired-lan@lists.osuosl.org>", "List-Help": "<mailto:intel-wired-lan-request@lists.osuosl.org?subject=help>", "List-Subscribe": "<http://lists.osuosl.org/mailman/listinfo/intel-wired-lan>, \n\t<mailto:intel-wired-lan-request@lists.osuosl.org?subject=subscribe>", "MIME-Version": "1.0", "Content-Type": "text/plain; charset=\"us-ascii\"", "Content-Transfer-Encoding": "7bit", "Errors-To": "intel-wired-lan-bounces@lists.osuosl.org", "Sender": "\"Intel-wired-lan\" <intel-wired-lan-bounces@lists.osuosl.org>" }, "content": "The Intel Ethernet Switch FM10000 Host Interface interrupt throttle\ntimers are based on the PCIe link speed. Because of this, the value\nbeing programmed into the ITR registers must be scaled accordingly.\n\nFor the PF, this is as simple as reading the PCIe link speed and storing\nthe result. However, in the case of SR-IOV, the VF's interrupt throttle\ntimers are based on the link speed of the PF. However, the VF is unable\nto get the link speed information from its configuration space, so the\nPF must inform it of what scale to use.\n\nRather than pass this scale via mailbox message, take advantage of\nunused bits in the TDLEN register to pass the scale. It is the\nresponsibility of the PF to program this for the VF while setting up the\nVF queues and the responsibility of the VF to get the information\naccordingly. This is preferable because it allows the VF to set up the\ninterrupts properly during initialization and matches how the MAC\naddress is passed in the TDBAL/TDBAH registers.\n\nSince we're modifying fm10k_type.h, we may as well also update the\ncopyright year.\n\nReported-by: Matthew Vick <matthew.vick@intel.com>\nSigned-off-by: Jacob Keller <jacob.e.keller@intel.com>\n---\n drivers/net/ethernet/intel/fm10k/fm10k_pf.c | 22 +++++++++++++++++++++-\n drivers/net/ethernet/intel/fm10k/fm10k_type.h | 17 ++++++++++++++++-\n drivers/net/ethernet/intel/fm10k/fm10k_vf.c | 20 ++++++++++++++++++--\n 3 files changed, 55 insertions(+), 4 deletions(-)", "diff": "diff --git a/drivers/net/ethernet/intel/fm10k/fm10k_pf.c b/drivers/net/ethernet/intel/fm10k/fm10k_pf.c\nindex 00f7a29e734f..8b9b6ba5b92b 100644\n--- a/drivers/net/ethernet/intel/fm10k/fm10k_pf.c\n+++ b/drivers/net/ethernet/intel/fm10k/fm10k_pf.c\n@@ -150,19 +150,26 @@ static s32 fm10k_init_hw_pf(struct fm10k_hw *hw)\n \t\t\t\tFM10K_TPH_RXCTRL_HDR_WROEN);\n \t}\n \n-\t/* set max hold interval to align with 1.024 usec in all modes */\n+\t/* set max hold interval to align with 1.024 usec in all modes and\n+\t * store ITR scale\n+\t */\n \tswitch (hw->bus.speed) {\n \tcase fm10k_bus_speed_2500:\n \t\tdma_ctrl = FM10K_DMA_CTRL_MAX_HOLD_1US_GEN1;\n+\t\thw->mac.itr_scale = FM10K_TDLEN_ITR_SCALE_GEN1;\n \t\tbreak;\n \tcase fm10k_bus_speed_5000:\n \t\tdma_ctrl = FM10K_DMA_CTRL_MAX_HOLD_1US_GEN2;\n+\t\thw->mac.itr_scale = FM10K_TDLEN_ITR_SCALE_GEN2;\n \t\tbreak;\n \tcase fm10k_bus_speed_8000:\n \t\tdma_ctrl = FM10K_DMA_CTRL_MAX_HOLD_1US_GEN3;\n+\t\thw->mac.itr_scale = FM10K_TDLEN_ITR_SCALE_GEN3;\n \t\tbreak;\n \tdefault:\n \t\tdma_ctrl = 0;\n+\t\t/* just in case, assume Gen3 ITR scale */\n+\t\thw->mac.itr_scale = FM10K_TDLEN_ITR_SCALE_GEN3;\n \t\tbreak;\n \t}\n \n@@ -903,6 +910,13 @@ static s32 fm10k_iov_assign_default_mac_vlan_pf(struct fm10k_hw *hw,\n \tfm10k_write_reg(hw, FM10K_TDBAL(vf_q_idx), tdbal);\n \tfm10k_write_reg(hw, FM10K_TDBAH(vf_q_idx), tdbah);\n \n+\t/* Provide the VF the ITR scale, using software-defined fields in TDLEN\n+\t * to pass the information during VF initialization. See definition of\n+\t * FM10K_TDLEN_ITR_SCALE_SHIFT for more details.\n+\t */\n+\tfm10k_write_reg(hw, FM10K_TDLEN(vf_q_idx), hw->mac.itr_scale <<\n+\t\t\t\t\t\t FM10K_TDLEN_ITR_SCALE_SHIFT);\n+\n err_out:\n \t/* configure Queue control register */\n \ttxqctl = ((u32)vf_vid << FM10K_TXQCTL_VID_SHIFT) &\n@@ -1035,6 +1049,12 @@ static s32 fm10k_iov_reset_resources_pf(struct fm10k_hw *hw,\n \tfor (i = queues_per_pool; i--;) {\n \t\tfm10k_write_reg(hw, FM10K_TDBAL(vf_q_idx + i), tdbal);\n \t\tfm10k_write_reg(hw, FM10K_TDBAH(vf_q_idx + i), tdbah);\n+\t\t/* See definition of FM10K_TDLEN_ITR_SCALE_SHIFT for an\n+\t\t * explanation of how TDLEN is used.\n+\t\t */\n+\t\tfm10k_write_reg(hw, FM10K_TDLEN(vf_q_idx + i),\n+\t\t\t\thw->mac.itr_scale <<\n+\t\t\t\tFM10K_TDLEN_ITR_SCALE_SHIFT);\n \t\tfm10k_write_reg(hw, FM10K_TQMAP(qmap_idx + i), vf_q_idx + i);\n \t\tfm10k_write_reg(hw, FM10K_RQMAP(qmap_idx + i), vf_q_idx + i);\n \t}\ndiff --git a/drivers/net/ethernet/intel/fm10k/fm10k_type.h b/drivers/net/ethernet/intel/fm10k/fm10k_type.h\nindex 35afd711d144..02727250ce1f 100644\n--- a/drivers/net/ethernet/intel/fm10k/fm10k_type.h\n+++ b/drivers/net/ethernet/intel/fm10k/fm10k_type.h\n@@ -1,5 +1,5 @@\n /* Intel Ethernet Switch Host Interface Driver\n- * Copyright(c) 2013 - 2014 Intel Corporation.\n+ * Copyright(c) 2013 - 2015 Intel Corporation.\n *\n * This program is free software; you can redistribute it and/or modify it\n * under the terms and conditions of the GNU General Public License,\n@@ -272,6 +272,20 @@ struct fm10k_hw;\n #define FM10K_TDBAL(_n)\t\t((0x40 * (_n)) + 0x8000)\n #define FM10K_TDBAH(_n)\t\t((0x40 * (_n)) + 0x8001)\n #define FM10K_TDLEN(_n)\t\t((0x40 * (_n)) + 0x8002)\n+/* When fist initialized, VFs need to know the Interrupt Throttle Rate (ITR)\n+ * scale which is based on the PCIe speed but the speed information in the PCI\n+ * configuration space may not be accurate. The PF already knows the ITR scale\n+ * but there is no defined method to pass that information from the PF to the\n+ * VF. This is accomplished during VF initialization by temporarily co-opting\n+ * the yet-to-be-used TDLEN register to have the PF store the ITR shift for\n+ * the VF to retrieve before the VF needs to use the TDLEN register for its\n+ * intended purpose, i.e. before the Tx resources are allocated.\n+ */\n+#define FM10K_TDLEN_ITR_SCALE_SHIFT\t\t9\n+#define FM10K_TDLEN_ITR_SCALE_MASK\t\t0x00000E00\n+#define FM10K_TDLEN_ITR_SCALE_GEN1\t\t2\n+#define FM10K_TDLEN_ITR_SCALE_GEN2\t\t1\n+#define FM10K_TDLEN_ITR_SCALE_GEN3\t\t0\n #define FM10K_TPH_TXCTRL(_n)\t((0x40 * (_n)) + 0x8003)\n #define FM10K_TPH_TXCTRL_DESC_TPHEN\t\t0x00000020\n #define FM10K_TPH_TXCTRL_DESC_RROEN\t\t0x00000200\n@@ -560,6 +574,7 @@ struct fm10k_mac_info {\n \tbool get_host_state;\n \tbool tx_ready;\n \tu32 dglort_map;\n+\tu8 itr_scale;\n };\n \n struct fm10k_swapi_table_info {\ndiff --git a/drivers/net/ethernet/intel/fm10k/fm10k_vf.c b/drivers/net/ethernet/intel/fm10k/fm10k_vf.c\nindex d512575c33f3..2af697df5abc 100644\n--- a/drivers/net/ethernet/intel/fm10k/fm10k_vf.c\n+++ b/drivers/net/ethernet/intel/fm10k/fm10k_vf.c\n@@ -28,7 +28,7 @@\n static s32 fm10k_stop_hw_vf(struct fm10k_hw *hw)\n {\n \tu8 *perm_addr = hw->mac.perm_addr;\n-\tu32 bal = 0, bah = 0;\n+\tu32 bal = 0, bah = 0, tdlen;\n \ts32 err;\n \tu16 i;\n \n@@ -48,6 +48,9 @@ static s32 fm10k_stop_hw_vf(struct fm10k_hw *hw)\n \t\t ((u32)perm_addr[2]);\n \t}\n \n+\t/* restore default itr_scale for next VF initialization */\n+\ttdlen = hw->mac.itr_scale << FM10K_TDLEN_ITR_SCALE_SHIFT;\n+\n \t/* The queues have already been disabled so we just need to\n \t * update their base address registers\n \t */\n@@ -56,6 +59,12 @@ static s32 fm10k_stop_hw_vf(struct fm10k_hw *hw)\n \t\tfm10k_write_reg(hw, FM10K_TDBAH(i), bah);\n \t\tfm10k_write_reg(hw, FM10K_RDBAL(i), bal);\n \t\tfm10k_write_reg(hw, FM10K_RDBAH(i), bah);\n+\t\t/* Restore ITR scale in software-defined mechanism in TDLEN\n+\t\t * for next VF initialization. See definition of\n+\t\t * FM10K_TDLEN_ITR_SCALE_SHIFT for more details on the use of\n+\t\t * TDLEN here.\n+\t\t */\n+\t\tfm10k_write_reg(hw, FM10K_TDLEN(i), tdlen);\n \t}\n \n \treturn 0;\n@@ -131,9 +140,16 @@ static s32 fm10k_init_hw_vf(struct fm10k_hw *hw)\n \t/* record maximum queue count */\n \thw->mac.max_queues = i;\n \n-\t/* fetch default VLAN */\n+\t/* fetch default VLAN and ITR scale */\n \thw->mac.default_vid = (fm10k_read_reg(hw, FM10K_TXQCTL(0)) &\n \t\t\t FM10K_TXQCTL_VID_MASK) >> FM10K_TXQCTL_VID_SHIFT;\n+\t/* Read the ITR scale from TDLEN. See the definition of\n+\t * FM10K_TDLEN_ITR_SCALE_SHIFT for more information about how TDLEN is\n+\t * used here.\n+\t */\n+\thw->mac.itr_scale = (fm10k_read_reg(hw, FM10K_TDLEN(0)) &\n+\t\t\t FM10K_TDLEN_ITR_SCALE_MASK) >>\n+\t\t\t FM10K_TDLEN_ITR_SCALE_SHIFT;\n \n \treturn 0;\n \n", "prefixes": [ "next-queue", "v5", "11/17" ] }