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GET /api/patches/519605/?format=api
{ "id": 519605, "url": "http://patchwork.ozlabs.org/api/patches/519605/?format=api", "web_url": "http://patchwork.ozlabs.org/project/intel-wired-lan/patch/20150918224351.5228.90499.stgit@htfujina-fc.jf.intel.com/", "project": { "id": 46, "url": "http://patchwork.ozlabs.org/api/projects/46/?format=api", "name": "Intel Wired Ethernet development", "link_name": "intel-wired-lan", "list_id": "intel-wired-lan.osuosl.org", "list_email": "intel-wired-lan@osuosl.org", "web_url": "", "scm_url": "", "webscm_url": "", "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<20150918224351.5228.90499.stgit@htfujina-fc.jf.intel.com>", "list_archive_url": null, "date": "2015-09-18T22:43:51", "name": "igb: use the correct i210 register for EEMNGCTL", "commit_ref": null, "pull_url": null, "state": "accepted", "archived": false, "hash": "fe896d9404bf22ee7b64ca9f36f3ac3f3d36037c", "submitter": { "id": 29211, "url": "http://patchwork.ozlabs.org/api/people/29211/?format=api", "name": "Fujinaka, Todd", "email": "todd.fujinaka@intel.com" }, "delegate": { "id": 68, "url": "http://patchwork.ozlabs.org/api/users/68/?format=api", "username": "jtkirshe", "first_name": "Jeff", "last_name": "Kirsher", "email": "jeffrey.t.kirsher@intel.com" }, "mbox": "http://patchwork.ozlabs.org/project/intel-wired-lan/patch/20150918224351.5228.90499.stgit@htfujina-fc.jf.intel.com/mbox/", "series": [], "comments": "http://patchwork.ozlabs.org/api/patches/519605/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/519605/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<intel-wired-lan-bounces@lists.osuosl.org>", "X-Original-To": [ "incoming@patchwork.ozlabs.org", "intel-wired-lan@lists.osuosl.org" ], "Delivered-To": [ "patchwork-incoming@bilbo.ozlabs.org", "intel-wired-lan@lists.osuosl.org" ], "Received": [ "from fraxinus.osuosl.org (smtp4.osuosl.org [140.211.166.137])\n\tby ozlabs.org (Postfix) with ESMTP id 5BE3B140A98\n\tfor <incoming@patchwork.ozlabs.org>;\n\tSat, 19 Sep 2015 08:45:20 +1000 (AEST)", "from localhost (localhost [127.0.0.1])\n\tby fraxinus.osuosl.org (Postfix) with ESMTP id E599DA3A6F;\n\tFri, 18 Sep 2015 22:45:19 +0000 (UTC)", "from fraxinus.osuosl.org ([127.0.0.1])\n\tby localhost (.osuosl.org [127.0.0.1]) (amavisd-new, port 10024)\n\twith ESMTP id iwo_XhvqcTJB; Fri, 18 Sep 2015 22:45:18 +0000 (UTC)", "from ash.osuosl.org (ash.osuosl.org [140.211.166.34])\n\tby fraxinus.osuosl.org (Postfix) with ESMTP id 08F81A397C;\n\tFri, 18 Sep 2015 22:45:18 +0000 (UTC)", "from whitealder.osuosl.org (smtp1.osuosl.org [140.211.166.138])\n\tby ash.osuosl.org (Postfix) with ESMTP id 543A31CEAE4\n\tfor <intel-wired-lan@lists.osuosl.org>;\n\tFri, 18 Sep 2015 22:45:17 +0000 (UTC)", "from localhost (localhost [127.0.0.1])\n\tby whitealder.osuosl.org (Postfix) with ESMTP id 4E9A988C96\n\tfor <intel-wired-lan@lists.osuosl.org>;\n\tFri, 18 Sep 2015 22:45:17 +0000 (UTC)", "from whitealder.osuosl.org ([127.0.0.1])\n\tby localhost (.osuosl.org [127.0.0.1]) (amavisd-new, port 10024)\n\twith ESMTP id kV7FLmlj96dZ for <intel-wired-lan@lists.osuosl.org>;\n\tFri, 18 Sep 2015 22:45:16 +0000 (UTC)", "from mga14.intel.com (mga14.intel.com [192.55.52.115])\n\tby whitealder.osuosl.org (Postfix) with ESMTP id 5995888C94\n\tfor <intel-wired-lan@lists.osuosl.org>;\n\tFri, 18 Sep 2015 22:45:16 +0000 (UTC)", "from fmsmga003.fm.intel.com ([10.253.24.29])\n\tby fmsmga103.fm.intel.com with ESMTP; 18 Sep 2015 15:45:15 -0700", "from htfujina-fc.jf.intel.com ([134.134.145.143])\n\tby FMSMGA003.fm.intel.com with ESMTP; 18 Sep 2015 15:45:15 -0700" ], "X-Virus-Scanned": [ "amavisd-new at osuosl.org", "amavisd-new at osuosl.org" ], "X-Greylist": "domain auto-whitelisted by SQLgrey-1.7.6", "X-ExtLoop1": "1", "X-IronPort-AV": "E=Sophos;i=\"5.17,555,1437462000\"; d=\"scan'208\";a=\"564521218\"", "From": "Todd Fujinaka <todd.fujinaka@intel.com>", "To": "roman.aud@siemens.com, intel-wired-lan@lists.osuosl.org", "Date": "Fri, 18 Sep 2015 15:43:51 -0700", "Message-ID": "<20150918224351.5228.90499.stgit@htfujina-fc.jf.intel.com>", "User-Agent": "StGit/0.17.1-dirty", "MIME-Version": "1.0", "Subject": "[Intel-wired-lan] [PATCH] igb: use the correct i210 register for\n\tEEMNGCTL", "X-BeenThere": "intel-wired-lan@lists.osuosl.org", "X-Mailman-Version": "2.1.18-1", "Precedence": "list", "List-Id": "Intel Wired Ethernet Linux Kernel Driver Development\n\t<intel-wired-lan.lists.osuosl.org>", "List-Unsubscribe": "<http://lists.osuosl.org/mailman/options/intel-wired-lan>, \n\t<mailto:intel-wired-lan-request@lists.osuosl.org?subject=unsubscribe>", "List-Archive": "<http://lists.osuosl.org/pipermail/intel-wired-lan/>", "List-Post": "<mailto:intel-wired-lan@lists.osuosl.org>", "List-Help": "<mailto:intel-wired-lan-request@lists.osuosl.org?subject=help>", "List-Subscribe": "<http://lists.osuosl.org/mailman/listinfo/intel-wired-lan>, \n\t<mailto:intel-wired-lan-request@lists.osuosl.org?subject=subscribe>", "Content-Type": "text/plain; charset=\"us-ascii\"", "Content-Transfer-Encoding": "7bit", "Errors-To": "intel-wired-lan-bounces@lists.osuosl.org", "Sender": "\"Intel-wired-lan\" <intel-wired-lan-bounces@lists.osuosl.org>" }, "content": "The i210 has two EEPROM access registers that are located in\nnon-standard offsets: EEARBC and EEMNGCTL. EEARBC was fixed previously\nand EEMNGCTL should also be corrected.\n\nSigned-off-by: Todd Fujinaka <todd.fujinaka@intel.com>\nReported-by: \"Hodek, Roman\" <roman.aud@siemens.com>\n---\n drivers/net/ethernet/intel/igb/e1000_82575.c | 1 +\n drivers/net/ethernet/intel/igb/e1000_i210.c | 27 ++++++++++++++++++++++++++\n drivers/net/ethernet/intel/igb/e1000_i210.h | 1 +\n drivers/net/ethernet/intel/igb/e1000_regs.h | 1 +\n 4 files changed, 30 insertions(+)", "diff": "diff --git a/drivers/net/ethernet/intel/igb/e1000_82575.c b/drivers/net/ethernet/intel/igb/e1000_82575.c\nindex 7a73510..fbd3ab7 100644\n--- a/drivers/net/ethernet/intel/igb/e1000_82575.c\n+++ b/drivers/net/ethernet/intel/igb/e1000_82575.c\n@@ -294,6 +294,7 @@ static s32 igb_init_phy_params_82575(struct e1000_hw *hw)\n \tcase I210_I_PHY_ID:\n \t\tphy->type\t\t= e1000_phy_i210;\n \t\tphy->ops.check_polarity\t= igb_check_polarity_m88;\n+\t\tphy->ops.get_cfg_done = igb_get_cfg_done_i210;\n \t\tphy->ops.get_phy_info\t= igb_get_phy_info_m88;\n \t\tphy->ops.get_cable_length = igb_get_cable_length_m88_gen2;\n \t\tphy->ops.set_d0_lplu_state = igb_set_d0_lplu_state_82580;\ndiff --git a/drivers/net/ethernet/intel/igb/e1000_i210.c b/drivers/net/ethernet/intel/igb/e1000_i210.c\nindex 65d9316..29f59c7 100644\n--- a/drivers/net/ethernet/intel/igb/e1000_i210.c\n+++ b/drivers/net/ethernet/intel/igb/e1000_i210.c\n@@ -900,3 +900,30 @@ s32 igb_pll_workaround_i210(struct e1000_hw *hw)\n \twr32(E1000_MDICNFG, mdicnfg);\n \treturn ret_val;\n }\n+\n+/**\n+ * igb_get_cfg_done_i210 - Read config done bit\n+ * @hw: pointer to the HW structure\n+ *\n+ * Read the management control register for the config done bit for\n+ * completion status. NOTE: silicon which is EEPROM-less will fail trying\n+ * to read the config done bit, so an error is *ONLY* logged and returns\n+ * 0. If we were to return with error, EEPROM-less silicon\n+ * would not be able to be reset or change link.\n+ **/\n+s32 igb_get_cfg_done_i210(struct e1000_hw *hw)\n+{\n+\ts32 timeout = PHY_CFG_TIMEOUT;\n+\tu32 mask = E1000_NVM_CFG_DONE_PORT_0;\n+\n+\twhile (timeout) {\n+\t\tif (rd32(E1000_EEMNGCTL_I210) & mask)\n+\t\t\tbreak;\n+\t\tusleep_range(1000, 2000);\n+\t\ttimeout--;\n+\t}\n+\tif (!timeout)\n+\t\thw_dbg(\"MNG configuration cycle has not completed.\\n\");\n+\n+\treturn 0;\n+}\ndiff --git a/drivers/net/ethernet/intel/igb/e1000_i210.h b/drivers/net/ethernet/intel/igb/e1000_i210.h\nindex 3442b63..eaa68a5 100644\n--- a/drivers/net/ethernet/intel/igb/e1000_i210.h\n+++ b/drivers/net/ethernet/intel/igb/e1000_i210.h\n@@ -34,6 +34,7 @@ s32 igb_write_xmdio_reg(struct e1000_hw *hw, u16 addr, u8 dev_addr, u16 data);\n s32 igb_init_nvm_params_i210(struct e1000_hw *hw);\n bool igb_get_flash_presence_i210(struct e1000_hw *hw);\n s32 igb_pll_workaround_i210(struct e1000_hw *hw);\n+s32 igb_get_cfg_done_i210(struct e1000_hw *hw);\n \n #define E1000_STM_OPCODE\t\t0xDB00\n #define E1000_EEPROM_FLASH_SIZE_WORD\t0x11\ndiff --git a/drivers/net/ethernet/intel/igb/e1000_regs.h b/drivers/net/ethernet/intel/igb/e1000_regs.h\nindex 4af2870..0fdcd4d 100644\n--- a/drivers/net/ethernet/intel/igb/e1000_regs.h\n+++ b/drivers/net/ethernet/intel/igb/e1000_regs.h\n@@ -66,6 +66,7 @@\n #define E1000_PBA 0x01000 /* Packet Buffer Allocation - RW */\n #define E1000_PBS 0x01008 /* Packet Buffer Size */\n #define E1000_EEMNGCTL 0x01010 /* MNG EEprom Control */\n+#define E1000_EEMNGCTL_I210 0x12030 /* MNG EEprom Control */\n #define E1000_EEARBC_I210 0x12024 /* EEPROM Auto Read Bus Control */\n #define E1000_EEWR 0x0102C /* EEPROM Write Register - RW */\n #define E1000_I2CCMD 0x01028 /* SFPI2C Command Register - RW */\n", "prefixes": [] }