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GET /api/patches/512645/?format=api
{ "id": 512645, "url": "http://patchwork.ozlabs.org/api/patches/512645/?format=api", "web_url": "http://patchwork.ozlabs.org/project/intel-wired-lan/patch/1441065295-234333-15-git-send-email-catherine.sullivan@intel.com/", "project": { "id": 46, "url": "http://patchwork.ozlabs.org/api/projects/46/?format=api", "name": "Intel Wired Ethernet development", "link_name": "intel-wired-lan", "list_id": "intel-wired-lan.osuosl.org", "list_email": "intel-wired-lan@osuosl.org", "web_url": "", "scm_url": "", "webscm_url": "", "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<1441065295-234333-15-git-send-email-catherine.sullivan@intel.com>", "list_archive_url": null, "date": "2015-08-31T23:54:54", "name": "[next,S14,14/15] i40e/i40evf: Refactor PHY structure and add phy_capabilities enum", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": false, "hash": "fdf1bd6b4e6112122f5959636381c84508f8bef6", "submitter": { "id": 13931, "url": "http://patchwork.ozlabs.org/api/people/13931/?format=api", "name": "Catherine Sullivan", "email": "catherine.sullivan@intel.com" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/intel-wired-lan/patch/1441065295-234333-15-git-send-email-catherine.sullivan@intel.com/mbox/", "series": [], "comments": "http://patchwork.ozlabs.org/api/patches/512645/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/512645/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<intel-wired-lan-bounces@lists.osuosl.org>", "X-Original-To": [ "incoming@patchwork.ozlabs.org", "intel-wired-lan@lists.osuosl.org" ], "Delivered-To": [ "patchwork-incoming@bilbo.ozlabs.org", "intel-wired-lan@lists.osuosl.org" ], "Received": [ "from fraxinus.osuosl.org (smtp4.osuosl.org [140.211.166.137])\n\tby ozlabs.org (Postfix) with ESMTP id BD5C1140663\n\tfor <incoming@patchwork.ozlabs.org>;\n\tTue, 1 Sep 2015 09:54:18 +1000 (AEST)", "from localhost (localhost [127.0.0.1])\n\tby fraxinus.osuosl.org (Postfix) with ESMTP id 0E78DA36CA;\n\tMon, 31 Aug 2015 23:54:18 +0000 (UTC)", "from fraxinus.osuosl.org ([127.0.0.1])\n\tby localhost (.osuosl.org [127.0.0.1]) (amavisd-new, port 10024)\n\twith ESMTP id KJLXx_uVYhmA; Mon, 31 Aug 2015 23:54:15 +0000 (UTC)", "from ash.osuosl.org (ash.osuosl.org [140.211.166.34])\n\tby fraxinus.osuosl.org (Postfix) with ESMTP id 6BE7EA36E1;\n\tMon, 31 Aug 2015 23:54:14 +0000 (UTC)", "from silver.osuosl.org (smtp3.osuosl.org [140.211.166.136])\n\tby ash.osuosl.org (Postfix) with ESMTP id E491E1C1009\n\tfor <intel-wired-lan@lists.osuosl.org>;\n\tMon, 31 Aug 2015 23:54:12 +0000 (UTC)", "from localhost (localhost [127.0.0.1])\n\tby silver.osuosl.org (Postfix) with ESMTP id E03C433D0D\n\tfor <intel-wired-lan@lists.osuosl.org>;\n\tMon, 31 Aug 2015 23:54:12 +0000 (UTC)", "from silver.osuosl.org ([127.0.0.1])\n\tby localhost (.osuosl.org [127.0.0.1]) (amavisd-new, port 10024)\n\twith ESMTP id bC4MHfZIBcWL for <intel-wired-lan@lists.osuosl.org>;\n\tMon, 31 Aug 2015 23:54:11 +0000 (UTC)", "from mga11.intel.com (mga11.intel.com [192.55.52.93])\n\tby silver.osuosl.org (Postfix) with ESMTP id 68F8533A99\n\tfor <intel-wired-lan@lists.osuosl.org>;\n\tMon, 31 Aug 2015 23:54:11 +0000 (UTC)", "from orsmga003.jf.intel.com ([10.7.209.27])\n\tby fmsmga102.fm.intel.com with ESMTP; 31 Aug 2015 16:54:11 -0700", "from catheri1-tigger.jf.intel.com ([134.134.176.92])\n\tby orsmga003.jf.intel.com with ESMTP; 31 Aug 2015 16:54:11 -0700" ], "X-Virus-Scanned": [ "amavisd-new at osuosl.org", "amavisd-new at osuosl.org" ], "X-Greylist": "domain auto-whitelisted by SQLgrey-1.7.6", "X-ExtLoop1": "1", "X-IronPort-AV": "E=Sophos;i=\"5.17,445,1437462000\"; d=\"scan'208\";a=\"635798477\"", "From": "Catherine Sullivan <catherine.sullivan@intel.com>", "To": "intel-wired-lan@lists.osuosl.org", "Date": "Mon, 31 Aug 2015 19:54:54 -0400", "Message-Id": "<1441065295-234333-15-git-send-email-catherine.sullivan@intel.com>", "X-Mailer": "git-send-email 1.9.3", "In-Reply-To": "<1441065295-234333-1-git-send-email-catherine.sullivan@intel.com>", "References": "<1441065295-234333-1-git-send-email-catherine.sullivan@intel.com>", "Subject": "[Intel-wired-lan] [next PATCH S14 14/15] i40e/i40evf: Refactor PHY\n\tstructure and add phy_capabilities enum", "X-BeenThere": "intel-wired-lan@lists.osuosl.org", "X-Mailman-Version": "2.1.18-1", "Precedence": "list", "List-Id": "Intel Wired Ethernet Linux Kernel Driver Development\n\t<intel-wired-lan.lists.osuosl.org>", "List-Unsubscribe": "<http://lists.osuosl.org/mailman/options/intel-wired-lan>, \n\t<mailto:intel-wired-lan-request@lists.osuosl.org?subject=unsubscribe>", "List-Archive": "<http://lists.osuosl.org/pipermail/intel-wired-lan/>", "List-Post": "<mailto:intel-wired-lan@lists.osuosl.org>", "List-Help": "<mailto:intel-wired-lan-request@lists.osuosl.org?subject=help>", "List-Subscribe": "<http://lists.osuosl.org/mailman/listinfo/intel-wired-lan>, \n\t<mailto:intel-wired-lan-request@lists.osuosl.org?subject=subscribe>", "MIME-Version": "1.0", "Content-Type": "text/plain; charset=\"us-ascii\"", "Content-Transfer-Encoding": "7bit", "Errors-To": "intel-wired-lan-bounces@lists.osuosl.org", "Sender": "\"Intel-wired-lan\" <intel-wired-lan-bounces@lists.osuosl.org>" }, "content": "Remove unused members in the PHY structure and add a new member to store\nall the capabilities the PHY has as reported by the FW. This information\nwill help us determine what speeds the device is capable of when link is\ndown.\n\nAlso add an enum to decode the PHY types the NVM is capable of.\nUse the phy_types variable to determine what phy types are possible\nwhen link is down instead of device id as it will be more accurate.\n\nWhen on a backplane device, we do not support changing any settings,\nhowever we should display all the phy_types we are capable of so if we\nsee a backplane dev ID set supported and advertised purely based on\nthe phy_types variable.\n\nSigned-off-by: Catherine Sullivan <catherine.sullivan@intel.com>\nChange-ID: Ia75d560f1fcd30c54cbfb7458690c5867559a930\n---\n drivers/net/ethernet/intel/i40e/i40e_ethtool.c | 189 ++++++++++++++-----------\n drivers/net/ethernet/intel/i40e/i40e_main.c | 8 ++\n drivers/net/ethernet/intel/i40e/i40e_type.h | 37 ++++-\n drivers/net/ethernet/intel/i40evf/i40e_type.h | 37 ++++-\n 4 files changed, 181 insertions(+), 90 deletions(-)", "diff": "diff --git a/drivers/net/ethernet/intel/i40e/i40e_ethtool.c b/drivers/net/ethernet/intel/i40e/i40e_ethtool.c\nindex 46019e9..831f971 100644\n--- a/drivers/net/ethernet/intel/i40e/i40e_ethtool.c\n+++ b/drivers/net/ethernet/intel/i40e/i40e_ethtool.c\n@@ -273,36 +273,12 @@ static void i40e_get_settings_link_up(struct i40e_hw *hw,\n \tcase I40E_PHY_TYPE_40GBASE_AOC:\n \t\tecmd->supported = SUPPORTED_40000baseCR4_Full;\n \t\tbreak;\n-\tcase I40E_PHY_TYPE_40GBASE_KR4:\n-\t\tecmd->supported = SUPPORTED_Autoneg |\n-\t\t\t\t SUPPORTED_40000baseKR4_Full;\n-\t\tecmd->advertising = ADVERTISED_Autoneg |\n-\t\t\t\t ADVERTISED_40000baseKR4_Full;\n-\t\tbreak;\n \tcase I40E_PHY_TYPE_40GBASE_SR4:\n \t\tecmd->supported = SUPPORTED_40000baseSR4_Full;\n \t\tbreak;\n \tcase I40E_PHY_TYPE_40GBASE_LR4:\n \t\tecmd->supported = SUPPORTED_40000baseLR4_Full;\n \t\tbreak;\n-\tcase I40E_PHY_TYPE_20GBASE_KR2:\n-\t\tecmd->supported = SUPPORTED_Autoneg |\n-\t\t\t\t SUPPORTED_20000baseKR2_Full;\n-\t\tecmd->advertising = ADVERTISED_Autoneg |\n-\t\t\t\t ADVERTISED_20000baseKR2_Full;\n-\t\tbreak;\n-\tcase I40E_PHY_TYPE_10GBASE_KX4:\n-\t\tecmd->supported = SUPPORTED_Autoneg |\n-\t\t\t\t SUPPORTED_10000baseKX4_Full;\n-\t\tecmd->advertising = ADVERTISED_Autoneg |\n-\t\t\t\t ADVERTISED_10000baseKX4_Full;\n-\t\tbreak;\n-\tcase I40E_PHY_TYPE_10GBASE_KR:\n-\t\tecmd->supported = SUPPORTED_Autoneg |\n-\t\t\t\t SUPPORTED_10000baseKR_Full;\n-\t\tecmd->advertising = ADVERTISED_Autoneg |\n-\t\t\t\t ADVERTISED_10000baseKR_Full;\n-\t\tbreak;\n \tcase I40E_PHY_TYPE_10GBASE_SR:\n \tcase I40E_PHY_TYPE_10GBASE_LR:\n \tcase I40E_PHY_TYPE_1000BASE_SX:\n@@ -320,12 +296,6 @@ static void i40e_get_settings_link_up(struct i40e_hw *hw,\n \t\tif (hw_link_info->requested_speeds & I40E_LINK_SPEED_10GB)\n \t\t\tecmd->advertising |= ADVERTISED_10000baseT_Full;\n \t\tbreak;\n-\tcase I40E_PHY_TYPE_1000BASE_KX:\n-\t\tecmd->supported = SUPPORTED_Autoneg |\n-\t\t\t\t SUPPORTED_1000baseKX_Full;\n-\t\tecmd->advertising = ADVERTISED_Autoneg |\n-\t\t\t\t ADVERTISED_1000baseKX_Full;\n-\t\tbreak;\n \tcase I40E_PHY_TYPE_10GBASE_T:\n \tcase I40E_PHY_TYPE_1000BASE_T:\n \tcase I40E_PHY_TYPE_100BASE_TX:\n@@ -364,6 +334,15 @@ static void i40e_get_settings_link_up(struct i40e_hw *hw,\n \t\tif (hw_link_info->requested_speeds & I40E_LINK_SPEED_100MB)\n \t\t\tecmd->advertising |= ADVERTISED_100baseT_Full;\n \t\tbreak;\n+\t/* Backplane is set based on supported phy types in get_settings\n+\t * so don't set anything here but don't warn either\n+\t */\n+\tcase I40E_PHY_TYPE_40GBASE_KR4:\n+\tcase I40E_PHY_TYPE_20GBASE_KR2:\n+\tcase I40E_PHY_TYPE_10GBASE_KR:\n+\tcase I40E_PHY_TYPE_10GBASE_KX4:\n+\tcase I40E_PHY_TYPE_1000BASE_KX:\n+\t\tbreak;\n \tdefault:\n \t\t/* if we got here and link is up something bad is afoot */\n \t\tnetdev_info(netdev, \"WARNING: Link is up but PHY type 0x%x is not recognized.\\n\",\n@@ -403,64 +382,67 @@ static void i40e_get_settings_link_up(struct i40e_hw *hw,\n static void i40e_get_settings_link_down(struct i40e_hw *hw,\n \t\t\t\t\tstruct ethtool_cmd *ecmd)\n {\n-\tstruct i40e_link_status *hw_link_info = &hw->phy.link_info;\n+\tenum i40e_aq_capabilities_phy_type phy_types = hw->phy.phy_types;\n \n \t/* link is down and the driver needs to fall back on\n-\t * device ID to determine what kinds of info to display,\n-\t * it's mostly a guess that may change when link is up\n+\t * supported phy types to figure out what info to display\n \t */\n-\tswitch (hw->device_id) {\n-\tcase I40E_DEV_ID_QSFP_A:\n-\tcase I40E_DEV_ID_QSFP_B:\n-\tcase I40E_DEV_ID_QSFP_C:\n-\t\t/* pluggable QSFP */\n-\t\tecmd->supported = SUPPORTED_40000baseSR4_Full |\n-\t\t\t\t SUPPORTED_40000baseCR4_Full |\n-\t\t\t\t SUPPORTED_40000baseLR4_Full;\n-\t\tecmd->advertising = ADVERTISED_40000baseSR4_Full |\n-\t\t\t\t ADVERTISED_40000baseCR4_Full |\n-\t\t\t\t ADVERTISED_40000baseLR4_Full;\n-\t\tbreak;\n-\tcase I40E_DEV_ID_KX_B:\n-\t\t/* backplane 40G */\n-\t\tecmd->supported = SUPPORTED_40000baseKR4_Full;\n-\t\tecmd->advertising = ADVERTISED_40000baseKR4_Full;\n-\t\tbreak;\n-\tcase I40E_DEV_ID_KX_C:\n-\t\t/* backplane 10G */\n-\t\tecmd->supported = SUPPORTED_10000baseKR_Full;\n-\t\tecmd->advertising = ADVERTISED_10000baseKR_Full;\n-\t\tbreak;\n-\tcase I40E_DEV_ID_10G_BASE_T:\n-\tcase I40E_DEV_ID_10G_BASE_T4:\n-\t\tecmd->supported = SUPPORTED_10000baseT_Full |\n-\t\t\t\t SUPPORTED_1000baseT_Full |\n-\t\t\t\t SUPPORTED_100baseT_Full;\n-\t\t/* Figure out what has been requested */\n-\t\tif (hw_link_info->requested_speeds & I40E_LINK_SPEED_10GB)\n-\t\t\tecmd->advertising |= ADVERTISED_10000baseT_Full;\n-\t\tif (hw_link_info->requested_speeds & I40E_LINK_SPEED_1GB)\n-\t\t\tecmd->advertising |= ADVERTISED_1000baseT_Full;\n-\t\tif (hw_link_info->requested_speeds & I40E_LINK_SPEED_100MB)\n-\t\t\tecmd->advertising |= ADVERTISED_100baseT_Full;\n-\t\tbreak;\n-\tcase I40E_DEV_ID_20G_KR2:\n-\tcase I40E_DEV_ID_20G_KR2_A:\n-\t\t/* backplane 20G */\n-\t\tecmd->supported = SUPPORTED_20000baseKR2_Full;\n-\t\tecmd->advertising = ADVERTISED_20000baseKR2_Full;\n-\t\tbreak;\n-\tdefault:\n-\t\t/* all the rest are 10G/1G */\n-\t\tecmd->supported = SUPPORTED_10000baseT_Full |\n-\t\t\t\t SUPPORTED_1000baseT_Full;\n-\t\t/* Figure out what has been requested */\n-\t\tif (hw_link_info->requested_speeds & I40E_LINK_SPEED_10GB)\n-\t\t\tecmd->advertising |= ADVERTISED_10000baseT_Full;\n-\t\tif (hw_link_info->requested_speeds & I40E_LINK_SPEED_1GB)\n-\t\t\tecmd->advertising |= ADVERTISED_1000baseT_Full;\n-\t\tbreak;\n+\tecmd->supported = 0x0;\n+\tecmd->advertising = 0x0;\n+\tif (phy_types & I40E_CAP_PHY_TYPE_SGMII) {\n+\t\tecmd->supported |= SUPPORTED_Autoneg |\n+\t\t\t\t SUPPORTED_1000baseT_Full |\n+\t\t\t\t SUPPORTED_100baseT_Full;\n+\t\tecmd->advertising |= ADVERTISED_Autoneg |\n+\t\t\t\t ADVERTISED_1000baseT_Full |\n+\t\t\t\t ADVERTISED_100baseT_Full;\n+\t}\n+\tif (phy_types & I40E_CAP_PHY_TYPE_XAUI ||\n+\t phy_types & I40E_CAP_PHY_TYPE_XFI ||\n+\t phy_types & I40E_CAP_PHY_TYPE_SFI ||\n+\t phy_types & I40E_CAP_PHY_TYPE_10GBASE_SFPP_CU ||\n+\t phy_types & I40E_CAP_PHY_TYPE_10GBASE_AOC)\n+\t\tecmd->supported |= SUPPORTED_10000baseT_Full;\n+\tif (phy_types & I40E_CAP_PHY_TYPE_10GBASE_CR1_CU ||\n+\t phy_types & I40E_CAP_PHY_TYPE_10GBASE_CR1 ||\n+\t phy_types & I40E_CAP_PHY_TYPE_10GBASE_T ||\n+\t phy_types & I40E_CAP_PHY_TYPE_10GBASE_SR ||\n+\t phy_types & I40E_CAP_PHY_TYPE_10GBASE_LR) {\n+\t\tecmd->supported |= SUPPORTED_Autoneg |\n+\t\t\t\t SUPPORTED_10000baseT_Full;\n+\t\tecmd->advertising |= ADVERTISED_Autoneg |\n+\t\t\t\t ADVERTISED_10000baseT_Full;\n+\t}\n+\tif (phy_types & I40E_CAP_PHY_TYPE_XLAUI ||\n+\t phy_types & I40E_CAP_PHY_TYPE_XLPPI ||\n+\t phy_types & I40E_CAP_PHY_TYPE_40GBASE_AOC)\n+\t\tecmd->supported |= SUPPORTED_40000baseCR4_Full;\n+\tif (phy_types & I40E_CAP_PHY_TYPE_40GBASE_CR4_CU ||\n+\t phy_types & I40E_CAP_PHY_TYPE_40GBASE_CR4) {\n+\t\tecmd->supported |= SUPPORTED_Autoneg |\n+\t\t\t\t SUPPORTED_40000baseCR4_Full;\n+\t\tecmd->advertising |= ADVERTISED_Autoneg |\n+\t\t\t\t ADVERTISED_40000baseCR4_Full;\n \t}\n+\tif (phy_types & I40E_CAP_PHY_TYPE_100BASE_TX) {\n+\t\tecmd->supported |= SUPPORTED_Autoneg |\n+\t\t\t\t SUPPORTED_100baseT_Full;\n+\t\tecmd->advertising |= ADVERTISED_Autoneg |\n+\t\t\t\t ADVERTISED_100baseT_Full;\n+\t}\n+\tif (phy_types & I40E_CAP_PHY_TYPE_1000BASE_T ||\n+\t phy_types & I40E_CAP_PHY_TYPE_1000BASE_SX ||\n+\t phy_types & I40E_CAP_PHY_TYPE_1000BASE_LX ||\n+\t phy_types & I40E_CAP_PHY_TYPE_1000BASE_T_OPTICAL) {\n+\t\tecmd->supported |= SUPPORTED_Autoneg |\n+\t\t\t\t SUPPORTED_1000baseT_Full;\n+\t\tecmd->advertising |= ADVERTISED_Autoneg |\n+\t\t\t\t ADVERTISED_1000baseT_Full;\n+\t}\n+\tif (phy_types & I40E_CAP_PHY_TYPE_40GBASE_SR4)\n+\t\tecmd->supported |= SUPPORTED_40000baseSR4_Full;\n+\tif (phy_types & I40E_CAP_PHY_TYPE_40GBASE_LR4)\n+\t\tecmd->supported |= SUPPORTED_40000baseLR4_Full;\n \n \t/* With no link speed and duplex are unknown */\n \tethtool_cmd_speed_set(ecmd, SPEED_UNKNOWN);\n@@ -490,6 +472,37 @@ static int i40e_get_settings(struct net_device *netdev,\n \n \t/* Now set the settings that don't rely on link being up/down */\n \n+\t/* For backplane, supported and advertised are only reliant on the\n+\t * phy types the NVM specifies are supported.\n+\t */\n+\tif (hw->device_id == I40E_DEV_ID_KX_B ||\n+\t hw->device_id == I40E_DEV_ID_KX_C ||\n+\t hw->device_id == I40E_DEV_ID_20G_KR2 ||\n+\t hw->device_id == I40E_DEV_ID_20G_KR2_A) {\n+\t\tecmd->supported = SUPPORTED_Autoneg;\n+\t\tecmd->advertising = ADVERTISED_Autoneg;\n+\t\tif (hw->phy.phy_types & I40E_CAP_PHY_TYPE_40GBASE_KR4) {\n+\t\t\tecmd->supported |= SUPPORTED_40000baseKR4_Full;\n+\t\t\tecmd->advertising |= ADVERTISED_40000baseKR4_Full;\n+\t\t}\n+\t\tif (hw->phy.phy_types & I40E_CAP_PHY_TYPE_20GBASE_KR2) {\n+\t\t\tecmd->supported |= SUPPORTED_20000baseKR2_Full;\n+\t\t\tecmd->advertising |= ADVERTISED_20000baseKR2_Full;\n+\t\t}\n+\t\tif (hw->phy.phy_types & I40E_CAP_PHY_TYPE_10GBASE_KR) {\n+\t\t\tecmd->supported |= SUPPORTED_10000baseKR_Full;\n+\t\t\tecmd->advertising |= ADVERTISED_10000baseKR_Full;\n+\t\t}\n+\t\tif (hw->phy.phy_types & I40E_CAP_PHY_TYPE_10GBASE_KX4) {\n+\t\t\tecmd->supported |= SUPPORTED_10000baseKX4_Full;\n+\t\t\tecmd->advertising |= ADVERTISED_10000baseKX4_Full;\n+\t\t}\n+\t\tif (hw->phy.phy_types & I40E_CAP_PHY_TYPE_1000BASE_KX) {\n+\t\t\tecmd->supported |= SUPPORTED_1000baseKX_Full;\n+\t\t\tecmd->advertising |= ADVERTISED_1000baseKX_Full;\n+\t\t}\n+\t}\n+\n \t/* Set autoneg settings */\n \tecmd->autoneg = ((hw_link_info->an_info & I40E_AQ_AN_COMPLETED) ?\n \t\t\t AUTONEG_ENABLE : AUTONEG_DISABLE);\n@@ -589,6 +602,14 @@ static int i40e_set_settings(struct net_device *netdev,\n \t hw->phy.link_info.link_info & I40E_AQ_LINK_UP)\n \t\treturn -EOPNOTSUPP;\n \n+\tif (hw->device_id == I40E_DEV_ID_KX_B ||\n+\t hw->device_id == I40E_DEV_ID_KX_C ||\n+\t hw->device_id == I40E_DEV_ID_20G_KR2 ||\n+\t hw->device_id == I40E_DEV_ID_20G_KR2_A) {\n+\t\tnetdev_info(netdev, \"Changing settings is not supported on backplane.\\n\");\n+\t\treturn -EOPNOTSUPP;\n+\t}\n+\n \t/* get our own copy of the bits to check against */\n \tmemset(&safe_ecmd, 0, sizeof(struct ethtool_cmd));\n \ti40e_get_settings(netdev, &safe_ecmd);\ndiff --git a/drivers/net/ethernet/intel/i40e/i40e_main.c b/drivers/net/ethernet/intel/i40e/i40e_main.c\nindex 722a26c..4901f8f 100644\n--- a/drivers/net/ethernet/intel/i40e/i40e_main.c\n+++ b/drivers/net/ethernet/intel/i40e/i40e_main.c\n@@ -10375,6 +10375,14 @@ static int i40e_probe(struct pci_dev *pdev, const struct pci_device_id *ent)\n \t\t\t i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));\n \tpf->hw.phy.link_info.requested_speeds = abilities.link_speed;\n \n+\t/* get the supported phy types from the fw */\n+\terr = i40e_aq_get_phy_capabilities(hw, false, true, &abilities, NULL);\n+\tif (err)\n+\t\tdev_dbg(&pf->pdev->dev, \"get supported phy types ret = %s last_status = %s\\n\",\n+\t\t\ti40e_stat_str(&pf->hw, err),\n+\t\t\ti40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));\n+\tpf->hw.phy.phy_types = abilities.phy_type;\n+\n \t/* print a string summarizing features */\n \ti40e_print_features(pf);\n \ndiff --git a/drivers/net/ethernet/intel/i40e/i40e_type.h b/drivers/net/ethernet/intel/i40e/i40e_type.h\nindex 0a450ac..6f69576 100644\n--- a/drivers/net/ethernet/intel/i40e/i40e_type.h\n+++ b/drivers/net/ethernet/intel/i40e/i40e_type.h\n@@ -187,14 +187,45 @@ struct i40e_link_status {\n #define I40E_MODULE_TYPE_1000BASE_T\t0x08\n };\n \n+enum i40e_aq_capabilities_phy_type {\n+\tI40E_CAP_PHY_TYPE_SGMII\t\t = BIT(I40E_PHY_TYPE_SGMII),\n+\tI40E_CAP_PHY_TYPE_1000BASE_KX\t = BIT(I40E_PHY_TYPE_1000BASE_KX),\n+\tI40E_CAP_PHY_TYPE_10GBASE_KX4\t = BIT(I40E_PHY_TYPE_10GBASE_KX4),\n+\tI40E_CAP_PHY_TYPE_10GBASE_KR\t = BIT(I40E_PHY_TYPE_10GBASE_KR),\n+\tI40E_CAP_PHY_TYPE_40GBASE_KR4\t = BIT(I40E_PHY_TYPE_40GBASE_KR4),\n+\tI40E_CAP_PHY_TYPE_XAUI\t\t = BIT(I40E_PHY_TYPE_XAUI),\n+\tI40E_CAP_PHY_TYPE_XFI\t\t = BIT(I40E_PHY_TYPE_XFI),\n+\tI40E_CAP_PHY_TYPE_SFI\t\t = BIT(I40E_PHY_TYPE_SFI),\n+\tI40E_CAP_PHY_TYPE_XLAUI\t\t = BIT(I40E_PHY_TYPE_XLAUI),\n+\tI40E_CAP_PHY_TYPE_XLPPI\t\t = BIT(I40E_PHY_TYPE_XLPPI),\n+\tI40E_CAP_PHY_TYPE_40GBASE_CR4_CU = BIT(I40E_PHY_TYPE_40GBASE_CR4_CU),\n+\tI40E_CAP_PHY_TYPE_10GBASE_CR1_CU = BIT(I40E_PHY_TYPE_10GBASE_CR1_CU),\n+\tI40E_CAP_PHY_TYPE_10GBASE_AOC\t = BIT(I40E_PHY_TYPE_10GBASE_AOC),\n+\tI40E_CAP_PHY_TYPE_40GBASE_AOC\t = BIT(I40E_PHY_TYPE_40GBASE_AOC),\n+\tI40E_CAP_PHY_TYPE_100BASE_TX\t = BIT(I40E_PHY_TYPE_100BASE_TX),\n+\tI40E_CAP_PHY_TYPE_1000BASE_T\t = BIT(I40E_PHY_TYPE_1000BASE_T),\n+\tI40E_CAP_PHY_TYPE_10GBASE_T\t = BIT(I40E_PHY_TYPE_10GBASE_T),\n+\tI40E_CAP_PHY_TYPE_10GBASE_SR\t = BIT(I40E_PHY_TYPE_10GBASE_SR),\n+\tI40E_CAP_PHY_TYPE_10GBASE_LR\t = BIT(I40E_PHY_TYPE_10GBASE_LR),\n+\tI40E_CAP_PHY_TYPE_10GBASE_SFPP_CU = BIT(I40E_PHY_TYPE_10GBASE_SFPP_CU),\n+\tI40E_CAP_PHY_TYPE_10GBASE_CR1\t = BIT(I40E_PHY_TYPE_10GBASE_CR1),\n+\tI40E_CAP_PHY_TYPE_40GBASE_CR4\t = BIT(I40E_PHY_TYPE_40GBASE_CR4),\n+\tI40E_CAP_PHY_TYPE_40GBASE_SR4\t = BIT(I40E_PHY_TYPE_40GBASE_SR4),\n+\tI40E_CAP_PHY_TYPE_40GBASE_LR4\t = BIT(I40E_PHY_TYPE_40GBASE_LR4),\n+\tI40E_CAP_PHY_TYPE_1000BASE_SX\t = BIT(I40E_PHY_TYPE_1000BASE_SX),\n+\tI40E_CAP_PHY_TYPE_1000BASE_LX\t = BIT(I40E_PHY_TYPE_1000BASE_LX),\n+\tI40E_CAP_PHY_TYPE_1000BASE_T_OPTICAL =\n+\t\t\t\t\t BIT(I40E_PHY_TYPE_1000BASE_T_OPTICAL),\n+\tI40E_CAP_PHY_TYPE_20GBASE_KR2\t = BIT(I40E_PHY_TYPE_20GBASE_KR2)\n+};\n+\n struct i40e_phy_info {\n \tstruct i40e_link_status link_info;\n \tstruct i40e_link_status link_info_old;\n-\tu32 autoneg_advertised;\n-\tu32 phy_id;\n-\tu32 module_type;\n \tbool get_link_info;\n \tenum i40e_media_type media_type;\n+\t/* all the phy types the NVM is capable of */\n+\tenum i40e_aq_capabilities_phy_type phy_types;\n };\n \n #define I40E_HW_CAP_MAX_GPIO\t\t\t30\ndiff --git a/drivers/net/ethernet/intel/i40evf/i40e_type.h b/drivers/net/ethernet/intel/i40evf/i40e_type.h\nindex f3155e3..85af3b4 100644\n--- a/drivers/net/ethernet/intel/i40evf/i40e_type.h\n+++ b/drivers/net/ethernet/intel/i40evf/i40e_type.h\n@@ -187,14 +187,45 @@ struct i40e_link_status {\n #define I40E_MODULE_TYPE_1000BASE_T\t0x08\n };\n \n+enum i40e_aq_capabilities_phy_type {\n+\tI40E_CAP_PHY_TYPE_SGMII\t\t = BIT(I40E_PHY_TYPE_SGMII),\n+\tI40E_CAP_PHY_TYPE_1000BASE_KX\t = BIT(I40E_PHY_TYPE_1000BASE_KX),\n+\tI40E_CAP_PHY_TYPE_10GBASE_KX4\t = BIT(I40E_PHY_TYPE_10GBASE_KX4),\n+\tI40E_CAP_PHY_TYPE_10GBASE_KR\t = BIT(I40E_PHY_TYPE_10GBASE_KR),\n+\tI40E_CAP_PHY_TYPE_40GBASE_KR4\t = BIT(I40E_PHY_TYPE_40GBASE_KR4),\n+\tI40E_CAP_PHY_TYPE_XAUI\t\t = BIT(I40E_PHY_TYPE_XAUI),\n+\tI40E_CAP_PHY_TYPE_XFI\t\t = BIT(I40E_PHY_TYPE_XFI),\n+\tI40E_CAP_PHY_TYPE_SFI\t\t = BIT(I40E_PHY_TYPE_SFI),\n+\tI40E_CAP_PHY_TYPE_XLAUI\t\t = BIT(I40E_PHY_TYPE_XLAUI),\n+\tI40E_CAP_PHY_TYPE_XLPPI\t\t = BIT(I40E_PHY_TYPE_XLPPI),\n+\tI40E_CAP_PHY_TYPE_40GBASE_CR4_CU = BIT(I40E_PHY_TYPE_40GBASE_CR4_CU),\n+\tI40E_CAP_PHY_TYPE_10GBASE_CR1_CU = BIT(I40E_PHY_TYPE_10GBASE_CR1_CU),\n+\tI40E_CAP_PHY_TYPE_10GBASE_AOC\t = BIT(I40E_PHY_TYPE_10GBASE_AOC),\n+\tI40E_CAP_PHY_TYPE_40GBASE_AOC\t = BIT(I40E_PHY_TYPE_40GBASE_AOC),\n+\tI40E_CAP_PHY_TYPE_100BASE_TX\t = BIT(I40E_PHY_TYPE_100BASE_TX),\n+\tI40E_CAP_PHY_TYPE_1000BASE_T\t = BIT(I40E_PHY_TYPE_1000BASE_T),\n+\tI40E_CAP_PHY_TYPE_10GBASE_T\t = BIT(I40E_PHY_TYPE_10GBASE_T),\n+\tI40E_CAP_PHY_TYPE_10GBASE_SR\t = BIT(I40E_PHY_TYPE_10GBASE_SR),\n+\tI40E_CAP_PHY_TYPE_10GBASE_LR\t = BIT(I40E_PHY_TYPE_10GBASE_LR),\n+\tI40E_CAP_PHY_TYPE_10GBASE_SFPP_CU = BIT(I40E_PHY_TYPE_10GBASE_SFPP_CU),\n+\tI40E_CAP_PHY_TYPE_10GBASE_CR1\t = BIT(I40E_PHY_TYPE_10GBASE_CR1),\n+\tI40E_CAP_PHY_TYPE_40GBASE_CR4\t = BIT(I40E_PHY_TYPE_40GBASE_CR4),\n+\tI40E_CAP_PHY_TYPE_40GBASE_SR4\t = BIT(I40E_PHY_TYPE_40GBASE_SR4),\n+\tI40E_CAP_PHY_TYPE_40GBASE_LR4\t = BIT(I40E_PHY_TYPE_40GBASE_LR4),\n+\tI40E_CAP_PHY_TYPE_1000BASE_SX\t = BIT(I40E_PHY_TYPE_1000BASE_SX),\n+\tI40E_CAP_PHY_TYPE_1000BASE_LX\t = BIT(I40E_PHY_TYPE_1000BASE_LX),\n+\tI40E_CAP_PHY_TYPE_1000BASE_T_OPTICAL =\n+\t\t\t\t\t BIT(I40E_PHY_TYPE_1000BASE_T_OPTICAL),\n+\tI40E_CAP_PHY_TYPE_20GBASE_KR2\t = BIT(I40E_PHY_TYPE_20GBASE_KR2)\n+};\n+\n struct i40e_phy_info {\n \tstruct i40e_link_status link_info;\n \tstruct i40e_link_status link_info_old;\n-\tu32 autoneg_advertised;\n-\tu32 phy_id;\n-\tu32 module_type;\n \tbool get_link_info;\n \tenum i40e_media_type media_type;\n+\t/* all the phy types the NVM is capable of */\n+\tenum i40e_aq_capabilities_phy_type phy_types;\n };\n \n #define I40E_HW_CAP_MAX_GPIO\t\t\t30\n", "prefixes": [ "next", "S14", "14/15" ] }