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GET /api/patches/499548/?format=api
{ "id": 499548, "url": "http://patchwork.ozlabs.org/api/patches/499548/?format=api", "web_url": "http://patchwork.ozlabs.org/project/intel-wired-lan/patch/1437688770-7354-1-git-send-email-jeffrey.t.kirsher@intel.com/", "project": { "id": 46, "url": "http://patchwork.ozlabs.org/api/projects/46/?format=api", "name": "Intel Wired Ethernet development", "link_name": "intel-wired-lan", "list_id": "intel-wired-lan.osuosl.org", "list_email": "intel-wired-lan@osuosl.org", "web_url": "", "scm_url": "", "webscm_url": "", "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<1437688770-7354-1-git-send-email-jeffrey.t.kirsher@intel.com>", "list_archive_url": null, "date": "2015-07-23T21:59:30", "name": "net: igb: implement high frequency periodic output signals", "commit_ref": null, "pull_url": null, "state": "accepted", "archived": false, "hash": "18b22bfc672c8255d19b8bb3964ab71c9ee73f27", "submitter": { "id": 473, "url": "http://patchwork.ozlabs.org/api/people/473/?format=api", "name": "Kirsher, Jeffrey T", "email": "jeffrey.t.kirsher@intel.com" }, "delegate": { "id": 68, "url": "http://patchwork.ozlabs.org/api/users/68/?format=api", "username": "jtkirshe", "first_name": "Jeff", "last_name": "Kirsher", "email": "jeffrey.t.kirsher@intel.com" }, "mbox": "http://patchwork.ozlabs.org/project/intel-wired-lan/patch/1437688770-7354-1-git-send-email-jeffrey.t.kirsher@intel.com/mbox/", "series": [], "comments": "http://patchwork.ozlabs.org/api/patches/499548/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/499548/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<intel-wired-lan-bounces@lists.osuosl.org>", "X-Original-To": [ "incoming@patchwork.ozlabs.org", "intel-wired-lan@lists.osuosl.org" ], "Delivered-To": [ "patchwork-incoming@bilbo.ozlabs.org", "intel-wired-lan@lists.osuosl.org" ], "Received": [ "from hemlock.osuosl.org (smtp2.osuosl.org [140.211.166.133])\n\tby ozlabs.org (Postfix) with ESMTP id 1DD7F1402B5\n\tfor <incoming@patchwork.ozlabs.org>;\n\tFri, 24 Jul 2015 07:59:47 +1000 (AEST)", "from localhost (localhost [127.0.0.1])\n\tby hemlock.osuosl.org (Postfix) with ESMTP id 3E888957AB;\n\tThu, 23 Jul 2015 21:59:47 +0000 (UTC)", "from hemlock.osuosl.org ([127.0.0.1])\n\tby localhost (.osuosl.org [127.0.0.1]) (amavisd-new, port 10024)\n\twith ESMTP id K4J-4WQa6lhb; Thu, 23 Jul 2015 21:59:46 +0000 (UTC)", "from ash.osuosl.org (ash.osuosl.org [140.211.166.34])\n\tby hemlock.osuosl.org (Postfix) with ESMTP id A14C69577B;\n\tThu, 23 Jul 2015 21:59:46 +0000 (UTC)", "from fraxinus.osuosl.org (smtp4.osuosl.org [140.211.166.137])\n\tby ash.osuosl.org (Postfix) with ESMTP id 2BB321C2B91\n\tfor <intel-wired-lan@lists.osuosl.org>;\n\tThu, 23 Jul 2015 21:59:45 +0000 (UTC)", "from localhost (localhost [127.0.0.1])\n\tby fraxinus.osuosl.org (Postfix) with ESMTP id 256E08591A\n\tfor <intel-wired-lan@lists.osuosl.org>;\n\tThu, 23 Jul 2015 21:59:45 +0000 (UTC)", "from fraxinus.osuosl.org ([127.0.0.1])\n\tby localhost (.osuosl.org [127.0.0.1]) (amavisd-new, port 10024)\n\twith ESMTP id HGK5ZQyuwBEh for <intel-wired-lan@lists.osuosl.org>;\n\tThu, 23 Jul 2015 21:59:44 +0000 (UTC)", "from mga02.intel.com (mga02.intel.com [134.134.136.20])\n\tby fraxinus.osuosl.org (Postfix) with ESMTP id E037EA3C6D\n\tfor <intel-wired-lan@lists.osuosl.org>;\n\tThu, 23 Jul 2015 21:59:43 +0000 (UTC)", "from fmsmga002.fm.intel.com ([10.253.24.26])\n\tby orsmga101.jf.intel.com with ESMTP; 23 Jul 2015 14:59:42 -0700", "from jtkirshe-linux.jf.intel.com ([134.134.3.122])\n\tby fmsmga002.fm.intel.com with ESMTP; 23 Jul 2015 14:59:33 -0700" ], "X-Virus-Scanned": [ "amavisd-new at osuosl.org", "amavisd-new at osuosl.org" ], "X-Greylist": "domain auto-whitelisted by SQLgrey-1.7.6", "X-ExtLoop1": "1", "X-IronPort-AV": "E=Sophos;i=\"5.15,533,1432623600\"; d=\"scan'208\";a=\"768533657\"", "From": "Jeff Kirsher <jeffrey.t.kirsher@intel.com>", "To": "intel-wired-lan@lists.osuosl.org", "Date": "Thu, 23 Jul 2015 14:59:30 -0700", "Message-Id": "<1437688770-7354-1-git-send-email-jeffrey.t.kirsher@intel.com>", "X-Mailer": "git-send-email 2.4.3", "Cc": "Richard Cochran <richardcochran@gmail.com>", "Subject": "[Intel-wired-lan] [PATCH] net: igb: implement high frequency\n\tperiodic output signals", "X-BeenThere": "intel-wired-lan@lists.osuosl.org", "X-Mailman-Version": "2.1.18-1", "Precedence": "list", "List-Id": "Intel Wired Ethernet Linux Kernel Driver Development\n\t<intel-wired-lan.lists.osuosl.org>", "List-Unsubscribe": "<http://lists.osuosl.org/mailman/options/intel-wired-lan>, \n\t<mailto:intel-wired-lan-request@lists.osuosl.org?subject=unsubscribe>", "List-Archive": "<http://lists.osuosl.org/pipermail/intel-wired-lan/>", "List-Post": "<mailto:intel-wired-lan@lists.osuosl.org>", "List-Help": "<mailto:intel-wired-lan-request@lists.osuosl.org?subject=help>", "List-Subscribe": "<http://lists.osuosl.org/mailman/listinfo/intel-wired-lan>, \n\t<mailto:intel-wired-lan-request@lists.osuosl.org?subject=subscribe>", "MIME-Version": "1.0", "Content-Type": "text/plain; charset=\"us-ascii\"", "Content-Transfer-Encoding": "7bit", "Errors-To": "intel-wired-lan-bounces@lists.osuosl.org", "Sender": "\"Intel-wired-lan\" <intel-wired-lan-bounces@lists.osuosl.org>" }, "content": "From: Richard Cochran <richardcochran@gmail.com>\n\nIn addition to interrupt driven target time output events, the i210\nalso has two programmable clock outputs. These clocks support periods\nbetween 16 nanoseconds and 140 milliseconds. This patch implements\nthe periodic output function using the clock outputs when possible,\nfalling back to the target time for longer periods.\n\nSigned-off-by: Richard Cochran <richardcochran@gmail.com>\n---\n drivers/net/ethernet/intel/igb/e1000_regs.h | 2 +\n drivers/net/ethernet/intel/igb/igb_ptp.c | 72 +++++++++++++++++++++--------\n 2 files changed, 54 insertions(+), 20 deletions(-)", "diff": "diff --git a/drivers/net/ethernet/intel/igb/e1000_regs.h b/drivers/net/ethernet/intel/igb/e1000_regs.h\nindex 6f0490d..4af2870 100644\n--- a/drivers/net/ethernet/intel/igb/e1000_regs.h\n+++ b/drivers/net/ethernet/intel/igb/e1000_regs.h\n@@ -104,6 +104,8 @@\n #define E1000_TRGTTIMH0 0x0B648 /* Target Time Register 0 High - RW */\n #define E1000_TRGTTIML1 0x0B64C /* Target Time Register 1 Low - RW */\n #define E1000_TRGTTIMH1 0x0B650 /* Target Time Register 1 High - RW */\n+#define E1000_FREQOUT0 0x0B654 /* Frequency Out 0 Control Register - RW */\n+#define E1000_FREQOUT1 0x0B658 /* Frequency Out 1 Control Register - RW */\n #define E1000_AUXSTMPL0 0x0B65C /* Auxiliary Time Stamp 0 Register Low - RO */\n #define E1000_AUXSTMPH0 0x0B660 /* Auxiliary Time Stamp 0 Register High - RO */\n #define E1000_AUXSTMPL1 0x0B664 /* Auxiliary Time Stamp 1 Register Low - RO */\ndiff --git a/drivers/net/ethernet/intel/igb/igb_ptp.c b/drivers/net/ethernet/intel/igb/igb_ptp.c\nindex c3a9392c..5982f28 100644\n--- a/drivers/net/ethernet/intel/igb/igb_ptp.c\n+++ b/drivers/net/ethernet/intel/igb/igb_ptp.c\n@@ -405,7 +405,7 @@ static void igb_pin_extts(struct igb_adapter *igb, int chan, int pin)\n \twr32(E1000_CTRL_EXT, ctrl_ext);\n }\n \n-static void igb_pin_perout(struct igb_adapter *igb, int chan, int pin)\n+static void igb_pin_perout(struct igb_adapter *igb, int chan, int pin, int freq)\n {\n \tstatic const u32 aux0_sel_sdp[IGB_N_SDP] = {\n \t\tAUX0_SEL_SDP0, AUX0_SEL_SDP1, AUX0_SEL_SDP2, AUX0_SEL_SDP3,\n@@ -424,6 +424,14 @@ static void igb_pin_perout(struct igb_adapter *igb, int chan, int pin)\n \t\tTS_SDP0_SEL_TT1, TS_SDP1_SEL_TT1,\n \t\tTS_SDP2_SEL_TT1, TS_SDP3_SEL_TT1,\n \t};\n+\tstatic const u32 ts_sdp_sel_fc0[IGB_N_SDP] = {\n+\t\tTS_SDP0_SEL_FC0, TS_SDP1_SEL_FC0,\n+\t\tTS_SDP2_SEL_FC0, TS_SDP3_SEL_FC0,\n+\t};\n+\tstatic const u32 ts_sdp_sel_fc1[IGB_N_SDP] = {\n+\t\tTS_SDP0_SEL_FC1, TS_SDP1_SEL_FC1,\n+\t\tTS_SDP2_SEL_FC1, TS_SDP3_SEL_FC1,\n+\t};\n \tstatic const u32 ts_sdp_sel_clr[IGB_N_SDP] = {\n \t\tTS_SDP0_SEL_FC1, TS_SDP1_SEL_FC1,\n \t\tTS_SDP2_SEL_FC1, TS_SDP3_SEL_FC1,\n@@ -445,11 +453,17 @@ static void igb_pin_perout(struct igb_adapter *igb, int chan, int pin)\n \t\ttssdp &= ~AUX1_TS_SDP_EN;\n \n \ttssdp &= ~ts_sdp_sel_clr[pin];\n-\tif (chan == 1)\n-\t\ttssdp |= ts_sdp_sel_tt1[pin];\n-\telse\n-\t\ttssdp |= ts_sdp_sel_tt0[pin];\n-\n+\tif (freq) {\n+\t\tif (chan == 1)\n+\t\t\ttssdp |= ts_sdp_sel_fc1[pin];\n+\t\telse\n+\t\t\ttssdp |= ts_sdp_sel_fc0[pin];\n+\t} else {\n+\t\tif (chan == 1)\n+\t\t\ttssdp |= ts_sdp_sel_tt1[pin];\n+\t\telse\n+\t\t\ttssdp |= ts_sdp_sel_tt0[pin];\n+\t}\n \ttssdp |= ts_sdp_en[pin];\n \n \twr32(E1000_TSSDP, tssdp);\n@@ -463,10 +477,10 @@ static int igb_ptp_feature_enable_i210(struct ptp_clock_info *ptp,\n \tstruct igb_adapter *igb =\n \t\tcontainer_of(ptp, struct igb_adapter, ptp_caps);\n \tstruct e1000_hw *hw = &igb->hw;\n-\tu32 tsauxc, tsim, tsauxc_mask, tsim_mask, trgttiml, trgttimh;\n+\tu32 tsauxc, tsim, tsauxc_mask, tsim_mask, trgttiml, trgttimh, freqout;\n \tunsigned long flags;\n \tstruct timespec ts;\n-\tint pin = -1;\n+\tint use_freq = 0, pin = -1;\n \ts64 ns;\n \n \tswitch (rq->type) {\n@@ -511,40 +525,58 @@ static int igb_ptp_feature_enable_i210(struct ptp_clock_info *ptp,\n \t\tts.tv_nsec = rq->perout.period.nsec;\n \t\tns = timespec_to_ns(&ts);\n \t\tns = ns >> 1;\n-\t\tif (on && ns < 500000LL) {\n-\t\t\t/* 2k interrupts per second is an awful lot. */\n-\t\t\treturn -EINVAL;\n+\t\tif (on && ns <= 70000000LL) {\n+\t\t\tif (ns < 8LL)\n+\t\t\t\treturn -EINVAL;\n+\t\t\tuse_freq = 1;\n \t\t}\n \t\tts = ns_to_timespec(ns);\n \t\tif (rq->perout.index == 1) {\n-\t\t\ttsauxc_mask = TSAUXC_EN_TT1;\n-\t\t\ttsim_mask = TSINTR_TT1;\n+\t\t\tif (use_freq) {\n+\t\t\t\ttsauxc_mask = TSAUXC_EN_CLK1 | TSAUXC_ST1;\n+\t\t\t\ttsim_mask = 0;\n+\t\t\t} else {\n+\t\t\t\ttsauxc_mask = TSAUXC_EN_TT1;\n+\t\t\t\ttsim_mask = TSINTR_TT1;\n+\t\t\t}\n \t\t\ttrgttiml = E1000_TRGTTIML1;\n \t\t\ttrgttimh = E1000_TRGTTIMH1;\n+\t\t\tfreqout = E1000_FREQOUT1;\n \t\t} else {\n-\t\t\ttsauxc_mask = TSAUXC_EN_TT0;\n-\t\t\ttsim_mask = TSINTR_TT0;\n+\t\t\tif (use_freq) {\n+\t\t\t\ttsauxc_mask = TSAUXC_EN_CLK0 | TSAUXC_ST0;\n+\t\t\t\ttsim_mask = 0;\n+\t\t\t} else {\n+\t\t\t\ttsauxc_mask = TSAUXC_EN_TT0;\n+\t\t\t\ttsim_mask = TSINTR_TT0;\n+\t\t\t}\n \t\t\ttrgttiml = E1000_TRGTTIML0;\n \t\t\ttrgttimh = E1000_TRGTTIMH0;\n+\t\t\tfreqout = E1000_FREQOUT0;\n \t\t}\n \t\tspin_lock_irqsave(&igb->tmreg_lock, flags);\n \t\ttsauxc = rd32(E1000_TSAUXC);\n \t\ttsim = rd32(E1000_TSIM);\n+\t\tif (rq->perout.index == 1) {\n+\t\t\ttsauxc &= ~(TSAUXC_EN_TT1 | TSAUXC_EN_CLK1 | TSAUXC_ST1);\n+\t\t\ttsim &= ~TSINTR_TT1;\n+\t\t} else {\n+\t\t\ttsauxc &= ~(TSAUXC_EN_TT0 | TSAUXC_EN_CLK0 | TSAUXC_ST0);\n+\t\t\ttsim &= ~TSINTR_TT0;\n+\t\t}\n \t\tif (on) {\n \t\t\tint i = rq->perout.index;\n-\n-\t\t\tigb_pin_perout(igb, i, pin);\n+\t\t\tigb_pin_perout(igb, i, pin, use_freq);\n \t\t\tigb->perout[i].start.tv_sec = rq->perout.start.sec;\n \t\t\tigb->perout[i].start.tv_nsec = rq->perout.start.nsec;\n \t\t\tigb->perout[i].period.tv_sec = ts.tv_sec;\n \t\t\tigb->perout[i].period.tv_nsec = ts.tv_nsec;\n \t\t\twr32(trgttimh, rq->perout.start.sec);\n \t\t\twr32(trgttiml, rq->perout.start.nsec);\n+\t\t\tif (use_freq)\n+\t\t\t\twr32(freqout, ns);\n \t\t\ttsauxc |= tsauxc_mask;\n \t\t\ttsim |= tsim_mask;\n-\t\t} else {\n-\t\t\ttsauxc &= ~tsauxc_mask;\n-\t\t\ttsim &= ~tsim_mask;\n \t\t}\n \t\twr32(E1000_TSAUXC, tsauxc);\n \t\twr32(E1000_TSIM, tsim);\n", "prefixes": [] }