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GET /api/patches/497462/?format=api
{ "id": 497462, "url": "http://patchwork.ozlabs.org/api/patches/497462/?format=api", "web_url": "http://patchwork.ozlabs.org/project/intel-wired-lan/patch/eb0fc1b6ebdfe79027886fbf2f64f985a413614d.1437312332.git.raanan.avargil@intel.com/", "project": { "id": 46, "url": "http://patchwork.ozlabs.org/api/projects/46/?format=api", "name": "Intel Wired Ethernet development", "link_name": "intel-wired-lan", "list_id": "intel-wired-lan.osuosl.org", "list_email": "intel-wired-lan@osuosl.org", "web_url": "", "scm_url": "", "webscm_url": "", "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<eb0fc1b6ebdfe79027886fbf2f64f985a413614d.1437312332.git.raanan.avargil@intel.com>", "list_archive_url": null, "date": "2015-07-19T13:33:20", "name": "[1/2] e1000e: Fix tight loop implementation of systime read algorithm", "commit_ref": null, "pull_url": null, "state": "accepted", "archived": false, "hash": "7d8b6761d7d602f17ea01047c242b979e630c40c", "submitter": { "id": 66787, "url": "http://patchwork.ozlabs.org/api/people/66787/?format=api", "name": "Raanan Avargil", "email": "raanan.avargil@intel.com" }, "delegate": { "id": 68, "url": "http://patchwork.ozlabs.org/api/users/68/?format=api", "username": "jtkirshe", "first_name": "Jeff", "last_name": "Kirsher", "email": "jeffrey.t.kirsher@intel.com" }, "mbox": "http://patchwork.ozlabs.org/project/intel-wired-lan/patch/eb0fc1b6ebdfe79027886fbf2f64f985a413614d.1437312332.git.raanan.avargil@intel.com/mbox/", "series": [], "comments": "http://patchwork.ozlabs.org/api/patches/497462/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/497462/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<intel-wired-lan-bounces@lists.osuosl.org>", "X-Original-To": [ "incoming@patchwork.ozlabs.org", "intel-wired-lan@lists.osuosl.org" ], "Delivered-To": [ "patchwork-incoming@bilbo.ozlabs.org", "intel-wired-lan@lists.osuosl.org" ], "Received": [ "from whitealder.osuosl.org (smtp1.osuosl.org [140.211.166.138])\n\tby ozlabs.org (Postfix) with ESMTP id 4A798140D18\n\tfor <incoming@patchwork.ozlabs.org>;\n\tSun, 19 Jul 2015 23:33:30 +1000 (AEST)", "from localhost (localhost [127.0.0.1])\n\tby whitealder.osuosl.org (Postfix) with ESMTP id 9F21A91B0F;\n\tSun, 19 Jul 2015 13:33:29 +0000 (UTC)", "from whitealder.osuosl.org ([127.0.0.1])\n\tby localhost (.osuosl.org [127.0.0.1]) (amavisd-new, port 10024)\n\twith ESMTP id qvNCdepGx3mA; Sun, 19 Jul 2015 13:33:28 +0000 (UTC)", "from ash.osuosl.org (ash.osuosl.org [140.211.166.34])\n\tby whitealder.osuosl.org (Postfix) with ESMTP id F0F3991AE7;\n\tSun, 19 Jul 2015 13:33:28 +0000 (UTC)", "from fraxinus.osuosl.org (smtp4.osuosl.org [140.211.166.137])\n\tby ash.osuosl.org (Postfix) with ESMTP id 2F98B1C072E\n\tfor <intel-wired-lan@lists.osuosl.org>;\n\tSun, 19 Jul 2015 13:33:26 +0000 (UTC)", "from localhost (localhost [127.0.0.1])\n\tby fraxinus.osuosl.org (Postfix) with ESMTP id 2C03BA29A6\n\tfor <intel-wired-lan@lists.osuosl.org>;\n\tSun, 19 Jul 2015 13:33:26 +0000 (UTC)", "from fraxinus.osuosl.org ([127.0.0.1])\n\tby localhost (.osuosl.org [127.0.0.1]) (amavisd-new, port 10024)\n\twith ESMTP id ywmV7bQRrtIz for <intel-wired-lan@lists.osuosl.org>;\n\tSun, 19 Jul 2015 13:33:23 +0000 (UTC)", "from mga01.intel.com (mga01.intel.com [192.55.52.88])\n\tby fraxinus.osuosl.org (Postfix) with ESMTP id 8E7EDA28EC\n\tfor <intel-wired-lan@lists.osuosl.org>;\n\tSun, 19 Jul 2015 13:33:23 +0000 (UTC)", "from orsmga002.jf.intel.com ([10.7.209.21])\n\tby fmsmga101.fm.intel.com with ESMTP; 19 Jul 2015 06:33:23 -0700", "from unknown (HELO ccdpc198.iil.intel.com) ([143.185.160.81])\n\tby orsmga002.jf.intel.com with ESMTP; 19 Jul 2015 06:33:22 -0700" ], "X-Virus-Scanned": [ "amavisd-new at osuosl.org", "amavisd-new at osuosl.org" ], "X-Greylist": "domain auto-whitelisted by SQLgrey-1.7.6", "X-ExtLoop1": "1", "X-IronPort-AV": "E=Sophos;i=\"5.15,503,1432623600\"; d=\"scan'208\";a=\"767232950\"", "From": "Raanan Avargil <raanan.avargil@intel.com>", "To": "intel-wired-lan@lists.osuosl.org", "Date": "Sun, 19 Jul 2015 16:33:20 +0300", "Message-Id": "<eb0fc1b6ebdfe79027886fbf2f64f985a413614d.1437312332.git.raanan.avargil@intel.com>", "X-Mailer": "git-send-email 2.1.0", "Subject": "[Intel-wired-lan] [PATCH 1/2] e1000e: Fix tight loop implementation\n\tof systime read algorithm", "X-BeenThere": "intel-wired-lan@lists.osuosl.org", "X-Mailman-Version": "2.1.18-1", "Precedence": "list", "List-Id": "Intel Wired Ethernet Linux Kernel Driver Development\n\t<intel-wired-lan.lists.osuosl.org>", "List-Unsubscribe": "<http://lists.osuosl.org/mailman/options/intel-wired-lan>, \n\t<mailto:intel-wired-lan-request@lists.osuosl.org?subject=unsubscribe>", "List-Archive": "<http://lists.osuosl.org/pipermail/intel-wired-lan/>", "List-Post": "<mailto:intel-wired-lan@lists.osuosl.org>", "List-Help": "<mailto:intel-wired-lan-request@lists.osuosl.org?subject=help>", "List-Subscribe": "<http://lists.osuosl.org/mailman/listinfo/intel-wired-lan>, \n\t<mailto:intel-wired-lan-request@lists.osuosl.org?subject=subscribe>", "MIME-Version": "1.0", "Content-Type": "text/plain; charset=\"us-ascii\"", "Content-Transfer-Encoding": "7bit", "Errors-To": "intel-wired-lan-bounces@lists.osuosl.org", "Sender": "\"Intel-wired-lan\" <intel-wired-lan-bounces@lists.osuosl.org>" }, "content": "Change the algorithm. Read systimel twice and check for overflow.\nIf there was no overflow, use the first value.\nIf there was an overflow, read systimeh again and use the second systimel value.\n\nSigned-off-by: Raanan Avargil <raanan.avargil@intel.com>\n---\n drivers/net/ethernet/intel/e1000e/netdev.c | 29 +++++++++++++++++++----------\n 1 file changed, 19 insertions(+), 10 deletions(-)", "diff": "diff --git a/drivers/net/ethernet/intel/e1000e/netdev.c b/drivers/net/ethernet/intel/e1000e/netdev.c\nindex f71cd24..f6db0c2 100644\n--- a/drivers/net/ethernet/intel/e1000e/netdev.c\n+++ b/drivers/net/ethernet/intel/e1000e/netdev.c\n@@ -4280,18 +4280,27 @@ static cycle_t e1000e_cyclecounter_read(const struct cyclecounter *cc)\n \tstruct e1000_adapter *adapter = container_of(cc, struct e1000_adapter,\n \t\t\t\t\t\t cc);\n \tstruct e1000_hw *hw = &adapter->hw;\n+\tu32 systimel_1, systimel_2, systimeh;\n \tcycle_t systim, systim_next;\n-\t/* SYSTIMH latching upon SYSTIML read does not work well. To fix that\n-\t * we don't want to allow overflow of SYSTIML and a change to SYSTIMH\n-\t * to occur between reads, so if we read a vale close to overflow, we\n-\t * wait for overflow to occur and read both registers when its safe.\n+\t/* SYSTIMH latching upon SYSTIML read does not work well.\n+\t * This means that if SYSTIML overflows after we read it but before\n+\t * we read SYSTIMH, the value of SYSTIMH has been incremented and we\n+\t * will experience a huge non linear increment in the systime value\n+\t * to fix that we test for overflow and if true, we re-read systime.\n \t */\n-\tu32 systim_overflow_latch_fix = 0x3FFFFFFF;\n-\n-\tdo {\n-\t\tsystim = (cycle_t)er32(SYSTIML);\n-\t} while (systim > systim_overflow_latch_fix);\n-\tsystim |= (cycle_t)er32(SYSTIMH) << 32;\n+\tsystimel_1 = er32(SYSTIML);\n+\tsystimeh = er32(SYSTIMH);\n+\tsystimel_2 = er32(SYSTIML);\n+\t/* Check for overflow. If there was no overflow, use the values */\n+\tif (systimel_1 < systimel_2) {\n+\t\tsystim = (cycle_t)systimel_1;\n+\t\tsystim |= (cycle_t)systimeh << 32;\n+\t} else {\n+\t\t/* There was an overflow, read again SYSTIMH, and use systimel_2 */\n+\t\tsystimeh = er32(SYSTIMH);\n+\t\tsystim = (cycle_t)systimel_2;\n+\t\tsystim |= (cycle_t)systimeh << 32;\n+\t}\n \n \tif ((hw->mac.type == e1000_82574) || (hw->mac.type == e1000_82583)) {\n \t\tu64 incvalue, time_delta, rem, temp;\n", "prefixes": [ "1/2" ] }