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GET /api/patches/482392/?format=api
{ "id": 482392, "url": "http://patchwork.ozlabs.org/api/patches/482392/?format=api", "web_url": "http://patchwork.ozlabs.org/project/intel-wired-lan/patch/78dc0c19f5ddc7fc59e6f54e1950ed1aa7d7ddcc.1433877893.git.yanirx.lubetkin@intel.com/", "project": { "id": 46, "url": "http://patchwork.ozlabs.org/api/projects/46/?format=api", "name": "Intel Wired Ethernet development", "link_name": "intel-wired-lan", "list_id": "intel-wired-lan.osuosl.org", "list_email": "intel-wired-lan@osuosl.org", "web_url": "", "scm_url": "", "webscm_url": "", "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<78dc0c19f5ddc7fc59e6f54e1950ed1aa7d7ddcc.1433877893.git.yanirx.lubetkin@intel.com>", "list_archive_url": null, "date": "2015-06-09T22:15:55", "name": "[2/5] e1000e: i219 - fix to enable both ulp and EEE in Sx state", "commit_ref": null, "pull_url": null, "state": "accepted", "archived": false, "hash": "6a2fde345a5a7fe4b57cc0ef537f6d1f3fdd95c1", "submitter": { "id": 66154, "url": "http://patchwork.ozlabs.org/api/people/66154/?format=api", "name": "Yanir Lubetkin", "email": "yanirx.lubetkin@intel.com" }, "delegate": { "id": 68, "url": "http://patchwork.ozlabs.org/api/users/68/?format=api", "username": "jtkirshe", "first_name": "Jeff", "last_name": "Kirsher", "email": "jeffrey.t.kirsher@intel.com" }, "mbox": "http://patchwork.ozlabs.org/project/intel-wired-lan/patch/78dc0c19f5ddc7fc59e6f54e1950ed1aa7d7ddcc.1433877893.git.yanirx.lubetkin@intel.com/mbox/", "series": [], "comments": "http://patchwork.ozlabs.org/api/patches/482392/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/482392/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<intel-wired-lan-bounces@lists.osuosl.org>", "X-Original-To": [ "incoming@patchwork.ozlabs.org", "intel-wired-lan@lists.osuosl.org" ], "Delivered-To": [ "patchwork-incoming@bilbo.ozlabs.org", "intel-wired-lan@lists.osuosl.org" ], "Received": [ "from fraxinus.osuosl.org (smtp4.osuosl.org [140.211.166.137])\n\tby ozlabs.org (Postfix) with ESMTP id CCB0F140758\n\tfor <incoming@patchwork.ozlabs.org>;\n\tWed, 10 Jun 2015 08:16:42 +1000 (AEST)", "from localhost (localhost [127.0.0.1])\n\tby fraxinus.osuosl.org (Postfix) with ESMTP id 08BAC8B989;\n\tTue, 9 Jun 2015 22:16:42 +0000 (UTC)", "from fraxinus.osuosl.org ([127.0.0.1])\n\tby localhost (.osuosl.org [127.0.0.1]) (amavisd-new, port 10024)\n\twith ESMTP id Cvt4QujMM_ya; Tue, 9 Jun 2015 22:16:41 +0000 (UTC)", "from ash.osuosl.org (ash.osuosl.org [140.211.166.34])\n\tby fraxinus.osuosl.org (Postfix) with ESMTP id 84B898B12C;\n\tTue, 9 Jun 2015 22:16:41 +0000 (UTC)", "from silver.osuosl.org (smtp3.osuosl.org [140.211.166.136])\n\tby ash.osuosl.org (Postfix) with ESMTP id 3720F1C1E80\n\tfor <intel-wired-lan@lists.osuosl.org>;\n\tTue, 9 Jun 2015 22:16:40 +0000 (UTC)", "from localhost (localhost [127.0.0.1])\n\tby silver.osuosl.org (Postfix) with ESMTP id 305A9322AB\n\tfor <intel-wired-lan@lists.osuosl.org>;\n\tTue, 9 Jun 2015 22:16:40 +0000 (UTC)", "from silver.osuosl.org ([127.0.0.1])\n\tby localhost (.osuosl.org [127.0.0.1]) (amavisd-new, port 10024)\n\twith ESMTP id nUJTXcjm+qV6 for <intel-wired-lan@lists.osuosl.org>;\n\tTue, 9 Jun 2015 22:16:39 +0000 (UTC)", "from mga09.intel.com (mga09.intel.com [134.134.136.24])\n\tby silver.osuosl.org (Postfix) with ESMTP id A1BC232271\n\tfor <intel-wired-lan@lists.osuosl.org>;\n\tTue, 9 Jun 2015 22:16:39 +0000 (UTC)", "from fmsmga002.fm.intel.com ([10.253.24.26])\n\tby orsmga102.jf.intel.com with ESMTP; 09 Jun 2015 15:16:40 -0700", "from unknown (HELO ccdpc064.localdomain.com) ([143.185.160.80])\n\tby fmsmga002.fm.intel.com with ESMTP; 09 Jun 2015 15:16:38 -0700" ], "X-Virus-Scanned": [ "amavisd-new at osuosl.org", "amavisd-new at osuosl.org" ], "X-Greylist": "domain auto-whitelisted by SQLgrey-1.7.6", "X-ExtLoop1": "1", "X-IronPort-AV": "E=Sophos;i=\"5.13,584,1427785200\"; d=\"scan'208\";a=\"740402344\"", "From": "Yanir Lubetkin <yanirx.lubetkin@intel.com>", "To": "intel-wired-lan@lists.osuosl.org", "Date": "Wed, 10 Jun 2015 01:15:55 +0300", "Message-Id": "<78dc0c19f5ddc7fc59e6f54e1950ed1aa7d7ddcc.1433877893.git.yanirx.lubetkin@intel.com>", "X-Mailer": "git-send-email 2.1.0", "In-Reply-To": "<f60bcfb3d2cf6db3c53fe84b1620dad209976300.1433877893.git.yanirx.lubetkin@intel.com>", "References": "<f60bcfb3d2cf6db3c53fe84b1620dad209976300.1433877893.git.yanirx.lubetkin@intel.com>", "Subject": "[Intel-wired-lan] [PATCH 2/5] e1000e: i219 - fix to enable both ulp\n\tand EEE in Sx state", "X-BeenThere": "intel-wired-lan@lists.osuosl.org", "X-Mailman-Version": "2.1.18-1", "Precedence": "list", "List-Id": "Intel Wired Ethernet Linux Kernel Driver Development\n\t<intel-wired-lan.lists.osuosl.org>", "List-Unsubscribe": "<http://lists.osuosl.org/mailman/options/intel-wired-lan>, \n\t<mailto:intel-wired-lan-request@lists.osuosl.org?subject=unsubscribe>", "List-Archive": "<http://lists.osuosl.org/pipermail/intel-wired-lan/>", "List-Post": "<mailto:intel-wired-lan@lists.osuosl.org>", "List-Help": "<mailto:intel-wired-lan-request@lists.osuosl.org?subject=help>", "List-Subscribe": "<http://lists.osuosl.org/mailman/listinfo/intel-wired-lan>, \n\t<mailto:intel-wired-lan-request@lists.osuosl.org?subject=subscribe>", "MIME-Version": "1.0", "Content-Type": "text/plain; charset=\"us-ascii\"", "Content-Transfer-Encoding": "7bit", "Errors-To": "intel-wired-lan-bounces@lists.osuosl.org", "Sender": "\"Intel-wired-lan\" <intel-wired-lan-bounces@lists.osuosl.org>" }, "content": "In Jacksonville, there is a hardware bug that prevented ULP entry.\nA side effect of the original software fix for this was that EEE in\nSx couldn't be enabled.\nThis patch implements a modified flow that allows both ULP and EEE in Sx.\n\nSigned-off-by: Yanir Lubetkin <yanirx.lubetkin@intel.com>\n---\n drivers/net/ethernet/intel/e1000e/ich8lan.c | 46 +++++++++++++++++++++--------\n 1 file changed, 33 insertions(+), 13 deletions(-)", "diff": "diff --git a/drivers/net/ethernet/intel/e1000e/ich8lan.c b/drivers/net/ethernet/intel/e1000e/ich8lan.c\nindex c742a4f..bdb745d 100644\n--- a/drivers/net/ethernet/intel/e1000e/ich8lan.c\n+++ b/drivers/net/ethernet/intel/e1000e/ich8lan.c\n@@ -1089,6 +1089,7 @@ s32 e1000_enable_ulp_lpt_lp(struct e1000_hw *hw, bool to_sx)\n \tu32 mac_reg;\n \ts32 ret_val = 0;\n \tu16 phy_reg;\n+\tu16 oem_reg = 0;\n \n \tif ((hw->mac.type < e1000_pch_lpt) ||\n \t (hw->adapter->pdev->device == E1000_DEV_ID_PCH_LPT_I217_LM) ||\n@@ -1130,33 +1131,37 @@ s32 e1000_enable_ulp_lpt_lp(struct e1000_hw *hw, bool to_sx)\n \tif (ret_val)\n \t\tgoto out;\n \n+\t/* Force SMBus mode in PHY */\n+\tret_val = e1000_read_phy_reg_hv_locked(hw, CV_SMB_CTRL, &phy_reg);\n+\tif (ret_val)\n+\t\tgoto release;\n+\tphy_reg |= CV_SMB_CTRL_FORCE_SMBUS;\n+\te1000_write_phy_reg_hv_locked(hw, CV_SMB_CTRL, phy_reg);\n+\n+\t/* Force SMBus mode in MAC */\n+\tmac_reg = er32(CTRL_EXT);\n+\tmac_reg |= E1000_CTRL_EXT_FORCE_SMBUS;\n+\tew32(CTRL_EXT, mac_reg);\n+\n \t/* Si workaround for ULP entry flow on i127/rev6 h/w. Enable\n \t * LPLU and disable Gig speed when entering ULP\n \t */\n \tif ((hw->phy.type == e1000_phy_i217) && (hw->phy.revision == 6)) {\n \t\tret_val = e1000_read_phy_reg_hv_locked(hw, HV_OEM_BITS,\n-\t\t\t\t\t\t &phy_reg);\n+\t\t\t\t\t\t &oem_reg);\n \t\tif (ret_val)\n \t\t\tgoto release;\n+\n+\t\tphy_reg = oem_reg;\n \t\tphy_reg |= HV_OEM_BITS_LPLU | HV_OEM_BITS_GBE_DIS;\n+\n \t\tret_val = e1000_write_phy_reg_hv_locked(hw, HV_OEM_BITS,\n \t\t\t\t\t\t\tphy_reg);\n+\n \t\tif (ret_val)\n \t\t\tgoto release;\n \t}\n \n-\t/* Force SMBus mode in PHY */\n-\tret_val = e1000_read_phy_reg_hv_locked(hw, CV_SMB_CTRL, &phy_reg);\n-\tif (ret_val)\n-\t\tgoto release;\n-\tphy_reg |= CV_SMB_CTRL_FORCE_SMBUS;\n-\te1000_write_phy_reg_hv_locked(hw, CV_SMB_CTRL, phy_reg);\n-\n-\t/* Force SMBus mode in MAC */\n-\tmac_reg = er32(CTRL_EXT);\n-\tmac_reg |= E1000_CTRL_EXT_FORCE_SMBUS;\n-\tew32(CTRL_EXT, mac_reg);\n-\n \t/* Set Inband ULP Exit, Reset to SMBus mode and\n \t * Disable SMBus Release on PERST# in PHY\n \t */\n@@ -1168,10 +1173,15 @@ s32 e1000_enable_ulp_lpt_lp(struct e1000_hw *hw, bool to_sx)\n \tif (to_sx) {\n \t\tif (er32(WUFC) & E1000_WUFC_LNKC)\n \t\t\tphy_reg |= I218_ULP_CONFIG1_WOL_HOST;\n+\t\telse\n+\t\t\tphy_reg &= ~I218_ULP_CONFIG1_WOL_HOST;\n \n \t\tphy_reg |= I218_ULP_CONFIG1_STICKY_ULP;\n+\t\tphy_reg &= ~I218_ULP_CONFIG1_INBAND_EXIT;\n \t} else {\n \t\tphy_reg |= I218_ULP_CONFIG1_INBAND_EXIT;\n+\t\tphy_reg &= ~I218_ULP_CONFIG1_STICKY_ULP;\n+\t\tphy_reg &= ~I218_ULP_CONFIG1_WOL_HOST;\n \t}\n \te1000_write_phy_reg_hv_locked(hw, I218_ULP_CONFIG1, phy_reg);\n \n@@ -1183,6 +1193,16 @@ s32 e1000_enable_ulp_lpt_lp(struct e1000_hw *hw, bool to_sx)\n \t/* Commit ULP changes in PHY by starting auto ULP configuration */\n \tphy_reg |= I218_ULP_CONFIG1_START;\n \te1000_write_phy_reg_hv_locked(hw, I218_ULP_CONFIG1, phy_reg);\n+\n+\tif ((hw->phy.type == e1000_phy_i217) && (hw->phy.revision == 6) &&\n+\t to_sx && (er32(STATUS) & E1000_STATUS_LU)) {\n+\n+\t\tret_val = e1000_write_phy_reg_hv_locked(hw, HV_OEM_BITS,\n+\t\t\t\t\t\t\toem_reg);\n+\t\tif (ret_val)\n+\t\t\tgoto release;\n+\t}\n+\n release:\n \thw->phy.ops.release(hw);\n out:\n", "prefixes": [ "2/5" ] }