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GET /api/patches/481465/?format=api
{ "id": 481465, "url": "http://patchwork.ozlabs.org/api/patches/481465/?format=api", "web_url": "http://patchwork.ozlabs.org/project/intel-wired-lan/patch/1433521234-33355-8-git-send-email-catherine.sullivan@intel.com/", "project": { "id": 46, "url": "http://patchwork.ozlabs.org/api/projects/46/?format=api", "name": "Intel Wired Ethernet development", "link_name": "intel-wired-lan", "list_id": "intel-wired-lan.osuosl.org", "list_email": "intel-wired-lan@osuosl.org", "web_url": "", "scm_url": "", "webscm_url": "", "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<1433521234-33355-8-git-send-email-catherine.sullivan@intel.com>", "list_archive_url": null, "date": "2015-06-05T16:20:31", "name": "[net-next,S07,07/10] i40e/i40evf: Add TX/RX outer UDP checksum support for X722", "commit_ref": null, "pull_url": null, "state": "accepted", "archived": false, "hash": "03c4f4569268adecedbb9868929814e26fe47658", "submitter": { "id": 13931, "url": "http://patchwork.ozlabs.org/api/people/13931/?format=api", "name": "Catherine Sullivan", "email": "catherine.sullivan@intel.com" }, "delegate": { "id": 68, "url": "http://patchwork.ozlabs.org/api/users/68/?format=api", "username": "jtkirshe", "first_name": "Jeff", "last_name": "Kirsher", "email": "jeffrey.t.kirsher@intel.com" }, "mbox": "http://patchwork.ozlabs.org/project/intel-wired-lan/patch/1433521234-33355-8-git-send-email-catherine.sullivan@intel.com/mbox/", "series": [], "comments": "http://patchwork.ozlabs.org/api/patches/481465/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/481465/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<intel-wired-lan-bounces@lists.osuosl.org>", "X-Original-To": [ "incoming@patchwork.ozlabs.org", "intel-wired-lan@lists.osuosl.org" ], "Delivered-To": [ "patchwork-incoming@bilbo.ozlabs.org", "intel-wired-lan@lists.osuosl.org" ], "Received": [ "from fraxinus.osuosl.org (fraxinus.osuosl.org [140.211.166.137])\n\tby ozlabs.org (Postfix) with ESMTP id E59B314016A\n\tfor <incoming@patchwork.ozlabs.org>;\n\tSat, 6 Jun 2015 02:19:32 +1000 (AEST)", "from localhost (localhost [127.0.0.1])\n\tby fraxinus.osuosl.org (Postfix) with ESMTP id 28FB3A38C9;\n\tFri, 5 Jun 2015 16:19:32 +0000 (UTC)", "from fraxinus.osuosl.org ([127.0.0.1])\n\tby localhost (.osuosl.org [127.0.0.1]) (amavisd-new, port 10024)\n\twith ESMTP id r7PnE0uEgfoX; Fri, 5 Jun 2015 16:19:31 +0000 (UTC)", "from ash.osuosl.org (ash.osuosl.org [140.211.166.34])\n\tby fraxinus.osuosl.org (Postfix) with ESMTP id 0D7DCA38F5;\n\tFri, 5 Jun 2015 16:19:31 +0000 (UTC)", "from whitealder.osuosl.org (smtp1.osuosl.org [140.211.166.138])\n\tby ash.osuosl.org (Postfix) with ESMTP id 9DE151C1FC8\n\tfor <intel-wired-lan@lists.osuosl.org>;\n\tFri, 5 Jun 2015 16:19:29 +0000 (UTC)", "from localhost (localhost [127.0.0.1])\n\tby whitealder.osuosl.org (Postfix) with ESMTP id 9AA149181B\n\tfor <intel-wired-lan@lists.osuosl.org>;\n\tFri, 5 Jun 2015 16:19:29 +0000 (UTC)", "from whitealder.osuosl.org ([127.0.0.1])\n\tby localhost (.osuosl.org [127.0.0.1]) (amavisd-new, port 10024)\n\twith ESMTP id R84XZ7kMQBur for <intel-wired-lan@lists.osuosl.org>;\n\tFri, 5 Jun 2015 16:19:28 +0000 (UTC)", "from mga02.intel.com (mga02.intel.com [134.134.136.20])\n\tby whitealder.osuosl.org (Postfix) with ESMTP id 4BC2391824\n\tfor <intel-wired-lan@lists.osuosl.org>;\n\tFri, 5 Jun 2015 16:19:28 +0000 (UTC)", "from orsmga001.jf.intel.com ([10.7.209.18])\n\tby orsmga101.jf.intel.com with ESMTP; 05 Jun 2015 09:18:59 -0700", "from catheri1-tigger.jf.intel.com ([134.134.176.92])\n\tby orsmga001.jf.intel.com with ESMTP; 05 Jun 2015 09:18:59 -0700" ], "X-Virus-Scanned": [ "amavisd-new at osuosl.org", "amavisd-new at osuosl.org" ], "X-Greylist": "domain auto-whitelisted by SQLgrey-1.7.6", "X-ExtLoop1": "1", "X-IronPort-AV": "E=Sophos;i=\"5.13,559,1427785200\"; d=\"scan'208\";a=\"705993664\"", "From": "Catherine Sullivan <catherine.sullivan@intel.com>", "To": "intel-wired-lan@lists.osuosl.org", "Date": "Fri, 5 Jun 2015 12:20:31 -0400", "Message-Id": "<1433521234-33355-8-git-send-email-catherine.sullivan@intel.com>", "X-Mailer": "git-send-email 1.9.3", "In-Reply-To": "<1433521234-33355-1-git-send-email-catherine.sullivan@intel.com>", "References": "<1433521234-33355-1-git-send-email-catherine.sullivan@intel.com>", "Cc": "Anjali Singhai Jain <anjali.singhai@intel.com>", "Subject": "[Intel-wired-lan] [intel-wired-lan][net-next PATCH S07 07/10]\n\ti40e/i40evf: Add TX/RX outer UDP checksum support for X722", "X-BeenThere": "intel-wired-lan@lists.osuosl.org", "X-Mailman-Version": "2.1.18-1", "Precedence": "list", "List-Id": "Intel Wired Ethernet Linux Kernel Driver Development\n\t<intel-wired-lan.lists.osuosl.org>", "List-Unsubscribe": "<http://lists.osuosl.org/mailman/options/intel-wired-lan>, \n\t<mailto:intel-wired-lan-request@lists.osuosl.org?subject=unsubscribe>", "List-Archive": "<http://lists.osuosl.org/pipermail/intel-wired-lan/>", "List-Post": "<mailto:intel-wired-lan@lists.osuosl.org>", "List-Help": "<mailto:intel-wired-lan-request@lists.osuosl.org?subject=help>", "List-Subscribe": "<http://lists.osuosl.org/mailman/listinfo/intel-wired-lan>, \n\t<mailto:intel-wired-lan-request@lists.osuosl.org?subject=subscribe>", "MIME-Version": "1.0", "Content-Type": "text/plain; charset=\"us-ascii\"", "Content-Transfer-Encoding": "7bit", "Errors-To": "intel-wired-lan-bounces@lists.osuosl.org", "Sender": "\"Intel-wired-lan\" <intel-wired-lan-bounces@lists.osuosl.org>" }, "content": "From: Anjali Singhai Jain <anjali.singhai@intel.com>\n\nX722 supports offloading of outer UDP TX and RX checksum for tunneled\npackets. This patch exposes the support and leaves it enabled by\ndefault.\n\nSigned-off-by: Anjali Singhai Jain <anjali.singhai@intel.com>\nSigned-off-by: Catherine Sullivan <catherine.sullivan@intel.com>\n---\n drivers/net/ethernet/intel/i40e/i40e_main.c | 2 ++\n drivers/net/ethernet/intel/i40e/i40e_txrx.c | 16 +++++++++++++++-\n drivers/net/ethernet/intel/i40e/i40e_txrx.h | 2 ++\n drivers/net/ethernet/intel/i40e/i40e_type.h | 10 ++++++++--\n drivers/net/ethernet/intel/i40evf/i40e_txrx.c | 13 +++++++++++++\n drivers/net/ethernet/intel/i40evf/i40e_txrx.h | 2 ++\n drivers/net/ethernet/intel/i40evf/i40e_type.h | 10 ++++++++--\n 7 files changed, 50 insertions(+), 5 deletions(-)", "diff": "diff --git a/drivers/net/ethernet/intel/i40e/i40e_main.c b/drivers/net/ethernet/intel/i40e/i40e_main.c\nindex 904dddf..17a5345 100644\n--- a/drivers/net/ethernet/intel/i40e/i40e_main.c\n+++ b/drivers/net/ethernet/intel/i40e/i40e_main.c\n@@ -7069,6 +7069,8 @@ static int i40e_alloc_rings(struct i40e_vsi *vsi)\n \t\ttx_ring->dcb_tc = 0;\n \t\tif (vsi->back->flags & I40E_FLAG_WB_ON_ITR_CAPABLE)\n \t\t\ttx_ring->flags = I40E_TXR_FLAGS_WB_ON_ITR;\n+\t\tif (vsi->back->flags & I40E_FLAG_OUTER_UDP_CSUM_CAPABLE)\n+\t\t\ttx_ring->flags |= I40E_TXR_FLAGS_OUTER_UDP_CSUM;\n \t\tvsi->tx_rings[i] = tx_ring;\n \n \t\trx_ring = &tx_ring[1];\ndiff --git a/drivers/net/ethernet/intel/i40e/i40e_txrx.c b/drivers/net/ethernet/intel/i40e/i40e_txrx.c\nindex c3aae08..4d48229 100644\n--- a/drivers/net/ethernet/intel/i40e/i40e_txrx.c\n+++ b/drivers/net/ethernet/intel/i40e/i40e_txrx.c\n@@ -1429,7 +1429,8 @@ static inline void i40e_rx_checksum(struct i40e_vsi *vsi,\n \t * so the total length of IPv4 header is IHL*4 bytes\n \t * The UDP_0 bit *may* bet set if the *inner* header is UDP\n \t */\n-\tif (ipv4_tunnel) {\n+\tif (!(vsi->back->flags & I40E_FLAG_OUTER_UDP_CSUM_CAPABLE) &&\n+\t (ipv4_tunnel)) {\n \t\tskb->transport_header = skb->mac_header +\n \t\t\t\t\tsizeof(struct ethhdr) +\n \t\t\t\t\t(ip_hdr(skb)->ihl * 4);\n@@ -2301,11 +2302,15 @@ static void i40e_tx_enable_csum(struct sk_buff *skb, u32 *tx_flags,\n \tstruct iphdr *this_ip_hdr;\n \tu32 network_hdr_len;\n \tu8 l4_hdr = 0;\n+\tstruct udphdr *oudph;\n+\tstruct iphdr *oiph;\n \tu32 l4_tunnel = 0;\n \n \tif (skb->encapsulation) {\n \t\tswitch (ip_hdr(skb)->protocol) {\n \t\tcase IPPROTO_UDP:\n+\t\t\toudph = udp_hdr(skb);\n+\t\t\toiph = ip_hdr(skb);\n \t\t\tl4_tunnel = I40E_TXD_CTX_UDP_TUNNELING;\n \t\t\t*tx_flags |= I40E_TX_FLAGS_VXLAN_TUNNEL;\n \t\t\tbreak;\n@@ -2342,6 +2347,15 @@ static void i40e_tx_enable_csum(struct sk_buff *skb, u32 *tx_flags,\n \t\t\t*tx_flags &= ~I40E_TX_FLAGS_IPV4;\n \t\t\t*tx_flags |= I40E_TX_FLAGS_IPV6;\n \t\t}\n+\t\tif ((tx_ring->flags & I40E_TXR_FLAGS_OUTER_UDP_CSUM) &&\n+\t\t (l4_tunnel == I40E_TXD_CTX_UDP_TUNNELING) &&\n+\t\t (*cd_tunneling & I40E_TXD_CTX_QW0_EXT_IP_MASK)) {\n+\t\t\toudph->check = ~csum_tcpudp_magic(oiph->saddr,\n+\t\t\t\t\toiph->daddr,\n+\t\t\t\t\t(skb->len - skb_transport_offset(skb)),\n+\t\t\t\t\tIPPROTO_UDP, 0);\n+\t\t\t*cd_tunneling |= I40E_TXD_CTX_QW0_L4T_CS_MASK;\n+\t\t}\n \t} else {\n \t\tnetwork_hdr_len = skb_network_header_len(skb);\n \t\tthis_ip_hdr = ip_hdr(skb);\ndiff --git a/drivers/net/ethernet/intel/i40e/i40e_txrx.h b/drivers/net/ethernet/intel/i40e/i40e_txrx.h\nindex 0e40994..f1385a1 100644\n--- a/drivers/net/ethernet/intel/i40e/i40e_txrx.h\n+++ b/drivers/net/ethernet/intel/i40e/i40e_txrx.h\n@@ -267,6 +267,8 @@ struct i40e_ring {\n \n \tu16 flags;\n #define I40E_TXR_FLAGS_WB_ON_ITR\tBIT(0)\n+#define I40E_TXR_FLAGS_OUTER_UDP_CSUM\tBIT(1)\n+\n \t/* stats structs */\n \tstruct i40e_queue_stats\tstats;\n \tstruct u64_stats_sync syncp;\ndiff --git a/drivers/net/ethernet/intel/i40e/i40e_type.h b/drivers/net/ethernet/intel/i40e/i40e_type.h\nindex 1ffd271..b93357d 100644\n--- a/drivers/net/ethernet/intel/i40e/i40e_type.h\n+++ b/drivers/net/ethernet/intel/i40e/i40e_type.h\n@@ -607,14 +607,18 @@ enum i40e_rx_desc_status_bits {\n \tI40E_RX_DESC_STATUS_CRCP_SHIFT\t\t= 4,\n \tI40E_RX_DESC_STATUS_TSYNINDX_SHIFT\t= 5, /* 2 BITS */\n \tI40E_RX_DESC_STATUS_TSYNVALID_SHIFT\t= 7,\n-\tI40E_RX_DESC_STATUS_PIF_SHIFT\t\t= 8,\n+\t/* Note: Bit 8 is reserved in X710 and XL710 */\n+\tI40E_RX_DESC_STATUS_EXT_UDP_0_SHIFT\t= 8,\n \tI40E_RX_DESC_STATUS_UMBCAST_SHIFT\t= 9, /* 2 BITS */\n \tI40E_RX_DESC_STATUS_FLM_SHIFT\t\t= 11,\n \tI40E_RX_DESC_STATUS_FLTSTAT_SHIFT\t= 12, /* 2 BITS */\n \tI40E_RX_DESC_STATUS_LPBK_SHIFT\t\t= 14,\n \tI40E_RX_DESC_STATUS_IPV6EXADD_SHIFT\t= 15,\n \tI40E_RX_DESC_STATUS_RESERVED_SHIFT\t= 16, /* 2 BITS */\n-\tI40E_RX_DESC_STATUS_UDP_0_SHIFT\t\t= 18,\n+\t/* Note: For non-tunnel packets INT_UDP_0 is the right status for\n+\t * UDP header\n+\t */\n+\tI40E_RX_DESC_STATUS_INT_UDP_0_SHIFT\t= 18,\n \tI40E_RX_DESC_STATUS_LAST /* this entry must be last!!! */\n };\n \n@@ -955,6 +959,8 @@ enum i40e_tx_ctx_desc_eipt_offload {\n #define I40E_TXD_CTX_QW0_DECTTL_MASK\t(0xFULL << \\\n \t\t\t\t\t I40E_TXD_CTX_QW0_DECTTL_SHIFT)\n \n+#define I40E_TXD_CTX_QW0_L4T_CS_SHIFT\t23\n+#define I40E_TXD_CTX_QW0_L4T_CS_MASK\tBIT_ULL(I40E_TXD_CTX_QW0_L4T_CS_SHIFT)\n struct i40e_filter_program_desc {\n \t__le32 qindex_flex_ptype_vsi;\n \t__le32 rsvd;\ndiff --git a/drivers/net/ethernet/intel/i40evf/i40e_txrx.c b/drivers/net/ethernet/intel/i40evf/i40e_txrx.c\nindex 9683baf..a444355 100644\n--- a/drivers/net/ethernet/intel/i40evf/i40e_txrx.c\n+++ b/drivers/net/ethernet/intel/i40evf/i40e_txrx.c\n@@ -1524,11 +1524,15 @@ static void i40e_tx_enable_csum(struct sk_buff *skb, u32 *tx_flags,\n \tstruct iphdr *this_ip_hdr;\n \tu32 network_hdr_len;\n \tu8 l4_hdr = 0;\n+\tstruct udphdr *oudph;\n+\tstruct iphdr *oiph;\n \tu32 l4_tunnel = 0;\n \n \tif (skb->encapsulation) {\n \t\tswitch (ip_hdr(skb)->protocol) {\n \t\tcase IPPROTO_UDP:\n+\t\t\toudph = udp_hdr(skb);\n+\t\t\toiph = ip_hdr(skb);\n \t\t\tl4_tunnel = I40E_TXD_CTX_UDP_TUNNELING;\n \t\t\t*tx_flags |= I40E_TX_FLAGS_VXLAN_TUNNEL;\n \t\t\tbreak;\n@@ -1567,6 +1571,15 @@ static void i40e_tx_enable_csum(struct sk_buff *skb, u32 *tx_flags,\n \t\t}\n \n \n+\t\tif ((tx_ring->flags & I40E_TXR_FLAGS_OUTER_UDP_CSUM) &&\n+\t\t (l4_tunnel == I40E_TXD_CTX_UDP_TUNNELING) &&\n+\t\t (*cd_tunneling & I40E_TXD_CTX_QW0_EXT_IP_MASK)) {\n+\t\t\toudph->check = ~csum_tcpudp_magic(oiph->saddr,\n+\t\t\t\t\toiph->daddr,\n+\t\t\t\t\t(skb->len - skb_transport_offset(skb)),\n+\t\t\t\t\tIPPROTO_UDP, 0);\n+\t\t\t*cd_tunneling |= I40E_TXD_CTX_QW0_L4T_CS_MASK;\n+\t\t}\n \t} else {\n \t\tnetwork_hdr_len = skb_network_header_len(skb);\n \t\tthis_ip_hdr = ip_hdr(skb);\ndiff --git a/drivers/net/ethernet/intel/i40evf/i40e_txrx.h b/drivers/net/ethernet/intel/i40evf/i40e_txrx.h\nindex 17bb59d..9a30f5d 100644\n--- a/drivers/net/ethernet/intel/i40evf/i40e_txrx.h\n+++ b/drivers/net/ethernet/intel/i40evf/i40e_txrx.h\n@@ -264,6 +264,8 @@ struct i40e_ring {\n \n \tu16 flags;\n #define I40E_TXR_FLAGS_WB_ON_ITR\tBIT(0)\n+#define I40E_TXR_FLAGS_OUTER_UDP_CSUM\tBIT(1)\n+\n \t/* stats structs */\n \tstruct i40e_queue_stats\tstats;\n \tstruct u64_stats_sync syncp;\ndiff --git a/drivers/net/ethernet/intel/i40evf/i40e_type.h b/drivers/net/ethernet/intel/i40evf/i40e_type.h\nindex 627bf76..e32dc0b 100644\n--- a/drivers/net/ethernet/intel/i40evf/i40e_type.h\n+++ b/drivers/net/ethernet/intel/i40evf/i40e_type.h\n@@ -601,14 +601,18 @@ enum i40e_rx_desc_status_bits {\n \tI40E_RX_DESC_STATUS_CRCP_SHIFT\t\t= 4,\n \tI40E_RX_DESC_STATUS_TSYNINDX_SHIFT\t= 5, /* 2 BITS */\n \tI40E_RX_DESC_STATUS_TSYNVALID_SHIFT\t= 7,\n-\tI40E_RX_DESC_STATUS_PIF_SHIFT\t\t= 8,\n+\t/* Note: Bit 8 is reserved in X710 and XL710 */\n+\tI40E_RX_DESC_STATUS_EXT_UDP_0_SHIFT\t= 8,\n \tI40E_RX_DESC_STATUS_UMBCAST_SHIFT\t= 9, /* 2 BITS */\n \tI40E_RX_DESC_STATUS_FLM_SHIFT\t\t= 11,\n \tI40E_RX_DESC_STATUS_FLTSTAT_SHIFT\t= 12, /* 2 BITS */\n \tI40E_RX_DESC_STATUS_LPBK_SHIFT\t\t= 14,\n \tI40E_RX_DESC_STATUS_IPV6EXADD_SHIFT\t= 15,\n \tI40E_RX_DESC_STATUS_RESERVED_SHIFT\t= 16, /* 2 BITS */\n-\tI40E_RX_DESC_STATUS_UDP_0_SHIFT\t\t= 18,\n+\t/* Note: For non-tunnel packets INT_UDP_0 is the right status for\n+\t * UDP header\n+\t */\n+\tI40E_RX_DESC_STATUS_INT_UDP_0_SHIFT\t= 18,\n \tI40E_RX_DESC_STATUS_LAST /* this entry must be last!!! */\n };\n \n@@ -949,6 +953,8 @@ enum i40e_tx_ctx_desc_eipt_offload {\n #define I40E_TXD_CTX_QW0_DECTTL_MASK\t(0xFULL << \\\n \t\t\t\t\t I40E_TXD_CTX_QW0_DECTTL_SHIFT)\n \n+#define I40E_TXD_CTX_QW0_L4T_CS_SHIFT\t23\n+#define I40E_TXD_CTX_QW0_L4T_CS_MASK\tBIT_ULL(I40E_TXD_CTX_QW0_L4T_CS_SHIFT)\n struct i40e_filter_program_desc {\n \t__le32 qindex_flex_ptype_vsi;\n \t__le32 rsvd;\n", "prefixes": [ "net-next", "S07", "07/10" ] }