Patch Detail
get:
Show a patch.
patch:
Update a patch.
put:
Update a patch.
GET /api/patches/479502/?format=api
{ "id": 479502, "url": "http://patchwork.ozlabs.org/api/patches/479502/?format=api", "web_url": "http://patchwork.ozlabs.org/project/intel-wired-lan/patch/0a640614d95d2eb2a279c3d9d0c3fd7121bd499f.1433253642.git.yanirx.lubetkin@intel.com/", "project": { "id": 46, "url": "http://patchwork.ozlabs.org/api/projects/46/?format=api", "name": "Intel Wired Ethernet development", "link_name": "intel-wired-lan", "list_id": "intel-wired-lan.osuosl.org", "list_email": "intel-wired-lan@osuosl.org", "web_url": "", "scm_url": "", "webscm_url": "", "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<0a640614d95d2eb2a279c3d9d0c3fd7121bd499f.1433253642.git.yanirx.lubetkin@intel.com>", "list_archive_url": null, "date": "2015-06-02T14:05:45", "name": "[v2,3/5] e1000e: fix systim issues", "commit_ref": null, "pull_url": null, "state": "accepted", "archived": false, "hash": "589ef71651a572c5d9263d7e704ca3b841d1a8c7", "submitter": { "id": 66154, "url": "http://patchwork.ozlabs.org/api/people/66154/?format=api", "name": "Yanir Lubetkin", "email": "yanirx.lubetkin@intel.com" }, "delegate": { "id": 68, "url": "http://patchwork.ozlabs.org/api/users/68/?format=api", "username": "jtkirshe", "first_name": "Jeff", "last_name": "Kirsher", "email": "jeffrey.t.kirsher@intel.com" }, "mbox": "http://patchwork.ozlabs.org/project/intel-wired-lan/patch/0a640614d95d2eb2a279c3d9d0c3fd7121bd499f.1433253642.git.yanirx.lubetkin@intel.com/mbox/", "series": [], "comments": "http://patchwork.ozlabs.org/api/patches/479502/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/479502/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<intel-wired-lan-bounces@lists.osuosl.org>", "X-Original-To": [ "incoming@patchwork.ozlabs.org", "intel-wired-lan@lists.osuosl.org" ], "Delivered-To": [ "patchwork-incoming@bilbo.ozlabs.org", "intel-wired-lan@lists.osuosl.org" ], "Received": [ "from hemlock.osuosl.org (hemlock.osuosl.org [140.211.166.133])\n\tby ozlabs.org (Postfix) with ESMTP id 2ABD51412E2\n\tfor <incoming@patchwork.ozlabs.org>;\n\tWed, 3 Jun 2015 00:06:58 +1000 (AEST)", "from localhost (localhost [127.0.0.1])\n\tby hemlock.osuosl.org (Postfix) with ESMTP id 748F28A4AE;\n\tTue, 2 Jun 2015 14:06:57 +0000 (UTC)", "from hemlock.osuosl.org ([127.0.0.1])\n\tby localhost (.osuosl.org [127.0.0.1]) (amavisd-new, port 10024)\n\twith ESMTP id Y0XzoCkl1Off; Tue, 2 Jun 2015 14:06:53 +0000 (UTC)", "from ash.osuosl.org (ash.osuosl.org [140.211.166.34])\n\tby hemlock.osuosl.org (Postfix) with ESMTP id 9F9A08A5C8;\n\tTue, 2 Jun 2015 14:06:53 +0000 (UTC)", "from fraxinus.osuosl.org (fraxinus.osuosl.org [140.211.166.137])\n\tby ash.osuosl.org (Postfix) with ESMTP id 68BFE1C0505\n\tfor <intel-wired-lan@lists.osuosl.org>;\n\tTue, 2 Jun 2015 14:06:52 +0000 (UTC)", "from localhost (localhost [127.0.0.1])\n\tby fraxinus.osuosl.org (Postfix) with ESMTP id 644B1A41E4\n\tfor <intel-wired-lan@lists.osuosl.org>;\n\tTue, 2 Jun 2015 14:06:52 +0000 (UTC)", "from fraxinus.osuosl.org ([127.0.0.1])\n\tby localhost (.osuosl.org [127.0.0.1]) (amavisd-new, port 10024)\n\twith ESMTP id FmYhEZejiwQ9 for <intel-wired-lan@lists.osuosl.org>;\n\tTue, 2 Jun 2015 14:06:51 +0000 (UTC)", "from mga03.intel.com (mga03.intel.com [134.134.136.65])\n\tby fraxinus.osuosl.org (Postfix) with ESMTP id 0DD51A40ED\n\tfor <intel-wired-lan@lists.osuosl.org>;\n\tTue, 2 Jun 2015 14:06:49 +0000 (UTC)", "from fmsmga003.fm.intel.com ([10.253.24.29])\n\tby orsmga103.jf.intel.com with ESMTP; 02 Jun 2015 07:06:34 -0700", "from unknown (HELO ccdpc064.localdomain.com) ([143.185.160.80])\n\tby FMSMGA003.fm.intel.com with ESMTP; 02 Jun 2015 07:06:33 -0700" ], "X-Virus-Scanned": [ "amavisd-new at osuosl.org", "amavisd-new at osuosl.org" ], "X-Greylist": "domain auto-whitelisted by SQLgrey-1.7.6", "X-ExtLoop1": "1", "X-IronPort-AV": "E=Sophos;i=\"5.13,540,1427785200\"; d=\"scan'208\";a=\"501539613\"", "From": "Yanir Lubetkin <yanirx.lubetkin@intel.com>", "To": "intel-wired-lan@lists.osuosl.org", "Date": "Tue, 2 Jun 2015 17:05:45 +0300", "Message-Id": "<0a640614d95d2eb2a279c3d9d0c3fd7121bd499f.1433253642.git.yanirx.lubetkin@intel.com>", "X-Mailer": "git-send-email 2.1.0", "In-Reply-To": "<5c0f5ad24e5ae3adfede0279b6fdfea4312e32da.1433253642.git.yanirx.lubetkin@intel.com>", "References": "<5c0f5ad24e5ae3adfede0279b6fdfea4312e32da.1433253642.git.yanirx.lubetkin@intel.com>", "Subject": "[Intel-wired-lan] [PATCH v2 3/5] e1000e: fix systim issues", "X-BeenThere": "intel-wired-lan@lists.osuosl.org", "X-Mailman-Version": "2.1.18-1", "Precedence": "list", "List-Id": "Intel Wired Ethernet Linux Kernel Driver Development\n\t<intel-wired-lan.lists.osuosl.org>", "List-Unsubscribe": "<http://lists.osuosl.org/mailman/options/intel-wired-lan>, \n\t<mailto:intel-wired-lan-request@lists.osuosl.org?subject=unsubscribe>", "List-Archive": "<http://lists.osuosl.org/pipermail/intel-wired-lan/>", "List-Post": "<mailto:intel-wired-lan@lists.osuosl.org>", "List-Help": "<mailto:intel-wired-lan-request@lists.osuosl.org?subject=help>", "List-Subscribe": "<http://lists.osuosl.org/mailman/listinfo/intel-wired-lan>, \n\t<mailto:intel-wired-lan-request@lists.osuosl.org?subject=subscribe>", "MIME-Version": "1.0", "Content-Type": "text/plain; charset=\"us-ascii\"", "Content-Transfer-Encoding": "7bit", "Errors-To": "intel-wired-lan-bounces@lists.osuosl.org", "Sender": "\"Intel-wired-lan\" <intel-wired-lan-bounces@lists.osuosl.org>" }, "content": "Two issues involving systim were reported.\n1. clock is not running in the correct fequency\n2. in some situations, systim values were not incremented linearly\nThis patch fixes the hardware clock configuration and the spurious non-linear increment.\n\nSigned-off-by: Yanir Lubetkin <yanirx.lubetkin@intel.com>\n---\n drivers/net/ethernet/intel/e1000e/e1000.h | 4 ++++\n drivers/net/ethernet/intel/e1000e/netdev.c | 37 +++++++++++++++++++++---------\n 2 files changed, 30 insertions(+), 11 deletions(-)", "diff": "diff --git a/drivers/net/ethernet/intel/e1000e/e1000.h b/drivers/net/ethernet/intel/e1000e/e1000.h\nindex e78487a..7d8a45c 100644\n--- a/drivers/net/ethernet/intel/e1000e/e1000.h\n+++ b/drivers/net/ethernet/intel/e1000e/e1000.h\n@@ -386,6 +386,10 @@ s32 e1000e_get_base_timinca(struct e1000_adapter *adapter, u32 *timinca);\n #define INCVALUE_SHIFT_25MHz\t18\n #define INCPERIOD_25MHz\t\t1\n \n+#define INCVALUE_24MHz\t\t125\n+#define INCVALUE_SHIFT_24MHz\t14\n+#define INCPERIOD_24MHz\t\t3\n+\n /* Another drawback of scaling the incvalue by a large factor is the\n * 64-bit SYSTIM register overflows more quickly. This is dealt with\n * by simply reading the clock before it overflows.\ndiff --git a/drivers/net/ethernet/intel/e1000e/netdev.c b/drivers/net/ethernet/intel/e1000e/netdev.c\nindex 5f94fdf..d5b02ae 100644\n--- a/drivers/net/ethernet/intel/e1000e/netdev.c\n+++ b/drivers/net/ethernet/intel/e1000e/netdev.c\n@@ -3525,22 +3525,30 @@ s32 e1000e_get_base_timinca(struct e1000_adapter *adapter, u32 *timinca)\n \tswitch (hw->mac.type) {\n \tcase e1000_pch2lan:\n \tcase e1000_pch_lpt:\n-\tcase e1000_pch_spt:\n-\t\t/* On I217, I218 and I219, the clock frequency is 25MHz\n-\t\t * or 96MHz as indicated by the System Clock Frequency\n-\t\t * Indication\n-\t\t */\n-\t\tif (((hw->mac.type != e1000_pch_lpt) &&\n-\t\t (hw->mac.type != e1000_pch_spt)) ||\n-\t\t (er32(TSYNCRXCTL) & E1000_TSYNCRXCTL_SYSCFI)) {\n+\t\tif (er32(TSYNCRXCTL) & E1000_TSYNCRXCTL_SYSCFI) {\n \t\t\t/* Stable 96MHz frequency */\n \t\t\tincperiod = INCPERIOD_96MHz;\n \t\t\tincvalue = INCVALUE_96MHz;\n \t\t\tshift = INCVALUE_SHIFT_96MHz;\n \t\t\tadapter->cc.shift = shift + INCPERIOD_SHIFT_96MHz;\n+\t\t} else {\n+\t\t\t/* Stable 25MHz frequency */\n+\t\t\tincperiod = INCPERIOD_25MHz;\n+\t\t\tincvalue = INCVALUE_25MHz;\n+\t\t\tshift = INCVALUE_SHIFT_25MHz;\n+\t\t\tadapter->cc.shift = shift;\n+\t\t}\n+\t\tbreak;\n+\tcase e1000_pch_spt:\n+\t\tif (er32(TSYNCRXCTL) & E1000_TSYNCRXCTL_SYSCFI) {\n+\t\t\t/* Stable 24MHz frequency */\n+\t\t\tincperiod = INCPERIOD_24MHz;\n+\t\t\tincvalue = INCVALUE_24MHz;\n+\t\t\tshift = INCVALUE_SHIFT_24MHz;\n+\t\t\tadapter->cc.shift = shift;\n \t\t\tbreak;\n \t\t}\n-\t\t/* fall-through */\n+\t\treturn -EINVAL;\n \tcase e1000_82574:\n \tcase e1000_82583:\n \t\t/* Stable 25MHz frequency */\n@@ -4273,9 +4281,16 @@ static cycle_t e1000e_cyclecounter_read(const struct cyclecounter *cc)\n \t\t\t\t\t\t cc);\n \tstruct e1000_hw *hw = &adapter->hw;\n \tcycle_t systim, systim_next;\n+\t/* SYSTIMH latching upon SYSTIML read does not work well. to fix that\n+\t * we don't want to allow overflow of SYSTIML and a change to SYSTIMH\n+\t * to occur between reads, so if we read a vale close to overflow, we\n+\t * wait for overflow to occur and read both registers when its safe.\n+\t */\n+\tu32 systim_overflow_latch_fix = 0x3FFFFFFF;\n \n-\t/* latch SYSTIMH on read of SYSTIML */\n-\tsystim = (cycle_t)er32(SYSTIML);\n+\tdo {\n+\t\tsystim = (cycle_t)er32(SYSTIML);\n+\t} while (systim > systim_overflow_latch_fix);\n \tsystim |= (cycle_t)er32(SYSTIMH) << 32;\n \n \tif ((hw->mac.type == e1000_82574) || (hw->mac.type == e1000_82583)) {\n", "prefixes": [ "v2", "3/5" ] }