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GET /api/patches/476460/?format=api
{ "id": 476460, "url": "http://patchwork.ozlabs.org/api/patches/476460/?format=api", "web_url": "http://patchwork.ozlabs.org/project/linux-pci/patch/1432644564-24746-8-git-send-email-hanjun.guo@linaro.org/", "project": { "id": 28, "url": "http://patchwork.ozlabs.org/api/projects/28/?format=api", "name": "Linux PCI development", "link_name": "linux-pci", "list_id": "linux-pci.vger.kernel.org", "list_email": "linux-pci@vger.kernel.org", "web_url": null, "scm_url": null, "webscm_url": null, "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<1432644564-24746-8-git-send-email-hanjun.guo@linaro.org>", "list_archive_url": null, "date": "2015-05-26T12:49:20", "name": "[07/11] x86, pci: mmconfig_{32,64}.c code refactoring - remove code duplication.", "commit_ref": null, "pull_url": null, "state": "changes-requested", "archived": false, "hash": "a9a41cc621486d58c0d3a4aae580ef276a93bade", "submitter": { "id": 47236, "url": "http://patchwork.ozlabs.org/api/people/47236/?format=api", "name": "Hanjun Guo", "email": "hanjun.guo@linaro.org" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/linux-pci/patch/1432644564-24746-8-git-send-email-hanjun.guo@linaro.org/mbox/", "series": [], "comments": "http://patchwork.ozlabs.org/api/patches/476460/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/476460/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<linux-pci-owner@vger.kernel.org>", "X-Original-To": "incoming@patchwork.ozlabs.org", "Delivered-To": "patchwork-incoming@bilbo.ozlabs.org", "Received": [ "from vger.kernel.org (vger.kernel.org [209.132.180.67])\n\tby ozlabs.org (Postfix) with ESMTP id 50EE0140129\n\tfor <incoming@patchwork.ozlabs.org>;\n\tTue, 26 May 2015 23:19:43 +1000 (AEST)", "(majordomo@vger.kernel.org) by vger.kernel.org via listexpand\n\tid S1753173AbbEZMxf (ORCPT <rfc822;incoming@patchwork.ozlabs.org>);\n\tTue, 26 May 2015 08:53:35 -0400", "from [209.85.192.174] ([209.85.192.174]:33893 \"EHLO\n\tmail-pd0-f174.google.com\" rhost-flags-FAIL-FAIL-OK-FAIL)\n\tby vger.kernel.org with ESMTP id S1753171AbbEZMxd (ORCPT\n\t<rfc822; linux-pci@vger.kernel.org>); Tue, 26 May 2015 08:53:33 -0400", "by pdbki1 with SMTP id ki1so48619656pdb.1\n\tfor <linux-pci@vger.kernel.org>; Tue, 26 May 2015 05:50:39 -0700 (PDT)", "from localhost ([180.150.153.56]) by mx.google.com with ESMTPSA id\n\tie3sm13014882pbb.49.2015.05.26.05.50.37\n\t(version=TLSv1.2 cipher=RC4-SHA bits=128/128);\n\tTue, 26 May 2015 05:50:38 -0700 (PDT)" ], "X-Google-DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed;\n\td=1e100.net; s=20130820;\n\th=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to\n\t:references;\n\tbh=JrrD/aeI8YsedhsFq8/bAmRnT80yvdMUDMEcrXVdtsk=;\n\tb=NSRV5hFMGmtLlAQ2Rie/TzLX1NUWb17BkpX7NORmH9HM803PL76Yr1kPZ3KZE/CSqB\n\tNSjqwVBcbGxbZJKTsm2iq+4PzyftAcxMOk/dUmjiiOAnrqeo7OmoE6bPsTtqU99J6cPI\n\tU9qpdX0DnNwlnottZDnsTHeAZzTu6eYqX557uKifS0Y++jcjU6NuAeKOyuiD1TsH+jjQ\n\tcWfux0Eo8B1GhpVENCkZId8G3LDuv4r2WhjfSnsGXQzXlEZQR25AaniNlqnoiP58yB+V\n\tZpsDsvQ1UPIGWaNj9TNXA1xp154XftE5py5+OZBL0blVEIIWrJBWkcnRQ7M+VhN71CAZ\n\tpGmg==", "X-Gm-Message-State": "ALoCoQnwWr+zEpRQiEE2zGh6t68czBx5YVA2y83X8VWE0WsCA0x5XlNHaoHpDjKQlRUWWw9v0ykS", "X-Received": "by 10.66.55.105 with SMTP id r9mr48853071pap.143.1432644639097; \n\tTue, 26 May 2015 05:50:39 -0700 (PDT)", "From": "Hanjun Guo <hanjun.guo@linaro.org>", "To": "Bjorn Helgaas <bhelgaas@google.com>, Arnd Bergmann <arnd@arndb.de>,\n\tCatalin Marinas <catalin.marinas@arm.com>,\n\tWill Deacon <will.deacon@arm.com>,\n\t\"Rafael J. Wysocki\" <rjw@rjwysocki.net>", "Cc": "Jiang Liu <jiang.liu@linux.intel.com>, Liviu Dudau <Liviu.Dudau@arm.com>,\n\tThomas Gleixner <tglx@linutronix.de>,\n\tYijing Wang <wangyijing@huawei.com>,\n\tLorenzo Pieralisi <Lorenzo.Pieralisi@arm.com>,\n\tTomasz Nowicki <tomasz.nowicki@linaro.org>,\n\tSuravee Suthikulpanit <Suravee.Suthikulpanit@amd.com>,\n\tMark Salter <msalter@redhat.com>, linux-pci@vger.kernel.org,\n\tlinux-arm-kernel@lists.infradead.org, linux-acpi@vger.kernel.org,\n\tlinux-kernel@vger.kernel.org, linaro-acpi@lists.linaro.org,\n\tHanjun Guo <hanjun.guo@linaro.org>", "Subject": "[PATCH 07/11] x86, pci: mmconfig_{32,\n\t64}.c code refactoring - remove code duplication.", "Date": "Tue, 26 May 2015 20:49:20 +0800", "Message-Id": "<1432644564-24746-8-git-send-email-hanjun.guo@linaro.org>", "X-Mailer": "git-send-email 1.9.1", "In-Reply-To": "<1432644564-24746-1-git-send-email-hanjun.guo@linaro.org>", "References": "<1432644564-24746-1-git-send-email-hanjun.guo@linaro.org>", "Sender": "linux-pci-owner@vger.kernel.org", "Precedence": "bulk", "List-ID": "<linux-pci.vger.kernel.org>", "X-Mailing-List": "linux-pci@vger.kernel.org" }, "content": "From: Tomasz Nowicki <tomasz.nowicki@linaro.org>\n\nmmconfig_64.c version is going to be default implementation for arch\nagnostic low-level direct PCI config space accessors for ECAM dirver.\nHowever, now it initialize raw_pci_ext_ops pointer which is x86 specific\ncode only. Moreover, mmconfig_32.c is doing the same thing at the same time.\n\nMove it to mmconfig_shared.c so it becomes common for both and\nmmconfig_64.c turns out to be purely arch agnostic.\n\nSigned-off-by: Tomasz Nowicki <tomasz.nowicki@linaro.org>\nSigned-off-by: Hanjun Guo <hanjun.guo@linaro.org>\nTested-by: Suravee Suthikulpanit <Suravee.Suthikulpanit@amd.com>\n---\n arch/x86/pci/mmconfig-shared.c | 10 ++++++++--\n arch/x86/pci/mmconfig_32.c | 10 ++--------\n arch/x86/pci/mmconfig_64.c | 11 ++---------\n include/linux/ecam.h | 5 +++++\n 4 files changed, 17 insertions(+), 19 deletions(-)", "diff": "diff --git a/arch/x86/pci/mmconfig-shared.c b/arch/x86/pci/mmconfig-shared.c\nindex 6fa3080..8938db3 100644\n--- a/arch/x86/pci/mmconfig-shared.c\n+++ b/arch/x86/pci/mmconfig-shared.c\n@@ -29,6 +29,11 @@\n static bool pci_mmcfg_running_state;\n static bool pci_mmcfg_arch_init_failed;\n \n+const struct pci_raw_ops pci_mmcfg = {\n+\t.read =\t\tpci_mmcfg_read,\n+\t.write =\tpci_mmcfg_write,\n+};\n+\n static u32\n pci_mmconfig_amd_read(int len, void __iomem *addr)\n {\n@@ -555,9 +560,10 @@ static void __init __pci_mmcfg_init(int early)\n \t\t}\n \t}\n \n-\tif (pci_mmcfg_arch_init())\n+\tif (pci_mmcfg_arch_init()) {\n+\t\traw_pci_ext_ops = &pci_mmcfg;\n \t\tpci_probe = (pci_probe & ~PCI_PROBE_MASK) | PCI_PROBE_MMCONF;\n-\telse {\n+\t} else {\n \t\tfree_all_mmcfg();\n \t\tpci_mmcfg_arch_init_failed = true;\n \t}\ndiff --git a/arch/x86/pci/mmconfig_32.c b/arch/x86/pci/mmconfig_32.c\nindex 5cf6291..7a050cb 100644\n--- a/arch/x86/pci/mmconfig_32.c\n+++ b/arch/x86/pci/mmconfig_32.c\n@@ -50,7 +50,7 @@ static void pci_exp_set_dev_base(unsigned int base, int bus, int devfn)\n \t}\n }\n \n-static int pci_mmcfg_read(unsigned int seg, unsigned int bus,\n+int pci_mmcfg_read(unsigned int seg, unsigned int bus,\n \t\t\t unsigned int devfn, int reg, int len, u32 *value)\n {\n \tunsigned long flags;\n@@ -79,7 +79,7 @@ err:\t\t*value = -1;\n \treturn 0;\n }\n \n-static int pci_mmcfg_write(unsigned int seg, unsigned int bus,\n+int pci_mmcfg_write(unsigned int seg, unsigned int bus,\n \t\t\t unsigned int devfn, int reg, int len, u32 value)\n {\n \tunsigned long flags;\n@@ -106,15 +106,9 @@ static int pci_mmcfg_write(unsigned int seg, unsigned int bus,\n \treturn 0;\n }\n \n-const struct pci_raw_ops pci_mmcfg = {\n-\t.read =\t\tpci_mmcfg_read,\n-\t.write =\tpci_mmcfg_write,\n-};\n-\n int __init pci_mmcfg_arch_init(void)\n {\n \tprintk(KERN_INFO \"PCI: Using MMCONFIG for extended config space\\n\");\n-\traw_pci_ext_ops = &pci_mmcfg;\n \treturn 1;\n }\n \ndiff --git a/arch/x86/pci/mmconfig_64.c b/arch/x86/pci/mmconfig_64.c\nindex b62ff18..fd857ea 100644\n--- a/arch/x86/pci/mmconfig_64.c\n+++ b/arch/x86/pci/mmconfig_64.c\n@@ -25,7 +25,7 @@ static char __iomem *pci_dev_base(unsigned int seg, unsigned int bus, unsigned i\n \treturn NULL;\n }\n \n-static int pci_mmcfg_read(unsigned int seg, unsigned int bus,\n+int pci_mmcfg_read(unsigned int seg, unsigned int bus,\n \t\t\t unsigned int devfn, int reg, int len, u32 *value)\n {\n \tchar __iomem *addr;\n@@ -49,7 +49,7 @@ err:\t\t*value = -1;\n \treturn 0;\n }\n \n-static int pci_mmcfg_write(unsigned int seg, unsigned int bus,\n+int pci_mmcfg_write(unsigned int seg, unsigned int bus,\n \t\t\t unsigned int devfn, int reg, int len, u32 value)\n {\n \tchar __iomem *addr;\n@@ -71,11 +71,6 @@ static int pci_mmcfg_write(unsigned int seg, unsigned int bus,\n \treturn 0;\n }\n \n-const struct pci_raw_ops pci_mmcfg = {\n-\t.read =\t\tpci_mmcfg_read,\n-\t.write =\tpci_mmcfg_write,\n-};\n-\n static void __iomem *mcfg_ioremap(struct pci_mmcfg_region *cfg)\n {\n \tvoid __iomem *addr;\n@@ -101,8 +96,6 @@ int __init pci_mmcfg_arch_init(void)\n \t\t\treturn 0;\n \t\t}\n \n-\traw_pci_ext_ops = &pci_mmcfg;\n-\n \treturn 1;\n }\n \ndiff --git a/include/linux/ecam.h b/include/linux/ecam.h\nindex 2387df5..fba5d6b 100644\n--- a/include/linux/ecam.h\n+++ b/include/linux/ecam.h\n@@ -47,5 +47,10 @@ extern struct list_head pci_mmcfg_list;\n \n #define PCI_MMCFG_BUS_OFFSET(bus) ((bus) << 20)\n \n+int pci_mmcfg_read(unsigned int seg, unsigned int bus,\n+\t\t unsigned int devfn, int reg, int len, u32 *value);\n+int pci_mmcfg_write(unsigned int seg, unsigned int bus,\n+\t\t unsigned int devfn, int reg, int len, u32 value);\n+\n #endif /* __KERNEL__ */\n #endif /* __ECAM_H */\n", "prefixes": [ "07/11" ] }