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GET /api/patches/476459/?format=api
{ "id": 476459, "url": "http://patchwork.ozlabs.org/api/patches/476459/?format=api", "web_url": "http://patchwork.ozlabs.org/project/linux-pci/patch/1432644564-24746-7-git-send-email-hanjun.guo@linaro.org/", "project": { "id": 28, "url": "http://patchwork.ozlabs.org/api/projects/28/?format=api", "name": "Linux PCI development", "link_name": "linux-pci", "list_id": "linux-pci.vger.kernel.org", "list_email": "linux-pci@vger.kernel.org", "web_url": null, "scm_url": null, "webscm_url": null, "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<1432644564-24746-7-git-send-email-hanjun.guo@linaro.org>", "list_archive_url": null, "date": "2015-05-26T12:49:19", "name": "[06/11] pci, acpi, mcfg: Provide generic implementation of MCFG code initialization.", "commit_ref": null, "pull_url": null, "state": "changes-requested", "archived": false, "hash": "ffbe1224e9ba8fc54cf2b0a51467262e34b6376b", "submitter": { "id": 47236, "url": "http://patchwork.ozlabs.org/api/people/47236/?format=api", "name": "Hanjun Guo", "email": "hanjun.guo@linaro.org" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/linux-pci/patch/1432644564-24746-7-git-send-email-hanjun.guo@linaro.org/mbox/", "series": [], "comments": "http://patchwork.ozlabs.org/api/patches/476459/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/476459/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<linux-pci-owner@vger.kernel.org>", "X-Original-To": "incoming@patchwork.ozlabs.org", "Delivered-To": "patchwork-incoming@bilbo.ozlabs.org", "Received": [ "from vger.kernel.org (vger.kernel.org [209.132.180.67])\n\tby ozlabs.org (Postfix) with ESMTP id AA375140129\n\tfor <incoming@patchwork.ozlabs.org>;\n\tTue, 26 May 2015 23:19:42 +1000 (AEST)", "(majordomo@vger.kernel.org) by vger.kernel.org via listexpand\n\tid S1753174AbbEZMxc (ORCPT <rfc822;incoming@patchwork.ozlabs.org>);\n\tTue, 26 May 2015 08:53:32 -0400", "from [209.85.220.53] ([209.85.220.53]:35120 \"EHLO\n\tmail-pa0-f53.google.com\" rhost-flags-FAIL-FAIL-OK-FAIL)\n\tby vger.kernel.org with ESMTP id S1753171AbbEZMxa (ORCPT\n\t<rfc822; linux-pci@vger.kernel.org>); Tue, 26 May 2015 08:53:30 -0400", "by pacwv17 with SMTP id wv17so92163752pac.2\n\tfor <linux-pci@vger.kernel.org>; Tue, 26 May 2015 05:50:34 -0700 (PDT)", "from localhost ([180.150.153.56]) by mx.google.com with ESMTPSA id\n\tpd10sm13049639pdb.66.2015.05.26.05.50.32\n\t(version=TLSv1.2 cipher=RC4-SHA bits=128/128);\n\tTue, 26 May 2015 05:50:33 -0700 (PDT)" ], "X-Google-DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed;\n\td=1e100.net; s=20130820;\n\th=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to\n\t:references;\n\tbh=vNNkNAFiwv7ugjcuRPSmxvhIrYtrlfbKdE//QnSpvfw=;\n\tb=VUJfc8CINFNa30R7Jl9bbayN+83dVyHI7h2gmOSmnYoBp/fJZhC2eMEhzxCADlBPvh\n\t9ZCgwOXUz/1jnFbu1QZku+0Emg9wvQ0uN6+tub75DIi8j2507UiyKEP+wMHG8Gm9pyZQ\n\tJYjrfxy5896d/kZU1S1VRqt0QZkZZn36VNzuixl/T7WX/pZw+h45qDFtMsOtvJi1lROk\n\tKJQ2UbFrJekBK59odsctFGD+OmJR0FCaaY2oCNlYsCqWpVKsxPLY2JeKapo1w+MHtNNF\n\tk0AwvUltlVAh9z0xJwlgZYr2pj9HsR7jqwwIiXCKmTixoHw+1e8OydBw6ATkfqlF6B/D\n\tTNtg==", "X-Gm-Message-State": "ALoCoQnBItena9Ae3akrhxHyCYWUNpRkjwHl8nvAym52FEO/6SYYFV8ey/cXbaxU+Bl6qChLUoOm", "X-Received": "by 10.68.191.167 with SMTP id gz7mr49115754pbc.43.1432644634062; \n\tTue, 26 May 2015 05:50:34 -0700 (PDT)", "From": "Hanjun Guo <hanjun.guo@linaro.org>", "To": "Bjorn Helgaas <bhelgaas@google.com>, Arnd Bergmann <arnd@arndb.de>,\n\tCatalin Marinas <catalin.marinas@arm.com>,\n\tWill Deacon <will.deacon@arm.com>,\n\t\"Rafael J. Wysocki\" <rjw@rjwysocki.net>", "Cc": "Jiang Liu <jiang.liu@linux.intel.com>, Liviu Dudau <Liviu.Dudau@arm.com>,\n\tThomas Gleixner <tglx@linutronix.de>,\n\tYijing Wang <wangyijing@huawei.com>,\n\tLorenzo Pieralisi <Lorenzo.Pieralisi@arm.com>,\n\tTomasz Nowicki <tomasz.nowicki@linaro.org>,\n\tSuravee Suthikulpanit <Suravee.Suthikulpanit@amd.com>,\n\tMark Salter <msalter@redhat.com>, linux-pci@vger.kernel.org,\n\tlinux-arm-kernel@lists.infradead.org, linux-acpi@vger.kernel.org,\n\tlinux-kernel@vger.kernel.org, linaro-acpi@lists.linaro.org,\n\tHanjun Guo <hanjun.guo@linaro.org>", "Subject": "[PATCH 06/11] pci, acpi,\n\tmcfg: Provide generic implementation of MCFG code initialization.", "Date": "Tue, 26 May 2015 20:49:19 +0800", "Message-Id": "<1432644564-24746-7-git-send-email-hanjun.guo@linaro.org>", "X-Mailer": "git-send-email 1.9.1", "In-Reply-To": "<1432644564-24746-1-git-send-email-hanjun.guo@linaro.org>", "References": "<1432644564-24746-1-git-send-email-hanjun.guo@linaro.org>", "Sender": "linux-pci-owner@vger.kernel.org", "Precedence": "bulk", "List-ID": "<linux-pci.vger.kernel.org>", "X-Mailing-List": "linux-pci@vger.kernel.org" }, "content": "From: Tomasz Nowicki <tomasz.nowicki@linaro.org>\n\nFirst function acpi_mcfg_check_entry() does not apply any quirks by default.\n\nLast two functions are required by ACPI subsystem to make PCI config\nspace accessible. Generic code assume to do nothing for early init call but\nlate init call does as follow:\n- parse MCFG table and add regions to ECAM resource list\n- map regions\n- add regions to iomem_resource\n\nSigned-off-by: Tomasz Nowicki <tomasz.nowicki@linaro.org>\nSigned-off-by: Hanjun Guo <hanjun.guo@linaro.org>\nTested-by: Suravee Suthikulpanit <Suravee.Suthikulpanit@amd.com>\n---\n drivers/acpi/mcfg.c | 26 ++++++++++++++++++++++++++\n 1 file changed, 26 insertions(+)", "diff": "diff --git a/drivers/acpi/mcfg.c b/drivers/acpi/mcfg.c\nindex 63775af..745b83e 100644\n--- a/drivers/acpi/mcfg.c\n+++ b/drivers/acpi/mcfg.c\n@@ -55,3 +55,29 @@ int __init acpi_parse_mcfg(struct acpi_table_header *header)\n \n \treturn 0;\n }\n+\n+int __init __weak acpi_mcfg_check_entry(struct acpi_table_mcfg *mcfg,\n+\t\t\t\t\tstruct acpi_mcfg_allocation *cfg)\n+{\n+\treturn 0;\n+}\n+\n+void __init __weak pci_mmcfg_early_init(void)\n+{\n+\n+}\n+\n+void __init __weak pci_mmcfg_late_init(void)\n+{\n+\tstruct pci_mmcfg_region *cfg;\n+\n+\tacpi_table_parse(ACPI_SIG_MCFG, acpi_parse_mcfg);\n+\n+\tif (list_empty(&pci_mmcfg_list))\n+\t\treturn;\n+\tif (!pci_mmcfg_arch_init())\n+\t\tfree_all_mmcfg();\n+\n+\tlist_for_each_entry(cfg, &pci_mmcfg_list, list)\n+\t\tinsert_resource(&iomem_resource, &cfg->res);\n+}\n", "prefixes": [ "06/11" ] }