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GET /api/patches/466690/?format=api
{ "id": 466690, "url": "http://patchwork.ozlabs.org/api/patches/466690/?format=api", "web_url": "http://patchwork.ozlabs.org/project/intel-wired-lan/patch/1430417955-28252-4-git-send-email-tharvey@gateworks.com/", "project": { "id": 46, "url": "http://patchwork.ozlabs.org/api/projects/46/?format=api", "name": "Intel Wired Ethernet development", "link_name": "intel-wired-lan", "list_id": "intel-wired-lan.osuosl.org", "list_email": "intel-wired-lan@osuosl.org", "web_url": "", "scm_url": "", "webscm_url": "", "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<1430417955-28252-4-git-send-email-tharvey@gateworks.com>", "list_archive_url": null, "date": "2015-04-30T18:19:15", "name": "[3/3] net: igb: register mii_bus for SerDes w/ external phy", "commit_ref": null, "pull_url": null, "state": "changes-requested", "archived": false, "hash": "763829e7eab92756a8d12dfcf99e78acc4b6d999", "submitter": { "id": 41730, "url": "http://patchwork.ozlabs.org/api/people/41730/?format=api", "name": "Tim Harvey", "email": "tharvey@gateworks.com" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/intel-wired-lan/patch/1430417955-28252-4-git-send-email-tharvey@gateworks.com/mbox/", "series": [], "comments": "http://patchwork.ozlabs.org/api/patches/466690/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/466690/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<intel-wired-lan-bounces@lists.osuosl.org>", "X-Original-To": [ "incoming@patchwork.ozlabs.org", "intel-wired-lan@lists.osuosl.org" ], "Delivered-To": [ "patchwork-incoming@bilbo.ozlabs.org", "intel-wired-lan@lists.osuosl.org" ], "Received": [ "from hemlock.osuosl.org (hemlock.osuosl.org [140.211.166.133])\n\tby ozlabs.org (Postfix) with ESMTP id 6706B140310\n\tfor <incoming@patchwork.ozlabs.org>;\n\tFri, 1 May 2015 04:27:09 +1000 (AEST)", "from localhost (localhost [127.0.0.1])\n\tby hemlock.osuosl.org (Postfix) with ESMTP id AE38B95F26;\n\tThu, 30 Apr 2015 18:27:08 +0000 (UTC)", "from hemlock.osuosl.org ([127.0.0.1])\n\tby localhost (.osuosl.org [127.0.0.1]) (amavisd-new, port 10024)\n\twith ESMTP id z53uCytWV-xY; Thu, 30 Apr 2015 18:27:08 +0000 (UTC)", "from ash.osuosl.org (ash.osuosl.org [140.211.166.34])\n\tby hemlock.osuosl.org (Postfix) with ESMTP id EF8C295F1D;\n\tThu, 30 Apr 2015 18:27:07 +0000 (UTC)", "from whitealder.osuosl.org (whitealder.osuosl.org\n\t[140.211.166.138])\n\tby ash.osuosl.org (Postfix) with ESMTP id 5E96B1BFA96\n\tfor <intel-wired-lan@lists.osuosl.org>;\n\tThu, 30 Apr 2015 18:27:07 +0000 (UTC)", "from localhost (localhost [127.0.0.1])\n\tby whitealder.osuosl.org (Postfix) with ESMTP id 57F3691AE6\n\tfor <intel-wired-lan@lists.osuosl.org>;\n\tThu, 30 Apr 2015 18:27:07 +0000 (UTC)", "from whitealder.osuosl.org ([127.0.0.1])\n\tby localhost (.osuosl.org [127.0.0.1]) (amavisd-new, port 10024)\n\twith ESMTP id t-nUVPzYrE6K for <intel-wired-lan@lists.osuosl.org>;\n\tThu, 30 Apr 2015 18:27:06 +0000 (UTC)", "from mail-pa0-f54.google.com (mail-pa0-f54.google.com\n\t[209.85.220.54])\n\tby whitealder.osuosl.org (Postfix) with ESMTPS id 80CF491AE8\n\tfor <intel-wired-lan@lists.osuosl.org>;\n\tThu, 30 Apr 2015 18:27:06 +0000 (UTC)", "by pacyx8 with SMTP id yx8so67367445pac.1\n\tfor <intel-wired-lan@lists.osuosl.org>;\n\tThu, 30 Apr 2015 11:27:06 -0700 (PDT)", "from tharvey.gw (68-189-91-139.static.snlo.ca.charter.com.\n\t[68.189.91.139]) by mx.google.com with ESMTPSA id\n\tbs4sm2821374pdb.21.2015.04.30.11.19.23\n\t(version=TLSv1.2 cipher=ECDHE-RSA-AES128-SHA bits=128/128);\n\tThu, 30 Apr 2015 11:19:23 -0700 (PDT)" ], "X-Virus-Scanned": [ "amavisd-new at osuosl.org", "amavisd-new at osuosl.org" ], "X-Greylist": "delayed 00:07:42 by SQLgrey-1.7.6", "X-Google-DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed;\n\td=1e100.net; s=20130820;\n\th=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to\n\t:references;\n\tbh=Jfw74cihJlH9ZVJneQWc2LZWz6qP1qz7O1eUHCgxYDU=;\n\tb=KpCKEeFP/KDqsKQs3A6A7Un/uI/O4SXICEtzOvmUGKTs6DmHTWgnnrEvI/nK4qG1UV\n\tWB3VFmC7+B9GoGU8jot0cPxD3pxiJoXChLYNklFRetEonAO7h5Ql4UTNNdGBrbqNbdNB\n\txM4khzI/1WNsUScOPj86wVD/OgiIG5ywZemx7W/Li6QYt8TZDM/Yr8HLuGXXrpJ/D5hZ\n\tDjb3x05MWJn7x3uXKMyskdn7cdXb3YCFZczTlGNBLd22OOXDiu5y04tX4FKGuJchsQ8q\n\thfa1oQw+Ed/1HmGh6NAVI0ogw7vp8ENcI8K5+D+z2F0emNHO2r8UPZSQ3ultoyN/p04R\n\tVTqg==", "X-Gm-Message-State": "ALoCoQktXBYC1lGLNmaAMnGzzJXb9wJeP/OEaX1sMBxVXSXqlI70eEHGyKbFwLKO5a52kuKpZpRP", "X-Received": "by 10.70.136.1 with SMTP id pw1mr10509570pdb.21.1430417964468;\n\tThu, 30 Apr 2015 11:19:24 -0700 (PDT)", "From": "Tim Harvey <tharvey@gateworks.com>", "To": "Jeff Kirsher <jeffrey.t.kirsher@intel.com>", "Date": "Thu, 30 Apr 2015 11:19:15 -0700", "Message-Id": "<1430417955-28252-4-git-send-email-tharvey@gateworks.com>", "X-Mailer": "git-send-email 1.9.1", "In-Reply-To": "<1430417955-28252-1-git-send-email-tharvey@gateworks.com>", "References": "<1430417955-28252-1-git-send-email-tharvey@gateworks.com>", "Cc": "intel-wired-lan@lists.osuosl.org", "Subject": "[Intel-wired-lan] [PATCH 3/3] net: igb: register mii_bus for SerDes\n\tw/ external phy", "X-BeenThere": "intel-wired-lan@lists.osuosl.org", "X-Mailman-Version": "2.1.18-1", "Precedence": "list", "List-Id": "Intel Wired Ethernet Linux Kernel Driver Development\n\t<intel-wired-lan.lists.osuosl.org>", "List-Unsubscribe": "<http://lists.osuosl.org/mailman/options/intel-wired-lan>, \n\t<mailto:intel-wired-lan-request@lists.osuosl.org?subject=unsubscribe>", "List-Archive": "<http://lists.osuosl.org/pipermail/intel-wired-lan/>", "List-Post": "<mailto:intel-wired-lan@lists.osuosl.org>", "List-Help": "<mailto:intel-wired-lan-request@lists.osuosl.org?subject=help>", "List-Subscribe": "<http://lists.osuosl.org/mailman/listinfo/intel-wired-lan>, \n\t<mailto:intel-wired-lan-request@lists.osuosl.org?subject=subscribe>", "MIME-Version": "1.0", "Content-Type": "text/plain; charset=\"us-ascii\"", "Content-Transfer-Encoding": "7bit", "Errors-To": "intel-wired-lan-bounces@lists.osuosl.org", "Sender": "\"Intel-wired-lan\" <intel-wired-lan-bounces@lists.osuosl.org>" }, "content": "If an i210 is configured for 1000BASE-BX link_mode and has an external\nphy specified, then register an mii bus using the external phy address as\na mask.\n\nAn i210 hooked to an external standard phy will be configured with a\nlink_mode of SGMII in which case phy ops will be configured and used\ninternal in the igb driver for link status. However, in certain cases\none might be using a backplane SerDes connection to something that talks\non the mdio bus but is not a standard phy, such as a switch. In this case\nby registering an mdio bus a phy driver can manage the device.\n\nSigned-off-by: Tim Harvey <tharvey@gateworks.com>\n---\n drivers/net/ethernet/intel/igb/e1000_82575.c | 16 +++\n drivers/net/ethernet/intel/igb/e1000_hw.h | 7 ++\n drivers/net/ethernet/intel/igb/igb_main.c | 163 ++++++++++++++++++++++++++-\n 3 files changed, 181 insertions(+), 5 deletions(-)", "diff": "diff --git a/drivers/net/ethernet/intel/igb/e1000_82575.c b/drivers/net/ethernet/intel/igb/e1000_82575.c\nindex d2afd7b..e80617b 100644\n--- a/drivers/net/ethernet/intel/igb/e1000_82575.c\n+++ b/drivers/net/ethernet/intel/igb/e1000_82575.c\n@@ -598,13 +598,26 @@ static s32 igb_get_invariants_82575(struct e1000_hw *hw)\n \tswitch (link_mode) {\n \tcase E1000_CTRL_EXT_LINK_MODE_1000BASE_KX:\n \t\thw->phy.media_type = e1000_media_type_internal_serdes;\n+\t\tif (igb_sgmii_uses_mdio_82575(hw)) {\n+\t\t\tu32 mdicnfg = rd32(E1000_MDICNFG);\n+\n+\t\t\tmdicnfg &= E1000_MDICNFG_PHY_MASK;\n+\t\t\thw->phy.addr = mdicnfg >> E1000_MDICNFG_PHY_SHIFT;\n+\t\t\thw_dbg(\"1000BASE_KX w/ external MDIO device at 0x%x\\n\",\n+\t\t\t hw->phy.addr);\n+\t\t} else {\n+\t\t\thw_dbg(\"1000BASE_KX\");\n+\t\t}\n \t\tbreak;\n \tcase E1000_CTRL_EXT_LINK_MODE_SGMII:\n \t\t/* Get phy control interface type set (MDIO vs. I2C)*/\n \t\tif (igb_sgmii_uses_mdio_82575(hw)) {\n \t\t\thw->phy.media_type = e1000_media_type_copper;\n \t\t\tdev_spec->sgmii_active = true;\n+\t\t\thw_dbg(\"SGMII with external MDIO PHY\");\n \t\t\tbreak;\n+\t\t} else {\n+\t\t\thw_dbg(\"SGMII with external I2C PHY\");\n \t\t}\n \t\t/* fall through for I2C based SGMII */\n \tcase E1000_CTRL_EXT_LINK_MODE_PCIE_SERDES:\n@@ -621,8 +634,11 @@ static s32 igb_get_invariants_82575(struct e1000_hw *hw)\n \t\t\t\thw->phy.media_type = e1000_media_type_copper;\n \t\t\t\tdev_spec->sgmii_active = true;\n \t\t\t}\n+\t\t\thw_dbg(\"SERDES with external SFP\");\n \n \t\t\tbreak;\n+\t\t} else {\n+\t\t\thw_dbg(\"SERDES\");\n \t\t}\n \n \t\t/* do not change link mode for 100BaseFX */\ndiff --git a/drivers/net/ethernet/intel/igb/e1000_hw.h b/drivers/net/ethernet/intel/igb/e1000_hw.h\nindex 2003b37..2864779 100644\n--- a/drivers/net/ethernet/intel/igb/e1000_hw.h\n+++ b/drivers/net/ethernet/intel/igb/e1000_hw.h\n@@ -27,6 +27,7 @@\n #include <linux/delay.h>\n #include <linux/io.h>\n #include <linux/netdevice.h>\n+#include <linux/phy.h>\n \n #include \"e1000_regs.h\"\n #include \"e1000_defines.h\"\n@@ -543,6 +544,12 @@ struct e1000_hw {\n \tstruct e1000_mbx_info mbx;\n \tstruct e1000_host_mng_dhcp_cookie mng_cookie;\n \n+#ifdef CONFIG_PHYLIB\n+\t/* Phylib and MDIO interface */\n+\tstruct mii_bus *mii_bus;\n+\tstruct phy_device *phy_dev;\n+\tphy_interface_t phy_interface;\n+#endif\n \tunion {\n \t\tstruct e1000_dev_spec_82575\t_82575;\n \t} dev_spec;\ndiff --git a/drivers/net/ethernet/intel/igb/igb_main.c b/drivers/net/ethernet/intel/igb/igb_main.c\nindex f366b3b..9b5f538 100644\n--- a/drivers/net/ethernet/intel/igb/igb_main.c\n+++ b/drivers/net/ethernet/intel/igb/igb_main.c\n@@ -41,6 +41,7 @@\n #include <linux/if_vlan.h>\n #include <linux/pci.h>\n #include <linux/pci-aspm.h>\n+#include <linux/phy.h>\n #include <linux/delay.h>\n #include <linux/interrupt.h>\n #include <linux/ip.h>\n@@ -2223,6 +2224,121 @@ static s32 igb_init_i2c(struct igb_adapter *adapter)\n \treturn status;\n }\n \n+#ifdef CONFIG_PHYLIB\n+static int igb_enet_mdio_read(struct mii_bus *bus, int mii_id, int regnum)\n+{\n+\tstruct e1000_hw *hw = bus->priv;\n+\tu16 out;\n+\tint err;\n+\n+\terr = igb_read_reg_gs40g(hw, mii_id, regnum, &out);\n+\tif (err)\n+\t\treturn err;\n+\treturn out;\n+}\n+\n+static int igb_enet_mdio_write(struct mii_bus *bus, int mii_id, int regnum,\n+\t\t\t u16 val)\n+{\n+\tstruct e1000_hw *hw = bus->priv;\n+\n+\treturn igb_write_reg_gs40g(hw, mii_id, regnum, val);\n+}\n+\n+static int igb_enet_mdio_reset(struct mii_bus *bus)\n+{\n+\tusleep_range(1000, 2000);\n+\treturn 0;\n+}\n+\n+static void igb_enet_mii_link(struct net_device *netdev)\n+{\n+}\n+\n+/* Probe the mdio bus for phys and connect them */\n+static int igb_enet_mii_probe(struct net_device *netdev)\n+{\n+\tstruct igb_adapter *adapter = netdev_priv(netdev);\n+\tstruct e1000_hw *hw = &adapter->hw;\n+\tstruct phy_device *phy_dev = NULL;\n+\tint phy_id;\n+\n+\t/* check for attached phy */\n+\tfor (phy_id = 0; (phy_id < PHY_MAX_ADDR); phy_id++) {\n+\t\tif (hw->mii_bus->phy_map[phy_id]) {\n+\t\t\tphy_dev = hw->mii_bus->phy_map[phy_id];\n+\t\t\tbreak;\n+\t\t}\n+\t}\n+\tif (!phy_dev) {\n+\t\tnetdev_err(netdev, \"no PHY found\\n\");\n+\t\treturn -ENODEV;\n+\t}\n+\n+\thw->phy_interface = PHY_INTERFACE_MODE_RGMII;\n+\tphy_dev = phy_connect(netdev, dev_name(&phy_dev->dev),\n+\t\t\t igb_enet_mii_link, hw->phy_interface);\n+\tif (IS_ERR(phy_dev)) {\n+\t\tnetdev_err(netdev, \"could not attach to PHY\\n\");\n+\t\treturn PTR_ERR(phy_dev);\n+\t}\n+\n+\thw->phy_dev = phy_dev;\n+\tnetdev_info(netdev, \"igb PHY driver [%s] (mii_bus:phy_addr=%s)\\n\",\n+\t\t hw->phy_dev->drv->name, dev_name(&hw->phy_dev->dev));\n+\n+\treturn 0;\n+}\n+\n+/* Create and register mdio bus */\n+static int igb_enet_mii_init(struct pci_dev *pdev)\n+{\n+\tstruct mii_bus *mii_bus;\n+\tstruct net_device *netdev = pci_get_drvdata(pdev);\n+\tstruct igb_adapter *adapter = netdev_priv(netdev);\n+\tstruct e1000_hw *hw = &adapter->hw;\n+\tint err;\n+\n+\tmii_bus = mdiobus_alloc();\n+\tif (!mii_bus) {\n+\t\terr = -ENOMEM;\n+\t\tgoto err_out;\n+\t}\n+\n+\tmii_bus->name = \"igb_enet_mii_bus\";\n+\tmii_bus->read = igb_enet_mdio_read;\n+\tmii_bus->write = igb_enet_mdio_write;\n+\tmii_bus->reset = igb_enet_mdio_reset;\n+\tsnprintf(mii_bus->id, MII_BUS_ID_SIZE, \"%s-%x\",\n+\t\t pci_name(pdev), hw->device_id + 1);\n+\tmii_bus->priv = hw;\n+\tmii_bus->parent = &pdev->dev;\n+\tmii_bus->phy_mask = ~(1 << hw->phy.addr);\n+\n+\terr = mdiobus_register(mii_bus);\n+\tif (err) {\n+\t\tnetdev_err(netdev, \"failed to register mii_bus: %d\\n\", err);\n+\t\tgoto err_out_free_mdiobus;\n+\t}\n+\thw->mii_bus = mii_bus;\n+\n+\treturn 0;\n+\n+err_out_free_mdiobus:\n+\tmdiobus_free(mii_bus);\n+err_out:\n+\treturn err;\n+}\n+\n+static void igb_enet_mii_remove(struct e1000_hw *hw)\n+{\n+\tif (hw->mii_bus) {\n+\t\tmdiobus_unregister(hw->mii_bus);\n+\t\tmdiobus_free(hw->mii_bus);\n+\t}\n+}\n+#endif /* CONFIG_PHYLIB */\n+\n /**\n * igb_probe - Device Initialization Routine\n * @pdev: PCI device information struct\n@@ -2645,6 +2761,13 @@ static int igb_probe(struct pci_dev *pdev, const struct pci_device_id *ent)\n \t\t}\n \t}\n \tpm_runtime_put_noidle(&pdev->dev);\n+\n+#ifdef CONFIG_PHYLIB\n+\t/* create and register the mdio bus if using ext phy */\n+\tif (rd32(E1000_MDICNFG) & E1000_MDICNFG_EXT_MDIO)\n+\t\tigb_enet_mii_init(pdev);\n+#endif\n+\n \treturn 0;\n \n err_register:\n@@ -2788,6 +2911,10 @@ static void igb_remove(struct pci_dev *pdev)\n \tstruct e1000_hw *hw = &adapter->hw;\n \n \tpm_runtime_get_noresume(&pdev->dev);\n+#ifdef CONFIG_PHYLIB\n+\tif (rd32(E1000_MDICNFG) & E1000_MDICNFG_EXT_MDIO)\n+\t\tigb_enet_mii_remove(hw);\n+#endif\n #ifdef CONFIG_IGB_HWMON\n \tigb_sysfs_exit(adapter);\n #endif\n@@ -3093,6 +3220,12 @@ static int __igb_open(struct net_device *netdev, bool resuming)\n \tif (!resuming)\n \t\tpm_runtime_put(&pdev->dev);\n \n+#ifdef CONFIG_PHYLIB\n+\t/* Probe and connect to PHY if using ext phy */\n+\tif (rd32(E1000_MDICNFG) & E1000_MDICNFG_EXT_MDIO)\n+\t\tigb_enet_mii_probe(netdev);\n+#endif\n+\n \t/* start the watchdog. */\n \thw->mac.get_link_status = 1;\n \tschedule_work(&adapter->watchdog_task);\n@@ -7127,21 +7260,41 @@ void igb_alloc_rx_buffers(struct igb_ring *rx_ring, u16 cleaned_count)\n static int igb_mii_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)\n {\n \tstruct igb_adapter *adapter = netdev_priv(netdev);\n+\tstruct e1000_hw *hw = &adapter->hw;\n \tstruct mii_ioctl_data *data = if_mii(ifr);\n \n-\tif (adapter->hw.phy.media_type != e1000_media_type_copper)\n+\tif (adapter->hw.phy.media_type != e1000_media_type_copper &&\n+\t !(rd32(E1000_MDICNFG) & E1000_MDICNFG_EXT_MDIO))\n \t\treturn -EOPNOTSUPP;\n \n \tswitch (cmd) {\n \tcase SIOCGMIIPHY:\n-\t\tdata->phy_id = adapter->hw.phy.addr;\n+\t\tdata->phy_id = hw->phy.addr;\n \t\tbreak;\n \tcase SIOCGMIIREG:\n-\t\tif (igb_read_phy_reg(&adapter->hw, data->reg_num & 0x1F,\n-\t\t\t\t &data->val_out))\n-\t\t\treturn -EIO;\n+\t\tif (hw->mac.type == e1000_i210 || hw->mac.type == e1000_i211) {\n+\t\t\tif (igb_read_reg_gs40g(&adapter->hw, data->phy_id,\n+\t\t\t\t\t data->reg_num & 0x1F,\n+\t\t\t\t\t &data->val_out))\n+\t\t\t\treturn -EIO;\n+\t\t} else {\n+\t\t\tif (igb_read_phy_reg(&adapter->hw, data->reg_num & 0x1F,\n+\t\t\t\t\t &data->val_out))\n+\t\t\t\treturn -EIO;\n+\t\t}\n \t\tbreak;\n \tcase SIOCSMIIREG:\n+\t\tif (hw->mac.type == e1000_i210 || hw->mac.type == e1000_i211) {\n+\t\t\tif (igb_write_reg_gs40g(hw, data->phy_id,\n+\t\t\t\t\t\tdata->reg_num & 0x1F,\n+\t\t\t\t\t\tdata->val_in))\n+\t\t\t\treturn -EIO;\n+\t\t} else {\n+\t\t\tif (igb_write_phy_reg(hw, data->reg_num & 0x1F,\n+\t\t\t\t\t data->val_in))\n+\t\t\t\treturn -EIO;\n+\t\t}\n+\t\tbreak;\n \tdefault:\n \t\treturn -EOPNOTSUPP;\n \t}\n", "prefixes": [ "3/3" ] }