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GET /api/patches/462223/?format=api
{ "id": 462223, "url": "http://patchwork.ozlabs.org/api/patches/462223/?format=api", "web_url": "http://patchwork.ozlabs.org/project/intel-wired-lan/patch/1429302240-654-1-git-send-email-jtoppins@cumulusnetworks.com/", "project": { "id": 46, "url": "http://patchwork.ozlabs.org/api/projects/46/?format=api", "name": "Intel Wired Ethernet development", "link_name": "intel-wired-lan", "list_id": "intel-wired-lan.osuosl.org", "list_email": "intel-wired-lan@osuosl.org", "web_url": "", "scm_url": "", "webscm_url": "", "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<1429302240-654-1-git-send-email-jtoppins@cumulusnetworks.com>", "list_archive_url": null, "date": "2015-04-17T20:23:59", "name": "[v1,net-next,1/2] igb: add PHY support for Broadcom 5461S", "commit_ref": null, "pull_url": null, "state": "changes-requested", "archived": false, "hash": "ca1d126bf841f00f7170484d5c4347ffdb9d005b", "submitter": { "id": 64552, "url": "http://patchwork.ozlabs.org/api/people/64552/?format=api", "name": "Jonathan Toppins", "email": "jtoppins@cumulusnetworks.com" }, "delegate": { "id": 68, "url": "http://patchwork.ozlabs.org/api/users/68/?format=api", "username": "jtkirshe", "first_name": "Jeff", "last_name": "Kirsher", "email": "jeffrey.t.kirsher@intel.com" }, "mbox": "http://patchwork.ozlabs.org/project/intel-wired-lan/patch/1429302240-654-1-git-send-email-jtoppins@cumulusnetworks.com/mbox/", "series": [], "comments": "http://patchwork.ozlabs.org/api/patches/462223/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/462223/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<intel-wired-lan-bounces@lists.osuosl.org>", "X-Original-To": [ "incoming@patchwork.ozlabs.org", "intel-wired-lan@lists.osuosl.org" ], "Delivered-To": [ "patchwork-incoming@bilbo.ozlabs.org", "intel-wired-lan@lists.osuosl.org" ], "Received": [ "from silver.osuosl.org (silver.osuosl.org [140.211.166.136])\n\tby ozlabs.org (Postfix) with ESMTP id BE928140293\n\tfor <incoming@patchwork.ozlabs.org>;\n\tSat, 18 Apr 2015 09:46:11 +1000 (AEST)", "from localhost (localhost [127.0.0.1])\n\tby silver.osuosl.org (Postfix) with ESMTP id E2EE133383;\n\tFri, 17 Apr 2015 23:46:10 +0000 (UTC)", "from silver.osuosl.org ([127.0.0.1])\n\tby localhost (.osuosl.org [127.0.0.1]) (amavisd-new, port 10024)\n\twith ESMTP id iughwvyrQBE0; Fri, 17 Apr 2015 23:46:07 +0000 (UTC)", "from ash.osuosl.org (ash.osuosl.org [140.211.166.34])\n\tby silver.osuosl.org (Postfix) with ESMTP id C7A113337C;\n\tFri, 17 Apr 2015 23:46:07 +0000 (UTC)", "from fraxinus.osuosl.org (fraxinus.osuosl.org [140.211.166.137])\n\tby ash.osuosl.org (Postfix) with ESMTP id 9B0B91C21A3\n\tfor <intel-wired-lan@lists.osuosl.org>;\n\tFri, 17 Apr 2015 20:24:12 +0000 (UTC)", "from localhost (localhost [127.0.0.1])\n\tby fraxinus.osuosl.org (Postfix) with ESMTP id 95869A2333\n\tfor <intel-wired-lan@lists.osuosl.org>;\n\tFri, 17 Apr 2015 20:24:12 +0000 (UTC)", "from fraxinus.osuosl.org ([127.0.0.1])\n\tby localhost (.osuosl.org [127.0.0.1]) (amavisd-new, port 10024)\n\twith ESMTP id k9MWOZcGaZ2R for <intel-wired-lan@lists.osuosl.org>;\n\tFri, 17 Apr 2015 20:24:11 +0000 (UTC)", "from mail-pd0-f173.google.com (mail-pd0-f173.google.com\n\t[209.85.192.173])\n\tby fraxinus.osuosl.org (Postfix) with ESMTPS id B27AAA232D\n\tfor <intel-wired-lan@lists.osuosl.org>;\n\tFri, 17 Apr 2015 20:24:11 +0000 (UTC)", "by pdbnk13 with SMTP id nk13so138571731pdb.0\n\tfor <intel-wired-lan@lists.osuosl.org>;\n\tFri, 17 Apr 2015 13:24:11 -0700 (PDT)", "from monster-01.cumulusnetworks.com ([216.129.126.126])\n\tby mx.google.com with ESMTPSA id\n\tnd3sm10951713pbc.9.2015.04.17.13.24.10\n\t(version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128);\n\tFri, 17 Apr 2015 13:24:10 -0700 (PDT)" ], "Authentication-Results": "ozlabs.org; dkim=fail\n\treason=\"verification failed; unprotected key\"\n\theader.d=cumulusnetworks.com header.i=@cumulusnetworks.com\n\theader.b=O1VjEIAG; dkim-adsp=none (unprotected policy);\n\tdkim-atps=neutral", "X-Virus-Scanned": [ "amavisd-new at osuosl.org", "amavisd-new at osuosl.org" ], "X-Greylist": "from auto-whitelisted by SQLgrey-1.7.6", "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed;\n\td=cumulusnetworks.com; s=google;\n\th=from:to:cc:subject:date:message-id;\n\tbh=w5WmTwkjJ7CLPGRQPwy5JfiPiTewebXUgrL4JY9dTPc=;\n\tb=O1VjEIAGXDgs3iMKX0J3oxkHhd+KyJxZ2tiiJ8CLoSNvJfY637Ny7sa6SKb55hvbGf\n\tlnHW6/8SFSjGnDXsavs6ng98yjoYv2JmjXP9wTli8UlhJ4qSDLUbTvcEirGOdiRkmZBw\n\tWs3FyRy1prwRYxeUq4OuMaop1VuEgpSry0Fdc=", "X-Google-DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed;\n\td=1e100.net; s=20130820;\n\th=x-gm-message-state:from:to:cc:subject:date:message-id;\n\tbh=w5WmTwkjJ7CLPGRQPwy5JfiPiTewebXUgrL4JY9dTPc=;\n\tb=gesVp8SSUF0ZqjB91sGfI+ZLsQn69ysuoafXwHuncZA79sxWeMYLO8/XzSj2e3qzCh\n\t4D6ezg04iPVjRa5uwH7kx3wV5XwkkPqVz6Xa1Ck71D4B6WTodsNH+cmIM1yAF4RlJFJg\n\t6CoJzaL6XffyXxyQRtWz6WfFfaB9npgULmvRcWgViYNj1eXOxtmHU+ey3e2tb1YqpvSy\n\tnReUa7SCU+/q6OymPkyi/Qza7DQZ2jW9rjQHqvAeNvM6060AXn75h0a06K6SrH8laCoU\n\tt3UUAHXi0CzN70uBLeWEuChatJ4mss2bYpLOmhuvZssxn3gvTVTUCWw0sfxBfL9y9XK8\n\tBv/g==", "X-Gm-Message-State": "ALoCoQlP7eIeAiDG/aH1h1EeMk0lsfsFZIkz4bp4qGBVewnJuYNEj0euxE9/N8MTOqQ49OrhEsA8", "X-Received": "by 10.66.62.137 with SMTP id y9mr8397231par.87.1429302251446;\n\tFri, 17 Apr 2015 13:24:11 -0700 (PDT)", "From": "Jonathan Toppins <jtoppins@cumulusnetworks.com>", "To": "jeffrey.t.kirsher@intel.com", "Date": "Fri, 17 Apr 2015 13:23:59 -0700", "Message-Id": "<1429302240-654-1-git-send-email-jtoppins@cumulusnetworks.com>", "X-Mailer": "git-send-email 1.7.10.4", "X-Mailman-Approved-At": "Fri, 17 Apr 2015 23:46:06 +0000", "Cc": "shm@cumulusnetworks.com, gospo@cumulusnetworks.com,\n\tAlan Liebthal <alanl@cumulusnetworks.com>,\n\tintel-wired-lan@lists.osuosl.org, netdev@vger.kernel.org", "Subject": "[Intel-wired-lan] [PATCH v1 net-next 1/2] igb: add PHY support for\n\tBroadcom 5461S", "X-BeenThere": "intel-wired-lan@lists.osuosl.org", "X-Mailman-Version": "2.1.18-1", "Precedence": "list", "List-Id": "Intel Wired Ethernet Linux Kernel Driver Development\n\t<intel-wired-lan.lists.osuosl.org>", "List-Unsubscribe": "<http://lists.osuosl.org/mailman/options/intel-wired-lan>, \n\t<mailto:intel-wired-lan-request@lists.osuosl.org?subject=unsubscribe>", "List-Archive": "<http://lists.osuosl.org/pipermail/intel-wired-lan/>", "List-Post": "<mailto:intel-wired-lan@lists.osuosl.org>", "List-Help": "<mailto:intel-wired-lan-request@lists.osuosl.org?subject=help>", "List-Subscribe": "<http://lists.osuosl.org/mailman/listinfo/intel-wired-lan>, \n\t<mailto:intel-wired-lan-request@lists.osuosl.org?subject=subscribe>", "MIME-Version": "1.0", "Content-Type": "text/plain; charset=\"us-ascii\"", "Content-Transfer-Encoding": "7bit", "Errors-To": "intel-wired-lan-bounces@lists.osuosl.org", "Sender": "\"Intel-wired-lan\" <intel-wired-lan-bounces@lists.osuosl.org>" }, "content": "From: Alan Liebthal <alanl@cumulusnetworks.com>\n\nThe Quanta LY8 Ethernet management port uses a Broadcom 5461S chip for\nthe PHY layer. This adds support for this PHY to the Intel igb driver.\n\nSigned-off-by: Alan Liebthal <alanl@cumulusnetworks.com>\nSigned-off-by: Jonathan Toppins <jtoppins@cumulusnetworks.com>\n---\n drivers/net/ethernet/intel/igb/e1000_82575.c | 20 +++++-\n drivers/net/ethernet/intel/igb/e1000_defines.h | 1 +\n drivers/net/ethernet/intel/igb/e1000_hw.h | 1 +\n drivers/net/ethernet/intel/igb/e1000_phy.c | 79 ++++++++++++++++++++++++\n drivers/net/ethernet/intel/igb/e1000_phy.h | 2 +\n 5 files changed, 102 insertions(+), 1 deletion(-)", "diff": "diff --git a/drivers/net/ethernet/intel/igb/e1000_82575.c b/drivers/net/ethernet/intel/igb/e1000_82575.c\nindex 2dcc808..e222804 100644\n--- a/drivers/net/ethernet/intel/igb/e1000_82575.c\n+++ b/drivers/net/ethernet/intel/igb/e1000_82575.c\n@@ -178,7 +178,7 @@ static s32 igb_init_phy_params_82575(struct e1000_hw *hw)\n \n \tctrl_ext = rd32(E1000_CTRL_EXT);\n \n-\tif (igb_sgmii_active_82575(hw)) {\n+\tif (igb_sgmii_active_82575(hw) && phy->type != e1000_phy_bcm5461s) {\n \t\tphy->ops.reset = igb_phy_hw_reset_sgmii_82575;\n \t\tctrl_ext |= E1000_CTRL_I2C_ENA;\n \t} else {\n@@ -289,6 +289,11 @@ static s32 igb_init_phy_params_82575(struct e1000_hw *hw)\n \tcase BCM54616_E_PHY_ID:\n \t\tphy->type = e1000_phy_bcm54616;\n \t\tbreak;\n+\tcase BCM5461S_E_PHY_ID:\n+\t\tphy->type = e1000_phy_bcm5461s;\n+\t\tphy->ops.get_phy_info = igb_get_phy_info_5461s;\n+\t\tphy->ops.force_speed_duplex = igb_phy_force_speed_duplex_82580;\n+\t\tbreak;\n \tdefault:\n \t\tret_val = -E1000_ERR_PHY;\n \t\tgoto out;\n@@ -841,6 +846,15 @@ static s32 igb_get_phy_id_82575(struct e1000_hw *hw)\n \t\t\tgoto out;\n \t\t}\n \t\tret_val = igb_get_phy_id(hw);\n+\t\tif (ret_val && hw->mac.type == e1000_i354) {\n+\t\t\t/* We do a special check for bcm5461s phy by setting\n+\t\t\t * the phy->addr to 5 and doing the phy check again.\n+\t\t\t * This call will succeed and retrieve a valid phy\n+\t\t\t * id if we have the bcm5461s phy.\n+\t\t\t */\n+\t\t\tphy->addr = 5;\n+\t\t\tret_val = igb_get_phy_id(hw);\n+\t\t}\n \t\tgoto out;\n \t}\n \n@@ -1221,6 +1235,9 @@ static s32 igb_get_cfg_done_82575(struct e1000_hw *hw)\n \t (hw->phy.type == e1000_phy_igp_3))\n \t\tigb_phy_init_script_igp3(hw);\n \n+\tif (hw->phy.type == e1000_phy_bcm5461s)\n+\t\tigb_phy_init_script_5461s(hw);\n+\n \treturn 0;\n }\n \n@@ -1597,6 +1614,7 @@ static s32 igb_setup_copper_link_82575(struct e1000_hw *hw)\n \t\tret_val = igb_copper_link_setup_82580(hw);\n \t\tbreak;\n \tcase e1000_phy_bcm54616:\n+\tcase e1000_phy_bcm5461s:\n \t\tbreak;\n \tdefault:\n \t\tret_val = -E1000_ERR_PHY;\ndiff --git a/drivers/net/ethernet/intel/igb/e1000_defines.h b/drivers/net/ethernet/intel/igb/e1000_defines.h\nindex 50d51e4..787224d 100644\n--- a/drivers/net/ethernet/intel/igb/e1000_defines.h\n+++ b/drivers/net/ethernet/intel/igb/e1000_defines.h\n@@ -861,6 +861,7 @@\n #define I210_I_PHY_ID 0x01410C00\n #define M88E1543_E_PHY_ID 0x01410EA0\n #define BCM54616_E_PHY_ID 0x03625D10\n+#define BCM5461S_E_PHY_ID 0x002060C0\n \n /* M88E1000 Specific Registers */\n #define M88E1000_PHY_SPEC_CTRL 0x10 /* PHY Specific Control Register */\ndiff --git a/drivers/net/ethernet/intel/igb/e1000_hw.h b/drivers/net/ethernet/intel/igb/e1000_hw.h\nindex d82c96b..408a3e5 100644\n--- a/drivers/net/ethernet/intel/igb/e1000_hw.h\n+++ b/drivers/net/ethernet/intel/igb/e1000_hw.h\n@@ -129,6 +129,7 @@ enum e1000_phy_type {\n \te1000_phy_82580,\n \te1000_phy_i210,\n \te1000_phy_bcm54616,\n+\te1000_phy_bcm5461s,\n };\n \n enum e1000_bus_type {\ndiff --git a/drivers/net/ethernet/intel/igb/e1000_phy.c b/drivers/net/ethernet/intel/igb/e1000_phy.c\nindex c1bb64d..0f5a55b 100644\n--- a/drivers/net/ethernet/intel/igb/e1000_phy.c\n+++ b/drivers/net/ethernet/intel/igb/e1000_phy.c\n@@ -148,6 +148,13 @@ s32 igb_read_phy_reg_mdic(struct e1000_hw *hw, u32 offset, u16 *data)\n \t * Control register. The MAC will take care of interfacing with the\n \t * PHY to retrieve the desired data.\n \t */\n+\tif (phy->type == e1000_phy_bcm5461s) {\n+\t\tmdic = rd32(E1000_MDICNFG);\n+\t\tmdic &= ~E1000_MDICNFG_PHY_MASK;\n+\t\tmdic |= (phy->addr << E1000_MDICNFG_PHY_SHIFT);\n+\t\twr32(E1000_MDICNFG, mdic);\n+\t}\n+\n \tmdic = ((offset << E1000_MDIC_REG_SHIFT) |\n \t\t(phy->addr << E1000_MDIC_PHY_SHIFT) |\n \t\t(E1000_MDIC_OP_READ));\n@@ -204,6 +211,13 @@ s32 igb_write_phy_reg_mdic(struct e1000_hw *hw, u32 offset, u16 data)\n \t * Control register. The MAC will take care of interfacing with the\n \t * PHY to retrieve the desired data.\n \t */\n+\tif (phy->type == e1000_phy_bcm5461s) {\n+\t\tmdic = rd32(E1000_MDICNFG);\n+\t\tmdic &= ~E1000_MDICNFG_PHY_MASK;\n+\t\tmdic |= (phy->addr << E1000_MDICNFG_PHY_SHIFT);\n+\t\twr32(E1000_MDICNFG, mdic);\n+\t}\n+\n \tmdic = (((u32)data) |\n \t\t(offset << E1000_MDIC_REG_SHIFT) |\n \t\t(phy->addr << E1000_MDIC_PHY_SHIFT) |\n@@ -2509,3 +2523,68 @@ static s32 igb_set_master_slave_mode(struct e1000_hw *hw)\n \n \treturn hw->phy.ops.write_reg(hw, PHY_1000T_CTRL, phy_data);\n }\n+\n+/**\n+ * igb_phy_init_script_5461s - Inits the BCM5461S PHY\n+ * @hw: pointer to the HW structure\n+ *\n+ * Initializes a Broadcom Gigabit PHY.\n+ **/\n+s32 igb_phy_init_script_5461s(struct e1000_hw *hw)\n+{\n+\tu16 mii_reg_led = 0;\n+\n+\t/* 1. Speed LED (Set the Link LED mode), Shadow 00010, 0x1C.bit2=1 */\n+\thw->phy.ops.write_reg(hw, 0x1C, 0x0800);\n+\thw->phy.ops.read_reg(hw, 0x1C, &mii_reg_led);\n+\tmii_reg_led |= 0x0004;\n+\thw->phy.ops.write_reg(hw, 0x1C, mii_reg_led | 0x8000);\n+\n+\t/* 2. Active LED (Set the Link LED mode), Shadow 01001, 0x1C.bit4=1,\n+\t * 0x10.bit5=0\n+\t */\n+\thw->phy.ops.write_reg(hw, 0x1C, 0x2400);\n+\thw->phy.ops.read_reg(hw, 0x1C, &mii_reg_led);\n+\tmii_reg_led |= 0x0010;\n+\thw->phy.ops.write_reg(hw, 0x1C, mii_reg_led | 0x8000);\n+\thw->phy.ops.read_reg(hw, 0x10, &mii_reg_led);\n+\tmii_reg_led &= 0xffdf;\n+\thw->phy.ops.write_reg(hw, 0x10, mii_reg_led);\n+\n+\treturn 0;\n+}\n+\n+/**\n+ * igb_get_phy_info_5461s - Retrieve 5461s PHY information\n+ * @hw: pointer to the HW structure\n+ *\n+ * Read PHY status to determine if link is up. If link is up, then\n+ * set/determine 10base-T extended distance and polarity correction. Read\n+ * PHY port status to determine MDI/MDIx and speed. Based on the speed,\n+ * determine on the cable length, local and remote receiver.\n+ **/\n+s32 igb_get_phy_info_5461s(struct e1000_hw *hw)\n+{\n+\tstruct e1000_phy_info *phy = &hw->phy;\n+\ts32 ret_val;\n+\tbool link;\n+\n+\tret_val = igb_phy_has_link(hw, 1, 0, &link);\n+\tif (ret_val)\n+\t\tgoto out;\n+\n+\tif (!link) {\n+\t\tret_val = -E1000_ERR_CONFIG;\n+\t\tgoto out;\n+\t}\n+\n+\tphy->polarity_correction = true;\n+\n+\tphy->is_mdix = true;\n+\tphy->cable_length = E1000_CABLE_LENGTH_UNDEFINED;\n+\tphy->local_rx = e1000_1000t_rx_status_ok;\n+\tphy->remote_rx = e1000_1000t_rx_status_ok;\n+\n+out:\n+\treturn ret_val;\n+}\ndiff --git a/drivers/net/ethernet/intel/igb/e1000_phy.h b/drivers/net/ethernet/intel/igb/e1000_phy.h\nindex 7af4ffa..fcdd84c 100644\n--- a/drivers/net/ethernet/intel/igb/e1000_phy.h\n+++ b/drivers/net/ethernet/intel/igb/e1000_phy.h\n@@ -61,6 +61,8 @@ s32 igb_phy_has_link(struct e1000_hw *hw, u32 iterations,\n void igb_power_up_phy_copper(struct e1000_hw *hw);\n void igb_power_down_phy_copper(struct e1000_hw *hw);\n s32 igb_phy_init_script_igp3(struct e1000_hw *hw);\n+s32 igb_phy_init_script_5461s(struct e1000_hw *hw);\n+s32 igb_get_phy_info_5461s(struct e1000_hw *hw);\n s32 igb_read_phy_reg_mdic(struct e1000_hw *hw, u32 offset, u16 *data);\n s32 igb_write_phy_reg_mdic(struct e1000_hw *hw, u32 offset, u16 data);\n s32 igb_read_phy_reg_i2c(struct e1000_hw *hw, u32 offset, u16 *data);\n", "prefixes": [ "v1", "net-next", "1/2" ] }