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GET /api/patches/453364/?format=api
{ "id": 453364, "url": "http://patchwork.ozlabs.org/api/patches/453364/?format=api", "web_url": "http://patchwork.ozlabs.org/project/uboot/patch/1427108821-6658-1-git-send-email-haikun.wang@freescale.com/", "project": { "id": 18, "url": "http://patchwork.ozlabs.org/api/projects/18/?format=api", "name": "U-Boot", "link_name": "uboot", "list_id": "u-boot.lists.denx.de", "list_email": "u-boot@lists.denx.de", "web_url": null, "scm_url": null, "webscm_url": null, "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<1427108821-6658-1-git-send-email-haikun.wang@freescale.com>", "list_archive_url": null, "date": "2015-03-23T11:07:01", "name": "[U-Boot] dm: ls1021a: Bring in ls1021a dts files from linux kernel", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": false, "hash": "c1f9dd4bbe9ec9c791344aa4510f03051fc45d00", "submitter": { "id": 65869, "url": "http://patchwork.ozlabs.org/api/people/65869/?format=api", "name": "Haikun.Wang@freescale.com", "email": "Haikun.Wang@freescale.com" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/uboot/patch/1427108821-6658-1-git-send-email-haikun.wang@freescale.com/mbox/", "series": [], "comments": "http://patchwork.ozlabs.org/api/patches/453364/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/453364/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<u-boot-bounces@lists.denx.de>", "X-Original-To": "incoming@patchwork.ozlabs.org", "Delivered-To": "patchwork-incoming@bilbo.ozlabs.org", "Received": [ "from theia.denx.de (theia.denx.de [85.214.87.163])\n\tby ozlabs.org (Postfix) with ESMTP id 793331400DD\n\tfor <incoming@patchwork.ozlabs.org>;\n\tMon, 23 Mar 2015 22:10:28 +1100 (AEDT)", "from localhost (localhost [127.0.0.1])\n\tby theia.denx.de (Postfix) with ESMTP id 102D9A7439;\n\tMon, 23 Mar 2015 12:10:24 +0100 (CET)", "from theia.denx.de ([127.0.0.1])\n\tby localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024)\n\twith ESMTP id Ohf10zJCr3b1; Mon, 23 Mar 2015 12:10:23 +0100 (CET)", "from theia.denx.de (localhost [127.0.0.1])\n\tby theia.denx.de (Postfix) with ESMTP id 838A0A7428;\n\tMon, 23 Mar 2015 12:10:23 +0100 (CET)", "from localhost (localhost [127.0.0.1])\n\tby theia.denx.de (Postfix) with ESMTP id E05A3A7428\n\tfor <u-boot@lists.denx.de>; Mon, 23 Mar 2015 12:10:19 +0100 (CET)", "from theia.denx.de ([127.0.0.1])\n\tby localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024)\n\twith ESMTP id ZjszuU_N1pSO for <u-boot@lists.denx.de>;\n\tMon, 23 Mar 2015 12:10:19 +0100 (CET)", "from na01-bl2-obe.outbound.protection.outlook.com\n\t(mail-bl2on0138.outbound.protection.outlook.com [65.55.169.138])\n\tby theia.denx.de (Postfix) with ESMTPS id 4742CA7422\n\tfor <u-boot@lists.denx.de>; Mon, 23 Mar 2015 12:10:16 +0100 (CET)", "from BY2PR03CA042.namprd03.prod.outlook.com (10.141.249.15) by\n\tBN1PR0301MB0612.namprd03.prod.outlook.com (25.160.170.27) with\n\tMicrosoft SMTP\n\tServer (TLS) id 15.1.118.21; Mon, 23 Mar 2015 11:10:13 +0000", "from BY2FFO11FD013.protection.gbl (2a01:111:f400:7c0c::178) by\n\tBY2PR03CA042.outlook.office365.com (2a01:111:e400:2c5d::15) with\n\tMicrosoft SMTP Server (TLS) id 15.1.118.21 via Frontend Transport;\n\tMon, 23 Mar 2015 11:10:12 +0000", "from tx30smr01.am.freescale.net (192.88.168.50) by\n\tBY2FFO11FD013.mail.protection.outlook.com (10.1.14.75) with Microsoft\n\tSMTP Server (TLS) id 15.1.125.13 via Frontend Transport;\n\tMon, 23 Mar 2015 11:10:12 +0000", "from titan.ap.freescale.net ([10.192.208.233])\n\tby tx30smr01.am.freescale.net (8.14.3/8.14.0) with ESMTP id\n\tt2NBA8Fr017016; Mon, 23 Mar 2015 04:10:10 -0700" ], "X-policyd-weight": "NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5\n\tNOT_IN_BL_NJABL=-1.5 (only DNSBL check requested)", "From": "Haikun Wang <haikun.wang@freescale.com>", "To": "<u-boot@lists.denx.de>", "Date": "Mon, 23 Mar 2015 19:07:01 +0800", "Message-ID": "<1427108821-6658-1-git-send-email-haikun.wang@freescale.com>", "X-Mailer": "git-send-email 2.1.0.27.g96db324", "X-EOPAttributedMessage": "0", "Received-SPF": "Fail (protection.outlook.com: domain of freescale.com does not\n\tdesignate 192.88.168.50 as permitted sender)\n\treceiver=protection.outlook.com; \n\tclient-ip=192.88.168.50; helo=tx30smr01.am.freescale.net;", "Authentication-Results": "spf=fail (sender IP is 192.88.168.50)\n\tsmtp.mailfrom=haikun.wang@freescale.com;\n\tfreescale.mail.onmicrosoft.com; \n\tdkim=none (message not signed) header.d=none;", "X-Forefront-Antispam-Report": "CIP:192.88.168.50; CTRY:US; IPV:NLI; EFV:NLI;\n\tBMV:1; SFV:NSPM;\n\tSFS:(10019020)(979002)(6009001)(339900001)(199003)(189002)(47776003)(77096005)(50226001)(110136001)(92566002)(46102003)(104016003)(50986999)(36756003)(50466002)(2351001)(77156002)(229853001)(62966003)(33646002)(105606002)(6806004)(85426001)(48376002)(19580395003)(86362001)(87936001)(19580405001)(106466001)(969003)(989001)(999001)(1009001)(1019001);\n\tDIR:OUT; SFP:1102; SCL:1; SRVR:BN1PR0301MB0612;\n\tH:tx30smr01.am.freescale.net; \n\tFPR:; SPF:Fail; MLV:ovrnspm; A:1; MX:1; PTR:InfoDomainNonexistent;\n\tLANG:en; ", "MIME-Version": "1.0", "X-Microsoft-Antispam": "UriScan:;BCL:0;PCL:0;RULEID:;SRVR:BN1PR0301MB0612;", "X-Microsoft-Antispam-PRVS": "<BN1PR0301MB06120F6C678E016E34FB2484F80D0@BN1PR0301MB0612.namprd03.prod.outlook.com>", "X-Exchange-Antispam-Report-Test": "UriScan:;", "X-Exchange-Antispam-Report-CFA-Test": "BCL:0; PCL:0;\n\tRULEID:(601004)(5005006)(5002010); SRVR:BN1PR0301MB0612; BCL:0; PCL:0;\n\tRULEID:; SRVR:BN1PR0301MB0612; ", "X-Forefront-PRVS": "05245CA661", "X-OriginatorOrg": "freescale.com", "X-MS-Exchange-CrossTenant-OriginalArrivalTime": "23 Mar 2015 11:10:12.5168\n\t(UTC)", "X-MS-Exchange-CrossTenant-Id": "710a03f5-10f6-4d38-9ff4-a80b81da590d", "X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp": "TenantId=710a03f5-10f6-4d38-9ff4-a80b81da590d;\n\tIp=[192.88.168.50]; \n\tHelo=[tx30smr01.am.freescale.net]", "X-MS-Exchange-CrossTenant-FromEntityHeader": "HybridOnPrem", "X-MS-Exchange-Transport-CrossTenantHeadersStamped": "BN1PR0301MB0612", "Subject": "[U-Boot] [PATCH] dm: ls1021a: Bring in ls1021a dts files from linux\n\tkernel", "X-BeenThere": "u-boot@lists.denx.de", "X-Mailman-Version": "2.1.15", "Precedence": "list", "List-Id": "U-Boot discussion <u-boot.lists.denx.de>", "List-Unsubscribe": "<http://lists.denx.de/mailman/options/u-boot>,\n\t<mailto:u-boot-request@lists.denx.de?subject=unsubscribe>", "List-Archive": "<http://lists.denx.de/pipermail/u-boot/>", "List-Post": "<mailto:u-boot@lists.denx.de>", "List-Help": "<mailto:u-boot-request@lists.denx.de?subject=help>", "List-Subscribe": "<http://lists.denx.de/mailman/listinfo/u-boot>,\n\t<mailto:u-boot-request@lists.denx.de?subject=subscribe>", "Content-Type": "text/plain; charset=\"us-ascii\"", "Content-Transfer-Encoding": "7bit", "Errors-To": "u-boot-bounces@lists.denx.de", "Sender": "\"U-Boot\" <u-boot-bounces@lists.denx.de>" }, "content": "From: haikun <haikun.wang@freescale.com>\n\nBring in device tree files for ls1021a from linux V3.19.\nIn order to use it in u-boot, make some changes:\n1. remove 'gic' node and interrupt related properties in every node.\n2. remove 'clockgen' node and clock related properties in every node.\n3. change address-cells and size-cells of root node and 'soc' node\n from 2 to 1.\n4. Add quadspi node.\n\nSigned-off-by: Haikun Wang <Haikun.Wang@freescale.com>\n---\n arch/arm/dts/Makefile | 3 +\n arch/arm/dts/ls1021a-qds.dts | 47 ++++++++\n arch/arm/dts/ls1021a-twr.dts | 31 +++++\n arch/arm/dts/ls1021a.dtsi | 265 +++++++++++++++++++++++++++++++++++++++++++\n 4 files changed, 346 insertions(+)\n create mode 100644 arch/arm/dts/ls1021a-qds.dts\n create mode 100644 arch/arm/dts/ls1021a-twr.dts\n create mode 100644 arch/arm/dts/ls1021a.dtsi", "diff": "diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile\nindex cbe5b86..67b821a 100644\n--- a/arch/arm/dts/Makefile\n+++ b/arch/arm/dts/Makefile\n@@ -54,6 +54,9 @@ dtb-$(CONFIG_SOCFPGA) +=\t\t\t\t\\\n \tsocfpga_cyclone5_socdk.dtb\t\t\t\\\n \tsocfpga_cyclone5_socrates.dtb\n \n+dtb-$(CONFIG_TARGET_LS1021AQDS) += ls1021a-qds.dtb\n+dtb-$(CONFIG_TARGET_LS1021ATWR) += ls1021a-twr.dtb\n+\n targets += $(dtb-y)\n \n DTC_FLAGS += -R 4 -p 0x1000\ndiff --git a/arch/arm/dts/ls1021a-qds.dts b/arch/arm/dts/ls1021a-qds.dts\nnew file mode 100644\nindex 0000000..9a06695\n--- /dev/null\n+++ b/arch/arm/dts/ls1021a-qds.dts\n@@ -0,0 +1,47 @@\n+/*\n+ * Freescale ls1021a QDS board device tree source\n+ *\n+ * Copyright 2013-2015 Freescale Semiconductor, Inc.\n+ *\n+ * SPDX-License-Identifier:\tGPL-2.0+\n+ */\n+\n+/dts-v1/;\n+#include \"ls1021a.dtsi\"\n+\n+/ {\n+\tmodel = \"LS1021A QDS Board\";\n+\n+\taliases {\n+\t\tspi0 = &qspi;\n+\t\tspi1 = &dspi0;\n+\t};\n+};\n+\n+&dspi0 {\n+\tbus-num = <0>;\n+\tstatus = \"okay\";\n+\n+\tdspiflash: at45db021d@0 {\n+\t\t#address-cells = <1>;\n+\t\t#size-cells = <1>;\n+\t\tcompatible = \"spi-flash\";\n+\t\tspi-max-frequency = <16000000>;\n+\t\tspi-cpol;\n+\t\tspi-cpha;\n+\t\treg = <0>;\n+\t};\n+};\n+\n+&qspi {\n+\tbus-num = <0>;\n+\tstatus = \"okay\";\n+\n+\tqflash0: s25fl128s@0 {\n+\t\t#address-cells = <1>;\n+\t\t#size-cells = <1>;\n+\t\tcompatible = \"spi-flash\";\n+\t\tspi-max-frequency = <20000000>;\n+\t\treg = <0>;\n+\t};\n+};\ndiff --git a/arch/arm/dts/ls1021a-twr.dts b/arch/arm/dts/ls1021a-twr.dts\nnew file mode 100644\nindex 0000000..db528f9\n--- /dev/null\n+++ b/arch/arm/dts/ls1021a-twr.dts\n@@ -0,0 +1,31 @@\n+/*\n+ * Freescale ls1021a TWR board device tree source\n+ *\n+ * Copyright 2013-2015 Freescale Semiconductor, Inc.\n+ *\n+ * SPDX-License-Identifier:\tGPL-2.0+\n+ */\n+\n+/dts-v1/;\n+#include \"ls1021a.dtsi\"\n+\n+/ {\n+\tmodel = \"LS1021A TWR Board\";\n+\n+\taliases {\n+\t\tspi0 = &qspi;\n+\t};\n+};\n+\n+&qspi {\n+\tbus-num = <0>;\n+\tstatus = \"okay\";\n+\n+\tqflash0: n25q128a13@0 {\n+\t\t#address-cells = <1>;\n+\t\t#size-cells = <1>;\n+\t\tcompatible = \"spi-flash\";\n+\t\tspi-max-frequency = <20000000>;\n+\t\treg = <0>;\n+\t};\n+};\ndiff --git a/arch/arm/dts/ls1021a.dtsi b/arch/arm/dts/ls1021a.dtsi\nnew file mode 100644\nindex 0000000..e160a5d\n--- /dev/null\n+++ b/arch/arm/dts/ls1021a.dtsi\n@@ -0,0 +1,265 @@\n+/*\n+ * Freescale ls1021a SOC common device tree source\n+ *\n+ * Copyright 2013-2015 Freescale Semiconductor, Inc.\n+ *\n+ * SPDX-License-Identifier:\tGPL-2.0+\n+ */\n+\n+#include \"skeleton.dtsi\"\n+\n+/ {\n+\tcompatible = \"fsl,ls1021a\";\n+\n+\taliases {\n+\t\tserial0 = &lpuart0;\n+\t\tserial1 = &lpuart1;\n+\t\tserial2 = &lpuart2;\n+\t\tserial3 = &lpuart3;\n+\t\tserial4 = &lpuart4;\n+\t\tserial5 = &lpuart5;\n+\t};\n+\n+\tcpus {\n+\t\t#address-cells = <1>;\n+\t\t#size-cells = <0>;\n+\n+\t\tcpu@f00 {\n+\t\t\tcompatible = \"arm,cortex-a7\";\n+\t\t\tdevice_type = \"cpu\";\n+\t\t\treg = <0xf00>;\n+\t\t};\n+\n+\t\tcpu@f01 {\n+\t\t\tcompatible = \"arm,cortex-a7\";\n+\t\t\tdevice_type = \"cpu\";\n+\t\t\treg = <0xf01>;\n+\t\t};\n+\t};\n+\n+\ttimer {\n+\t\tcompatible = \"arm,armv7-timer\";\n+\t};\n+\n+\tpmu {\n+\t\tcompatible = \"arm,cortex-a7-pmu\";\n+\t};\n+\n+\tsoc {\n+\t\tcompatible = \"simple-bus\";\n+\t\t#address-cells = <1>;\n+\t\t#size-cells = <1>;\n+\t\tdevice_type = \"soc\";\n+\t\tranges;\n+\n+\n+\t\tifc: ifc@1530000 {\n+\t\t\tcompatible = \"fsl,ifc\", \"simple-bus\";\n+\t\t\treg = <0x1530000 0x10000>;\n+\t\t};\n+\n+\t\tdcfg: dcfg@1ee0000 {\n+\t\t\tcompatible = \"fsl,ls1021a-dcfg\", \"syscon\";\n+\t\t\treg = <0x1ee0000 0x10000>;\n+\t\t\tbig-endian;\n+\t\t};\n+\n+\t\tesdhc: esdhc@1560000 {\n+\t\t\tcompatible = \"fsl,esdhc\";\n+\t\t\treg = <0x1560000 0x10000>;\n+\t\t\tclock-frequency = <0>;\n+\t\t\tvoltage-ranges = <1800 1800 3300 3300>;\n+\t\t\tsdhci,auto-cmd12;\n+\t\t\tbig-endian;\n+\t\t\tbus-width = <4>;\n+\t\t\tstatus = \"disabled\";\n+\t\t};\n+\n+\t\tscfg: scfg@1570000 {\n+\t\t\tcompatible = \"fsl,ls1021a-scfg\", \"syscon\";\n+\t\t\treg = <0x1570000 0x10000>;\n+\t\t\tbig-endian;\n+\t\t};\n+\n+\n+\t\tdspi0: dspi@2100000 {\n+\t\t\tcompatible = \"fsl,vf610-dspi\";\n+\t\t\t#address-cells = <1>;\n+\t\t\t#size-cells = <0>;\n+\t\t\treg = <0x2100000 0x10000>;\n+\t\t\tnum-cs = <6>;\n+\t\t\tbig-endian;\n+\t\t\tstatus = \"disabled\";\n+\t\t};\n+\n+\t\tdspi1: dspi@2110000 {\n+\t\t\tcompatible = \"fsl,vf610-dspi\";\n+\t\t\t#address-cells = <1>;\n+\t\t\t#size-cells = <0>;\n+\t\t\treg = <0x2110000 0x10000>;\n+\t\t\tnum-cs = <6>;\n+\t\t\tbig-endian;\n+\t\t\tstatus = \"disabled\";\n+\t\t};\n+\n+\t\tqspi: quadspi@1550000 {\n+\t\t\tcompatible = \"fsl,vf610-qspi\";\n+\t\t\t#address-cells = <1>;\n+\t\t\t#size-cells = <0>;\n+\t\t\treg = <0x0 0x1550000 0x0 0x10000>,\n+\t\t\t\t<0x0 0x40000000 0x0 0x4000000>;\n+\t\t\tnum-cs = <2>;\n+\t\t\tbig-endian;\n+\t\t\tstatus = \"disabled\";\n+\t\t};\n+\n+\t\ti2c0: i2c@2180000 {\n+\t\t\tcompatible = \"fsl,vf610-i2c\";\n+\t\t\t#address-cells = <1>;\n+\t\t\t#size-cells = <0>;\n+\t\t\treg = <0x2180000 0x10000>;\n+\t\t\tstatus = \"disabled\";\n+\t\t};\n+\n+\t\ti2c1: i2c@2190000 {\n+\t\t\tcompatible = \"fsl,vf610-i2c\";\n+\t\t\t#address-cells = <1>;\n+\t\t\t#size-cells = <0>;\n+\t\t\treg = <0x2190000 0x10000>;\n+\t\t\tstatus = \"disabled\";\n+\t\t};\n+\n+\t\ti2c2: i2c@21a0000 {\n+\t\t\tcompatible = \"fsl,vf610-i2c\";\n+\t\t\t#address-cells = <1>;\n+\t\t\t#size-cells = <0>;\n+\t\t\treg = <0x21a0000 0x10000>;\n+\t\t\tstatus = \"disabled\";\n+\t\t};\n+\n+\t\tuart0: serial@21c0500 {\n+\t\t\tcompatible = \"fsl,16550-FIFO64\", \"ns16550a\";\n+\t\t\treg = <0x21c0500 0x100>;\n+\t\t\tclock-frequency = <0>;\n+\t\t\tfifo-size = <15>;\n+\t\t\tstatus = \"disabled\";\n+\t\t};\n+\n+\t\tuart1: serial@21c0600 {\n+\t\t\tcompatible = \"fsl,16550-FIFO64\", \"ns16550a\";\n+\t\t\treg = <0x21c0600 0x100>;\n+\t\t\tclock-frequency = <0>;\n+\t\t\tfifo-size = <15>;\n+\t\t\tstatus = \"disabled\";\n+\t\t};\n+\n+\t\tuart2: serial@21d0500 {\n+\t\t\tcompatible = \"fsl,16550-FIFO64\", \"ns16550a\";\n+\t\t\treg = <0x21d0500 0x100>;\n+\t\t\tclock-frequency = <0>;\n+\t\t\tfifo-size = <15>;\n+\t\t\tstatus = \"disabled\";\n+\t\t};\n+\n+\t\tuart3: serial@21d0600 {\n+\t\t\tcompatible = \"fsl,16550-FIFO64\", \"ns16550a\";\n+\t\t\treg = <0x21d0600 0x100>;\n+\t\t\tclock-frequency = <0>;\n+\t\t\tfifo-size = <15>;\n+\t\t\tstatus = \"disabled\";\n+\t\t};\n+\n+\t\tlpuart0: serial@2950000 {\n+\t\t\tcompatible = \"fsl,ls1021a-lpuart\";\n+\t\t\treg = <0x2950000 0x1000>;\n+\t\t\tstatus = \"disabled\";\n+\t\t};\n+\n+\t\tlpuart1: serial@2960000 {\n+\t\t\tcompatible = \"fsl,ls1021a-lpuart\";\n+\t\t\treg = <0x2960000 0x1000>;\n+\t\t\tstatus = \"disabled\";\n+\t\t};\n+\n+\t\tlpuart2: serial@2970000 {\n+\t\t\tcompatible = \"fsl,ls1021a-lpuart\";\n+\t\t\treg = <0x2970000 0x1000>;\n+\t\t\tstatus = \"disabled\";\n+\t\t};\n+\n+\t\tlpuart3: serial@2980000 {\n+\t\t\tcompatible = \"fsl,ls1021a-lpuart\";\n+\t\t\treg = <0x2980000 0x1000>;\n+\t\t\tstatus = \"disabled\";\n+\t\t};\n+\n+\t\tlpuart4: serial@2990000 {\n+\t\t\tcompatible = \"fsl,ls1021a-lpuart\";\n+\t\t\treg = <0x2990000 0x1000>;\n+\t\t\tstatus = \"disabled\";\n+\t\t};\n+\n+\t\tlpuart5: serial@29a0000 {\n+\t\t\tcompatible = \"fsl,ls1021a-lpuart\";\n+\t\t\treg = <0x29a0000 0x1000>;\n+\t\t\tstatus = \"disabled\";\n+\t\t};\n+\n+\t\twdog0: watchdog@2ad0000 {\n+\t\t\tcompatible = \"fsl,imx21-wdt\";\n+\t\t\treg = <0x2ad0000 0x10000>;\n+\t\t\tbig-endian;\n+\t\t};\n+\n+\t\tsai1: sai@2b50000 {\n+\t\t\tcompatible = \"fsl,vf610-sai\";\n+\t\t\treg = <0x2b50000 0x10000>;\n+\t\t\tdma-names = \"tx\", \"rx\";\n+\t\t\tdmas = <&edma0 1 47>,\n+\t\t\t <&edma0 1 46>;\n+\t\t\tbig-endian;\n+\t\t\tstatus = \"disabled\";\n+\t\t};\n+\n+\t\tsai2: sai@2b60000 {\n+\t\t\tcompatible = \"fsl,vf610-sai\";\n+\t\t\treg = <0x2b60000 0x10000>;\n+\t\t\tdma-names = \"tx\", \"rx\";\n+\t\t\tdmas = <&edma0 1 45>,\n+\t\t\t <&edma0 1 44>;\n+\t\t\tbig-endian;\n+\t\t\tstatus = \"disabled\";\n+\t\t};\n+\n+\t\tedma0: edma@2c00000 {\n+\t\t\t#dma-cells = <2>;\n+\t\t\tcompatible = \"fsl,vf610-edma\";\n+\t\t\treg = <0x2c00000 0x10000>,\n+\t\t\t <0x2c10000 0x10000>,\n+\t\t\t <0x2c20000 0x10000>;\n+\t\t\tdma-channels = <32>;\n+\t\t\tbig-endian;\n+\t\t};\n+\n+\t\tmdio0: mdio@2d24000 {\n+\t\t\tcompatible = \"gianfar\";\n+\t\t\tdevice_type = \"mdio\";\n+\t\t\t#address-cells = <1>;\n+\t\t\t#size-cells = <0>;\n+\t\t\treg = <0x2d24000 0x4000>;\n+\t\t};\n+\n+\t\tusb@8600000 {\n+\t\t\tcompatible = \"fsl-usb2-dr-v2.5\", \"fsl-usb2-dr\";\n+\t\t\treg = <0x8600000 0x1000>;\n+\t\t\tdr_mode = \"host\";\n+\t\t\tphy_type = \"ulpi\";\n+\t\t};\n+\n+\t\tusb3@3100000 {\n+\t\t\tcompatible = \"snps,dwc3\";\n+\t\t\treg = <0x3100000 0x10000>;\n+\t\t\tdr_mode = \"host\";\n+\t\t};\n+\t};\n+};\n", "prefixes": [ "U-Boot" ] }