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GET /api/patches/431399/?format=api
{ "id": 431399, "url": "http://patchwork.ozlabs.org/api/patches/431399/?format=api", "web_url": "http://patchwork.ozlabs.org/project/uboot/patch/1421832560-30696-3-git-send-email-Minghuan.Lian@freescale.com/", "project": { "id": 18, "url": "http://patchwork.ozlabs.org/api/projects/18/?format=api", "name": "U-Boot", "link_name": "uboot", "list_id": "u-boot.lists.denx.de", "list_email": "u-boot@lists.denx.de", "web_url": null, "scm_url": null, "webscm_url": null, "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<1421832560-30696-3-git-send-email-Minghuan.Lian@freescale.com>", "list_archive_url": null, "date": "2015-01-21T09:29:19", "name": "[U-Boot,3/4] arm/ls1021a: add PCIe settings", "commit_ref": null, "pull_url": null, "state": "accepted", "archived": false, "hash": "912412c9f8a0c19d6d90ab71e4dc45e928edae62", "submitter": { "id": 16185, "url": "http://patchwork.ozlabs.org/api/people/16185/?format=api", "name": "Minghuan Lian", "email": "Minghuan.Lian@freescale.com" }, "delegate": { "id": 2666, "url": "http://patchwork.ozlabs.org/api/users/2666/?format=api", "username": "yorksun", "first_name": "York", "last_name": "Sun", "email": "yorksun@freescale.com" }, "mbox": "http://patchwork.ozlabs.org/project/uboot/patch/1421832560-30696-3-git-send-email-Minghuan.Lian@freescale.com/mbox/", "series": [], "comments": "http://patchwork.ozlabs.org/api/patches/431399/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/431399/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<u-boot-bounces@lists.denx.de>", "X-Original-To": "incoming@patchwork.ozlabs.org", "Delivered-To": "patchwork-incoming@bilbo.ozlabs.org", "Received": [ "from theia.denx.de (theia.denx.de [85.214.87.163])\n\tby ozlabs.org (Postfix) with ESMTP id 12BCA1401AF\n\tfor <incoming@patchwork.ozlabs.org>;\n\tWed, 21 Jan 2015 20:43:51 +1100 (AEDT)", "from localhost (localhost [127.0.0.1])\n\tby theia.denx.de (Postfix) with ESMTP id B73744B6A7;\n\tWed, 21 Jan 2015 10:43:50 +0100 (CET)", "from theia.denx.de ([127.0.0.1])\n\tby localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024)\n\twith ESMTP id QCg1f4-1TI9V; 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Wed, 21 Jan 2015 02:28:09 -0700" ], "X-policyd-weight": "NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5\n\tNOT_IN_BL_NJABL=-1.5 (only DNSBL check requested)", "From": "Minghuan Lian <Minghuan.Lian@freescale.com>", "To": "<u-boot@lists.denx.de>", "Date": "Wed, 21 Jan 2015 17:29:19 +0800", "Message-ID": "<1421832560-30696-3-git-send-email-Minghuan.Lian@freescale.com>", "X-Mailer": "git-send-email 1.9.1", "In-Reply-To": "<1421832560-30696-1-git-send-email-Minghuan.Lian@freescale.com>", "References": "<1421832560-30696-1-git-send-email-Minghuan.Lian@freescale.com>", "X-EOPAttributedMessage": "0", "Received-SPF": "Fail (protection.outlook.com: domain of freescale.com does not\n\tdesignate 192.88.168.50 as permitted sender)\n\treceiver=protection.outlook.com; \n\tclient-ip=192.88.168.50; helo=tx30smr01.am.freescale.net;", "Authentication-Results": "spf=fail (sender IP is 192.88.168.50)\n\tsmtp.mailfrom=Minghuan.Lian@freescale.com; ", "X-Forefront-Antispam-Report": "CIP:192.88.168.50; CTRY:US; IPV:NLI; EFV:NLI;\n\tSFV:NSPM;\n\tSFS:(10019020)(6009001)(339900001)(189002)(199003)(229853001)(46102003)(2351001)(50466002)(19580395003)(106466001)(48376002)(19580405001)(450100001)(64706001)(104016003)(92566002)(87936001)(36756003)(86362001)(76176999)(68736005)(50986999)(62966003)(50226001)(2950100001)(110136001)(85426001)(47776003)(77096005)(77156002)(97736003)(6806004)(105606002);\n\tDIR:OUT; SFP:1102; SCL:1; SRVR:BLUPR03MB150;\n\tH:tx30smr01.am.freescale.net; FPR:; SPF:Fail; MLV:sfv;\n\tPTR:InfoDomainNonexistent; MX:1; A:1; LANG:; ", "MIME-Version": "1.0", "X-DmarcAction-Test": "None", "X-Microsoft-Antispam": [ "UriScan:;", "BCL:0;PCL:0;RULEID:(3005004);SRVR:BLUPR03MB150;" ], "X-Exchange-Antispam-Report-Test": "UriScan:;", "X-Exchange-Antispam-Report-CFA-Test": [ "BCL:0; PCL:0; RULEID:(601004);\n\tSRVR:BLUPR03MB150; ", "BCL:0;PCL:0;RULEID:;SRVR:BLUPR03MB150;" ], "X-Forefront-PRVS": "04631F8F77", "X-OriginatorOrg": "freescale.com", "X-MS-Exchange-CrossTenant-OriginalArrivalTime": "21 Jan 2015 09:28:12.7810\n\t(UTC)", "X-MS-Exchange-CrossTenant-Id": "710a03f5-10f6-4d38-9ff4-a80b81da590d", "X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp": "TenantId=710a03f5-10f6-4d38-9ff4-a80b81da590d; \n\tIp=[192.88.168.50]", "X-MS-Exchange-CrossTenant-FromEntityHeader": "HybridOnPrem", "X-MS-Exchange-Transport-CrossTenantHeadersStamped": "BLUPR03MB150", "Cc": "Hu Mingkai-B21284 <B21284@freescale.com>,\n\tYusong Sun <yorksun@freescale.com>", "Subject": "[U-Boot] [PATCH 3/4] arm/ls1021a: add PCIe settings", "X-BeenThere": "u-boot@lists.denx.de", "X-Mailman-Version": "2.1.13", "Precedence": "list", "List-Id": "U-Boot discussion <u-boot.lists.denx.de>", "List-Unsubscribe": "<http://lists.denx.de/mailman/options/u-boot>,\n\t<mailto:u-boot-request@lists.denx.de?subject=unsubscribe>", "List-Archive": "<http://lists.denx.de/pipermail/u-boot>", "List-Post": "<mailto:u-boot@lists.denx.de>", "List-Help": "<mailto:u-boot-request@lists.denx.de?subject=help>", "List-Subscribe": "<http://lists.denx.de/mailman/listinfo/u-boot>,\n\t<mailto:u-boot-request@lists.denx.de?subject=subscribe>", "Content-Type": "text/plain; charset=\"us-ascii\"", "Content-Transfer-Encoding": "7bit", "Sender": "u-boot-bounces@lists.denx.de", "Errors-To": "u-boot-bounces@lists.denx.de" }, "content": "The patch enables and adds PCIe settings for boards LS1021AQDS\nand LS1021ATWR.\n\nSigned-off-by: Minghuan Lian <Minghuan.Lian@freescale.com>\n---\n include/configs/ls1021aqds.h | 24 ++++++++++++++++++++++++\n include/configs/ls1021atwr.h | 24 ++++++++++++++++++++++++\n 2 files changed, 48 insertions(+)", "diff": "diff --git a/include/configs/ls1021aqds.h b/include/configs/ls1021aqds.h\nindex 8dc04f2..0e6ae50 100644\n--- a/include/configs/ls1021aqds.h\n+++ b/include/configs/ls1021aqds.h\n@@ -479,6 +479,30 @@ unsigned long get_board_ddr_clk(void);\n #define CONFIG_PCIE_LAYERSCAPE\t/* Use common FSL Layerscape PCIe code */\n #define FSL_PCIE_COMPAT \"fsl,ls1021a-pcie\"\n \n+#define CONFIG_SYS_PCI_64BIT\n+\n+#define CONFIG_SYS_PCIE_CFG0_PHYS_OFF\t0x00000000\n+#define CONFIG_SYS_PCIE_CFG0_SIZE\t0x00001000\t/* 4k */\n+#define CONFIG_SYS_PCIE_CFG1_PHYS_OFF\t0x00001000\n+#define CONFIG_SYS_PCIE_CFG1_SIZE\t0x00001000\t/* 4k */\n+\n+#define CONFIG_SYS_PCIE_IO_BUS\t\t0x00000000\n+#define CONFIG_SYS_PCIE_IO_PHYS_OFF\t0x00010000\n+#define CONFIG_SYS_PCIE_IO_SIZE\t\t0x00010000\t/* 64k */\n+\n+#define CONFIG_SYS_PCIE_MEM_BUS\t\t0x08000000\n+#define CONFIG_SYS_PCIE_MEM_PHYS_OFF\t0x04000000\n+#define CONFIG_SYS_PCIE_MEM_SIZE\t0x08000000\t/* 128M */\n+\n+#ifdef CONFIG_PCI\n+#define CONFIG_NET_MULTI\n+#define CONFIG_PCI_PNP\n+#define CONFIG_E1000\n+#define CONFIG_PCI_SCAN_SHOW\n+#define CONFIG_CMD_PCI\n+#define CONFIG_CMD_NET\n+#endif\n+\n #define CONFIG_CMD_PING\n #define CONFIG_CMD_DHCP\n #define CONFIG_CMD_MII\ndiff --git a/include/configs/ls1021atwr.h b/include/configs/ls1021atwr.h\nindex 66954d0..748635c 100644\n--- a/include/configs/ls1021atwr.h\n+++ b/include/configs/ls1021atwr.h\n@@ -298,6 +298,30 @@\n #define CONFIG_PCIE_LAYERSCAPE\t/* Use common FSL Layerscape PCIe code */\n #define FSL_PCIE_COMPAT \"fsl,ls1021a-pcie\"\n \n+#define CONFIG_SYS_PCI_64BIT\n+\n+#define CONFIG_SYS_PCIE_CFG0_PHYS_OFF\t0x00000000\n+#define CONFIG_SYS_PCIE_CFG0_SIZE\t0x00001000\t/* 4k */\n+#define CONFIG_SYS_PCIE_CFG1_PHYS_OFF\t0x00001000\n+#define CONFIG_SYS_PCIE_CFG1_SIZE\t0x00001000\t/* 4k */\n+\n+#define CONFIG_SYS_PCIE_IO_BUS\t\t0x00000000\n+#define CONFIG_SYS_PCIE_IO_PHYS_OFF\t0x00010000\n+#define CONFIG_SYS_PCIE_IO_SIZE\t\t0x00010000\t/* 64k */\n+\n+#define CONFIG_SYS_PCIE_MEM_BUS\t\t0x08000000\n+#define CONFIG_SYS_PCIE_MEM_PHYS_OFF\t0x04000000\n+#define CONFIG_SYS_PCIE_MEM_SIZE\t0x08000000\t/* 128M */\n+\n+#ifdef CONFIG_PCI\n+#define CONFIG_NET_MULTI\n+#define CONFIG_PCI_PNP\n+#define CONFIG_E1000\n+#define CONFIG_PCI_SCAN_SHOW\n+#define CONFIG_CMD_PCI\n+#define CONFIG_CMD_NET\n+#endif\n+\n #define CONFIG_CMD_PING\n #define CONFIG_CMD_DHCP\n #define CONFIG_CMD_MII\n", "prefixes": [ "U-Boot", "3/4" ] }