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GET /api/patches/421805/?format=api
{ "id": 421805, "url": "http://patchwork.ozlabs.org/api/patches/421805/?format=api", "web_url": "http://patchwork.ozlabs.org/project/uboot/patch/1418712633-28544-1-git-send-email-Li.Xiubo@freescale.com/", "project": { "id": 18, "url": "http://patchwork.ozlabs.org/api/projects/18/?format=api", "name": "U-Boot", "link_name": "uboot", "list_id": "u-boot.lists.denx.de", "list_email": "u-boot@lists.denx.de", "web_url": null, "scm_url": null, "webscm_url": null, "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<1418712633-28544-1-git-send-email-Li.Xiubo@freescale.com>", "list_archive_url": null, "date": "2014-12-16T06:50:33", "name": "[U-Boot] ls102xa: dcu: Add platform support for DCU on LS1021AQDS board", "commit_ref": null, "pull_url": null, "state": "accepted", "archived": false, "hash": "75830923ebd9b892a6ab04684bf5d73e1eaa4da4", "submitter": { "id": 44085, "url": "http://patchwork.ozlabs.org/api/people/44085/?format=api", "name": "Xiubo Li", "email": "Li.Xiubo@freescale.com" }, "delegate": { "id": 2666, "url": "http://patchwork.ozlabs.org/api/users/2666/?format=api", "username": "yorksun", "first_name": "York", "last_name": "Sun", "email": "yorksun@freescale.com" }, "mbox": "http://patchwork.ozlabs.org/project/uboot/patch/1418712633-28544-1-git-send-email-Li.Xiubo@freescale.com/mbox/", "series": [], "comments": "http://patchwork.ozlabs.org/api/patches/421805/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/421805/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<u-boot-bounces@lists.denx.de>", "X-Original-To": "incoming@patchwork.ozlabs.org", "Delivered-To": "patchwork-incoming@bilbo.ozlabs.org", "Received": [ "from theia.denx.de (theia.denx.de [85.214.87.163])\n\tby ozlabs.org (Postfix) with ESMTP id 1B67F1400D2\n\tfor <incoming@patchwork.ozlabs.org>;\n\tTue, 16 Dec 2014 17:52:46 +1100 (AEDT)", "from localhost (localhost [127.0.0.1])\n\tby theia.denx.de (Postfix) with ESMTP id DA1034B967;\n\tTue, 16 Dec 2014 07:52:43 +0100 (CET)", "from theia.denx.de ([127.0.0.1])\n\tby localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024)\n\twith ESMTP id dvKoerBiYlap; Tue, 16 Dec 2014 07:52:43 +0100 (CET)", "from theia.denx.de (localhost [127.0.0.1])\n\tby theia.denx.de (Postfix) with ESMTP id 5629F4B88C;\n\tTue, 16 Dec 2014 07:52:43 +0100 (CET)", "from localhost (localhost [127.0.0.1])\n\tby theia.denx.de (Postfix) with ESMTP id 105214B88C\n\tfor <u-boot@lists.denx.de>; Tue, 16 Dec 2014 07:52:38 +0100 (CET)", "from theia.denx.de ([127.0.0.1])\n\tby localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024)\n\twith ESMTP id 6i7KSCpTBlNb for <u-boot@lists.denx.de>;\n\tTue, 16 Dec 2014 07:52:37 +0100 (CET)", "from na01-bn1-obe.outbound.protection.outlook.com\n\t(mail-bn1bon0110.outbound.protection.outlook.com [157.56.111.110])\n\tby theia.denx.de (Postfix) with ESMTPS id 5C2574B88B\n\tfor <u-boot@lists.denx.de>; Tue, 16 Dec 2014 07:52:34 +0100 (CET)", "from BN3PR0301CA0080.namprd03.prod.outlook.com (25.160.152.176) by\n\tBN3PR0301MB1281.namprd03.prod.outlook.com (25.161.210.145) with\n\tMicrosoft\n\tSMTP Server (TLS) id 15.1.36.23; Tue, 16 Dec 2014 06:52:25 +0000", "from BY2FFO11FD051.protection.gbl (2a01:111:f400:7c0c::106) by\n\tBN3PR0301CA0080.outlook.office365.com (2a01:111:e400:401e::48) with\n\tMicrosoft SMTP Server (TLS) id 15.1.31.17 via Frontend Transport;\n\tTue, 16 Dec 2014 06:52:25 +0000", "from tx30smr01.am.freescale.net (192.88.168.50) by\n\tBY2FFO11FD051.mail.protection.outlook.com (10.1.15.188) with\n\tMicrosoft SMTP Server (TLS) id 15.1.26.17 via Frontend Transport;\n\tTue, 16 Dec 2014 06:52:25 +0000", "from titan.ap.freescale.net ([10.192.208.233])\n\tby tx30smr01.am.freescale.net (8.14.3/8.14.0) with ESMTP id\n\tsBG6qK6X009071; Mon, 15 Dec 2014 23:52:21 -0700" ], "X-policyd-weight": "NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5\n\tNOT_IN_BL_NJABL=-1.5 (only DNSBL check requested)", "From": "Xiubo Li <Li.Xiubo@freescale.com>", "To": "<R58495@freescale.com>", "Date": "Tue, 16 Dec 2014 14:50:33 +0800", "Message-ID": "<1418712633-28544-1-git-send-email-Li.Xiubo@freescale.com>", "X-Mailer": "git-send-email 2.1.0.27.g96db324", "X-EOPAttributedMessage": "0", "Received-SPF": "Fail (protection.outlook.com: domain of freescale.com does not\n\tdesignate 192.88.168.50 as permitted sender)\n\treceiver=protection.outlook.com; \n\tclient-ip=192.88.168.50; helo=tx30smr01.am.freescale.net;", "Authentication-Results": "spf=fail (sender IP is 192.88.168.50)\n\tsmtp.mailfrom=Li.Xiubo@freescale.com; ", "X-Forefront-Antispam-Report": "CIP:192.88.168.50; CTRY:US; IPV:NLI; EFV:NLI;\n\tSFV:NSPM;\n\tSFS:(10019020)(6009001)(189002)(199003)(84676001)(87936001)(62966003)(85426001)(89996001)(77156002)(31966008)(36756003)(92566001)(4396001)(6806004)(19580405001)(46102003)(19580395003)(2371004)(50226001)(110136001)(50986999)(104016003)(97736003)(120916001)(50466002)(99396003)(64706001)(20776003)(47776003)(575784001)(48376002)(86362001)(2351001)(68736005)(229853001)(21056001)(106466001)(77096005)(105606002)(107046002);\n\tDIR:OUT; SFP:1102; SCL:1; SRVR:BN3PR0301MB1281;\n\tH:tx30smr01.am.freescale.net; FPR:; SPF:Fail; MLV:sfv;\n\tPTR:InfoDomainNonexistent; MX:1; A:1; LANG:en; ", "MIME-Version": "1.0", "X-Microsoft-Antispam": [ "UriScan:;", "BCL:0;PCL:0;RULEID:;SRVR:BN3PR0301MB1281;" ], "X-Exchange-Antispam-Report-Test": "UriScan:;", "X-Exchange-Antispam-Report-CFA-Test": [ "BCL:0; PCL:0; RULEID:(601004);\n\tSRVR:BN3PR0301MB1281; ", "BCL:0; PCL:0; RULEID:;\n\tSRVR:BN3PR0301MB1281; " ], "X-Forefront-PRVS": "04270EF89C", "X-OriginatorOrg": "freescale.com", "X-MS-Exchange-CrossTenant-OriginalArrivalTime": "16 Dec 2014 06:52:25.4246\n\t(UTC)", "X-MS-Exchange-CrossTenant-Id": "710a03f5-10f6-4d38-9ff4-a80b81da590d", "X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp": "TenantId=710a03f5-10f6-4d38-9ff4-a80b81da590d; \n\tIp=[192.88.168.50]", "X-MS-Exchange-CrossTenant-FromEntityHeader": "HybridOnPrem", "X-MS-Exchange-Transport-CrossTenantHeadersStamped": "BN3PR0301MB1281", "Cc": "Alison Wang <alison.wang@freescale.com>,\n\tXiubo Li <Li.Xiubo@freescale.com>, u-boot@lists.denx.de", "Subject": "[U-Boot] [PATCH] ls102xa: dcu: Add platform support for DCU on\n\tLS1021AQDS board", "X-BeenThere": "u-boot@lists.denx.de", "X-Mailman-Version": "2.1.13", "Precedence": "list", "List-Id": "U-Boot discussion <u-boot.lists.denx.de>", "List-Unsubscribe": "<http://lists.denx.de/mailman/options/u-boot>,\n\t<mailto:u-boot-request@lists.denx.de?subject=unsubscribe>", "List-Archive": "<http://lists.denx.de/pipermail/u-boot>", "List-Post": "<mailto:u-boot@lists.denx.de>", "List-Help": "<mailto:u-boot-request@lists.denx.de?subject=help>", "List-Subscribe": "<http://lists.denx.de/mailman/listinfo/u-boot>,\n\t<mailto:u-boot-request@lists.denx.de?subject=subscribe>", "Content-Type": "text/plain; charset=\"us-ascii\"", "Content-Transfer-Encoding": "7bit", "Sender": "u-boot-bounces@lists.denx.de", "Errors-To": "u-boot-bounces@lists.denx.de" }, "content": "This patch adds the CH7301 HDMI options and the common configuration\nfor DCU on LS1021AQDS board.\n\nSigned-off-by: Xiubo Li <Li.Xiubo@freescale.com>\nSigned-off-by: Alison Wang <alison.wang@freescale.com>\nCc: Jason Jin <Jason.Jin@freescale.com>\n---\n board/freescale/ls1021aqds/Makefile | 1 +\n board/freescale/ls1021aqds/dcu.c | 92 +++++++++++++++++++++++++++\n board/freescale/ls1021aqds/ls1021aqds.c | 4 ++\n board/freescale/ls1021aqds/ls1021aqds_qixis.h | 2 +\n include/configs/ls1021aqds.h | 20 ++++++\n 5 files changed, 119 insertions(+)\n create mode 100644 board/freescale/ls1021aqds/dcu.c", "diff": "diff --git a/board/freescale/ls1021aqds/Makefile b/board/freescale/ls1021aqds/Makefile\nindex 3b6903c..ab02344 100644\n--- a/board/freescale/ls1021aqds/Makefile\n+++ b/board/freescale/ls1021aqds/Makefile\n@@ -7,3 +7,4 @@\n obj-y += ls1021aqds.o\n obj-y += ddr.o\n obj-y += eth.o\n+obj-$(CONFIG_FSL_DCU_FB) += dcu.o\ndiff --git a/board/freescale/ls1021aqds/dcu.c b/board/freescale/ls1021aqds/dcu.c\nnew file mode 100644\nindex 0000000..90f5bc0\n--- /dev/null\n+++ b/board/freescale/ls1021aqds/dcu.c\n@@ -0,0 +1,92 @@\n+/*\n+ * Copyright 2014 Freescale Semiconductor, Inc.\n+ *\n+ * FSL DCU Framebuffer driver\n+ *\n+ * SPDX-License-Identifier:\tGPL-2.0+\n+ */\n+\n+#include <asm/io.h>\n+#include <common.h>\n+#include <fsl_dcu_fb.h>\n+#include <i2c.h>\n+#include \"div64.h\"\n+#include \"../common/diu_ch7301.h\"\n+#include \"ls1021aqds_qixis.h\"\n+\n+DECLARE_GLOBAL_DATA_PTR;\n+\n+static int select_i2c_ch_pca9547(u8 ch)\n+{\n+\tint ret;\n+\n+\tret = i2c_write(I2C_MUX_PCA_ADDR_PRI, 0, 1, &ch, 1);\n+\tif (ret) {\n+\t\tputs(\"PCA: failed to select proper channel\\n\");\n+\t\treturn ret;\n+\t}\n+\n+\treturn 0;\n+}\n+\n+unsigned int dcu_set_pixel_clock(unsigned int pixclock)\n+{\n+\tunsigned long long div;\n+\n+\tdiv = (unsigned long long)(gd->bus_clk / 1000);\n+\tdiv *= (unsigned long long)pixclock;\n+\tdo_div(div, 1000000000);\n+\n+\treturn div;\n+}\n+\n+int platform_dcu_init(unsigned int xres, unsigned int yres,\n+\t\t const char *port,\n+\t\t struct fb_videomode *dcu_fb_videomode)\n+{\n+\tconst char *name;\n+\tunsigned int pixel_format;\n+\tint ret;\n+\tu8 ch;\n+\n+\t/* Mux I2C3+I2C4 as HSYNC+VSYNC */\n+\tret = i2c_read(CONFIG_SYS_I2C_QIXIS_ADDR, QIXIS_DCU_BRDCFG5,\n+\t\t 1, &ch, 1);\n+\tif (ret) {\n+\t\tprintf(\"Error: failed to read I2C @%02x\\n\",\n+\t\t CONFIG_SYS_I2C_QIXIS_ADDR);\n+\t\treturn ret;\n+\t}\n+\tch &= 0x1F;\n+\tch |= 0xA0;\n+\tret = i2c_write(CONFIG_SYS_I2C_QIXIS_ADDR, QIXIS_DCU_BRDCFG5,\n+\t\t\t1, &ch, 1);\n+\tif (ret) {\n+\t\tprintf(\"Error: failed to write I2C @%02x\\n\",\n+\t\t CONFIG_SYS_I2C_QIXIS_ADDR);\n+\t\treturn ret;\n+\t}\n+\n+\tif (strncmp(port, \"hdmi\", 4) == 0) {\n+\t\tunsigned long pixval;\n+\n+\t\tname = \"HDMI\";\n+\n+\t\tpixval = 1000000000 / dcu_fb_videomode->pixclock;\n+\t\tpixval *= 1000;\n+\n+\t\ti2c_set_bus_num(CONFIG_SYS_I2C_DVI_BUS_NUM);\n+\t\tselect_i2c_ch_pca9547(I2C_MUX_CH_CH7301);\n+\t\tdiu_set_dvi_encoder(pixval);\n+\t\tselect_i2c_ch_pca9547(I2C_MUX_CH_DEFAULT);\n+\t} else {\n+\t\treturn 0;\n+\t}\n+\n+\tprintf(\"DCU: Switching to %s monitor @ %ux%u\\n\", name, xres, yres);\n+\n+\tpixel_format = 32;\n+\tfsl_dcu_init(xres, yres, pixel_format);\n+\n+\treturn 0;\n+}\ndiff --git a/board/freescale/ls1021aqds/ls1021aqds.c b/board/freescale/ls1021aqds/ls1021aqds.c\nindex 2bc029c..738b71e 100644\n--- a/board/freescale/ls1021aqds/ls1021aqds.c\n+++ b/board/freescale/ls1021aqds/ls1021aqds.c\n@@ -194,6 +194,10 @@ int board_early_init_f(void)\n \tout_be32(&scfg->qspi_cfg, SCFG_QSPI_CLKSEL);\n #endif\n \n+#ifdef CONFIG_FSL_DCU_FB\n+\tout_be32(&scfg->pixclkcr, SCFG_PIXCLKCR_PXCKEN);\n+#endif\n+\n \t/*\n \t * Enable snoop requests and DVM message requests for\n \t * Slave insterface S4 (A7 core cluster)\ndiff --git a/board/freescale/ls1021aqds/ls1021aqds_qixis.h b/board/freescale/ls1021aqds/ls1021aqds_qixis.h\nindex 09b3be2..8e482eb 100644\n--- a/board/freescale/ls1021aqds/ls1021aqds_qixis.h\n+++ b/board/freescale/ls1021aqds/ls1021aqds_qixis.h\n@@ -32,4 +32,6 @@\n \n #define QIXIS_SRDS1CLK_100\t\t0x0\n \n+#define QIXIS_DCU_BRDCFG5\t\t0x55\n+\n #endif\ndiff --git a/include/configs/ls1021aqds.h b/include/configs/ls1021aqds.h\nindex 5e2c0c3..2ea1134 100644\n--- a/include/configs/ls1021aqds.h\n+++ b/include/configs/ls1021aqds.h\n@@ -402,6 +402,7 @@ unsigned long get_board_ddr_clk(void);\n */\n #define I2C_MUX_PCA_ADDR_PRI\t\t0x77\n #define I2C_MUX_CH_DEFAULT\t\t0x8\n+#define I2C_MUX_CH_CH7301\t\t0xC\n \n /*\n * MMC\n@@ -468,6 +469,25 @@ unsigned long get_board_ddr_clk(void);\n #endif\n \n /*\n+ * Video\n+ */\n+#define CONFIG_FSL_DCU_FB\n+\n+#ifdef CONFIG_FSL_DCU_FB\n+#define CONFIG_VIDEO\n+#define CONFIG_CMD_BMP\n+#define CONFIG_CFB_CONSOLE\n+#define CONFIG_VGA_AS_SINGLE_DEVICE\n+#define CONFIG_VIDEO_LOGO\n+#define CONFIG_VIDEO_BMP_LOGO\n+\n+#define CONFIG_FSL_DIU_CH7301\n+#define CONFIG_SYS_I2C_DVI_BUS_NUM\t0\n+#define CONFIG_SYS_I2C_QIXIS_ADDR\t0x66\n+#define CONFIG_SYS_I2C_DVI_ADDR\t\t0x75\n+#endif\n+\n+/*\n * eTSEC\n */\n #define CONFIG_TSEC_ENET\n", "prefixes": [ "U-Boot" ] }