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GET /api/patches/417269/?format=api
{ "id": 417269, "url": "http://patchwork.ozlabs.org/api/patches/417269/?format=api", "web_url": "http://patchwork.ozlabs.org/project/uboot/patch/1417590049-500-9-git-send-email-b18965@freescale.com/", "project": { "id": 18, "url": "http://patchwork.ozlabs.org/api/projects/18/?format=api", "name": "U-Boot", "link_name": "uboot", "list_id": "u-boot.lists.denx.de", "list_email": "u-boot@lists.denx.de", "web_url": null, "scm_url": null, "webscm_url": null, "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<1417590049-500-9-git-send-email-b18965@freescale.com>", "list_archive_url": null, "date": "2014-12-03T07:00:48", "name": "[U-Boot,v4,8/9] arm: ls102xa: Add SD boot support for LS1021ATWR board", "commit_ref": null, "pull_url": null, "state": "accepted", "archived": false, "hash": "27b4733ccb0c00df3224e4d2f3e95b955e37069f", "submitter": { "id": 13010, "url": "http://patchwork.ozlabs.org/api/people/13010/?format=api", "name": "Alison Wang", "email": "b18965@freescale.com" }, "delegate": { "id": 2666, "url": "http://patchwork.ozlabs.org/api/users/2666/?format=api", "username": "yorksun", "first_name": "York", "last_name": "Sun", "email": "yorksun@freescale.com" }, "mbox": "http://patchwork.ozlabs.org/project/uboot/patch/1417590049-500-9-git-send-email-b18965@freescale.com/mbox/", "series": [], "comments": "http://patchwork.ozlabs.org/api/patches/417269/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/417269/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<u-boot-bounces@lists.denx.de>", "X-Original-To": "incoming@patchwork.ozlabs.org", "Delivered-To": "patchwork-incoming@bilbo.ozlabs.org", "Received": [ "from theia.denx.de (theia.denx.de [85.214.87.163])\n\tby ozlabs.org (Postfix) with ESMTP id AC9ED140082\n\tfor <incoming@patchwork.ozlabs.org>;\n\tWed, 3 Dec 2014 18:03:45 +1100 (AEDT)", "from localhost (localhost [127.0.0.1])\n\tby theia.denx.de (Postfix) with ESMTP id 348D24B8DA;\n\tWed, 3 Dec 2014 08:03:25 +0100 (CET)", "from theia.denx.de ([127.0.0.1])\n\tby localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024)\n\twith ESMTP id Aea4RVqRpvp7; Wed, 3 Dec 2014 08:03:24 +0100 (CET)", "from theia.denx.de (localhost [127.0.0.1])\n\tby theia.denx.de (Postfix) with ESMTP id BE6034B826;\n\tWed, 3 Dec 2014 08:03:13 +0100 (CET)", "from localhost (localhost [127.0.0.1])\n\tby theia.denx.de (Postfix) with ESMTP id 0A51C4B886\n\tfor <u-boot@lists.denx.de>; Wed, 3 Dec 2014 08:03:07 +0100 (CET)", "from theia.denx.de ([127.0.0.1])\n\tby localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024)\n\twith ESMTP id bbPKR-DtbLMO for <u-boot@lists.denx.de>;\n\tWed, 3 Dec 2014 08:03:06 +0100 (CET)", "from na01-by2-obe.outbound.protection.outlook.com\n\t(mail-by2on0144.outbound.protection.outlook.com [207.46.100.144])\n\tby theia.denx.de (Postfix) with ESMTPS id 328484B882\n\tfor <u-boot@lists.denx.de>; Wed, 3 Dec 2014 08:02:47 +0100 (CET)", "from BN3PR0301CA0035.namprd03.prod.outlook.com (25.160.180.173) by\n\tBY1PR0301MB1286.namprd03.prod.outlook.com (25.161.206.144) with\n\tMicrosoft\n\tSMTP Server (TLS) id 15.1.26.15; Wed, 3 Dec 2014 07:02:43 +0000", "from BN1AFFO11FD023.protection.gbl (2a01:111:f400:7c10::112) by\n\tBN3PR0301CA0035.outlook.office365.com (2a01:111:e400:4000::45) with\n\tMicrosoft SMTP Server (TLS) id 15.1.31.17 via Frontend Transport;\n\tWed, 3 Dec 2014 07:02:42 +0000", "from tx30smr01.am.freescale.net (192.88.168.50) by\n\tBN1AFFO11FD023.mail.protection.outlook.com (10.58.52.83) with\n\tMicrosoft SMTP Server (TLS) id 15.1.6.13 via Frontend Transport;\n\tWed, 3 Dec 2014 07:02:42 +0000", "from titan.ap.freescale.net ([10.192.208.233])\n\tby tx30smr01.am.freescale.net (8.14.3/8.14.0) with ESMTP id\n\tsB372JwZ005318; Wed, 3 Dec 2014 00:02:39 -0700" ], "X-policyd-weight": "NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5\n\tNOT_IN_BL_NJABL=-1.5 (only DNSBL check requested)", "From": "Alison Wang <b18965@freescale.com>", "To": "<yorksun@freescale.com>, <albert.u.boot@aribaud.net>,\n\t<jason.jin@freescale.com>, <u-boot@lists.denx.de>", "Date": "Wed, 3 Dec 2014 15:00:48 +0800", "Message-ID": "<1417590049-500-9-git-send-email-b18965@freescale.com>", "X-Mailer": "git-send-email 2.1.0.27.g96db324", "In-Reply-To": "<1417590049-500-1-git-send-email-b18965@freescale.com>", "References": "<1417590049-500-1-git-send-email-b18965@freescale.com>", "X-EOPAttributedMessage": "0", "X-Forefront-Antispam-Report": "CIP:192.88.168.50; CTRY:US; IPV:NLI; EFV:NLI;\n\tSFV:NSPM;\n\tSFS:(10019020)(6009001)(199003)(189002)(64706001)(99396003)(47776003)(120916001)(89996001)(50986999)(46102003)(20776003)(2201001)(92566001)(31966008)(92726001)(87936001)(76176999)(87286001)(88136002)(84676001)(6806004)(575784001)(93916002)(19580405001)(4396001)(50226001)(19580395003)(44976005)(102836001)(36756003)(95666004)(97736003)(105606002)(50466002)(104166001)(68736005)(48376002)(62966003)(21056001)(107886001)(229853001)(33646002)(104016003)(77156002)(107046002)(77096005)(106466001)(42262002);\n\tDIR:OUT; SFP:1102; SCL:1; SRVR:BY1PR0301MB1286;\n\tH:tx30smr01.am.freescale.net; FPR:; SPF:Fail; MLV:sfv;\n\tPTR:InfoDomainNonexistent; A:1; MX:1; LANG:en; ", "MIME-Version": "1.0", "X-Microsoft-Antispam": [ "UriScan:;", "BCL:0;PCL:0;RULEID:;SRVR:BY1PR0301MB1286;" ], "X-Exchange-Antispam-Report-Test": "UriScan:;", "X-Exchange-Antispam-Report-CFA-Test": [ "BCL:0; PCL:0; RULEID:;\n\tSRVR:BY1PR0301MB1286; ", "BCL:0; PCL:0; RULEID:;\n\tSRVR:BY1PR0301MB1286; " ], "X-Forefront-PRVS": "0414DF926F", "Received-SPF": "Fail (protection.outlook.com: domain of freescale.com does not\n\tdesignate 192.88.168.50 as permitted sender)\n\treceiver=protection.outlook.com; \n\tclient-ip=192.88.168.50; helo=tx30smr01.am.freescale.net;", "Authentication-Results": "spf=fail (sender IP is 192.88.168.50)\n\tsmtp.mailfrom=alison.wang@freescale.com; ", "X-OriginatorOrg": "freescale.com", "Subject": "[U-Boot] [PATCH v4 8/9] arm: ls102xa: Add SD boot support for\n\tLS1021ATWR board", "X-BeenThere": "u-boot@lists.denx.de", "X-Mailman-Version": "2.1.13", "Precedence": "list", "List-Id": "U-Boot discussion <u-boot.lists.denx.de>", "List-Unsubscribe": "<http://lists.denx.de/mailman/options/u-boot>,\n\t<mailto:u-boot-request@lists.denx.de?subject=unsubscribe>", "List-Archive": "<http://lists.denx.de/pipermail/u-boot>", "List-Post": "<mailto:u-boot@lists.denx.de>", "List-Help": "<mailto:u-boot-request@lists.denx.de?subject=help>", "List-Subscribe": "<http://lists.denx.de/mailman/listinfo/u-boot>,\n\t<mailto:u-boot-request@lists.denx.de?subject=subscribe>", "Content-Type": "text/plain; charset=\"us-ascii\"", "Content-Transfer-Encoding": "7bit", "Sender": "u-boot-bounces@lists.denx.de", "Errors-To": "u-boot-bounces@lists.denx.de" }, "content": "This patch adds SD boot support for LS1021ATWR board. SPL\nframework is used. PBL initialize the internal RAM and copy\nSPL to it, then SPL initialize DDR using SPD and copy u-boot\nfrom SD card to DDR, finally SPL transfer control to u-boot.\n\nSigned-off-by: Chen Lu <chen.lu@freescale.com>\nSigned-off-by: Alison Wang <alison.wang@freescale.com>\nSigned-off-by: Jason Jin <jason.jin@freescale.com>\n---\nChange log:\n v4: Enable IFC in SD boot.\n v3: Update MAINTAINERS file.\n Update PBI and RCW for SD boot.\n v2: Use generic u-boot-spl.lds.\n\n board/freescale/ls1021atwr/MAINTAINERS | 1 +\n board/freescale/ls1021atwr/ls1021atwr.c | 20 ++++++++++++\n board/freescale/ls1021atwr/ls102xa_pbi.cfg | 12 ++++++++\n board/freescale/ls1021atwr/ls102xa_rcw_sd.cfg | 14 +++++++++\n configs/ls1021atwr_sdcard_defconfig | 4 +++\n include/configs/ls1021atwr.h | 44 +++++++++++++++++++++++++++\n 6 files changed, 95 insertions(+)\n create mode 100644 board/freescale/ls1021atwr/ls102xa_pbi.cfg\n create mode 100644 board/freescale/ls1021atwr/ls102xa_rcw_sd.cfg\n create mode 100644 configs/ls1021atwr_sdcard_defconfig", "diff": "diff --git a/board/freescale/ls1021atwr/MAINTAINERS b/board/freescale/ls1021atwr/MAINTAINERS\nindex 8def0e5..2312e00 100644\n--- a/board/freescale/ls1021atwr/MAINTAINERS\n+++ b/board/freescale/ls1021atwr/MAINTAINERS\n@@ -5,3 +5,4 @@ F:\tboard/freescale/ls1021atwr/\n F:\tinclude/configs/ls1021atwr.h\n F:\tconfigs/ls1021atwr_nor_defconfig\n F:\tconfigs/ls1021atwr_nor_SECURE_BOOT_defconfig\n+F:\tconfigs/ls1021atwr_sdcard_defconfig\ndiff --git a/board/freescale/ls1021atwr/ls1021atwr.c b/board/freescale/ls1021atwr/ls1021atwr.c\nindex 3e8c37b..a157262 100644\n--- a/board/freescale/ls1021atwr/ls1021atwr.c\n+++ b/board/freescale/ls1021atwr/ls1021atwr.c\n@@ -17,6 +17,7 @@\n #include <fsl_mdio.h>\n #include <tsec.h>\n #include <fsl_sec.h>\n+#include <spl.h>\n #ifdef CONFIG_U_QE\n #include \"../../../drivers/qe/qe.h\"\n #endif\n@@ -270,6 +271,25 @@ int board_early_init_f(void)\n \treturn 0;\n }\n \n+#ifdef CONFIG_SPL_BUILD\n+void board_init_f(ulong dummy)\n+{\n+\t/* Set global data pointer */\n+\tgd = &gdata;\n+\n+\t/* Clear the BSS */\n+\tmemset(__bss_start, 0, __bss_end - __bss_start);\n+\n+\tget_clocks();\n+\n+\tpreloader_console_init();\n+\n+\tdram_init();\n+\n+\tboard_init_r(NULL, 0);\n+}\n+#endif\n+\n int board_init(void)\n {\n \tstruct ccsr_cci400 *cci = (struct ccsr_cci400 *)CONFIG_SYS_CCI400_ADDR;\ndiff --git a/board/freescale/ls1021atwr/ls102xa_pbi.cfg b/board/freescale/ls1021atwr/ls102xa_pbi.cfg\nnew file mode 100644\nindex 0000000..f1a1b63\n--- /dev/null\n+++ b/board/freescale/ls1021atwr/ls102xa_pbi.cfg\n@@ -0,0 +1,12 @@\n+#PBI commands\n+\n+09570200 ffffffff\n+09570158 00000300\n+8940007c 21f47300\n+\n+#Configure Scratch register\n+09ee0200 10000000\n+#Configure alternate space\n+09570158 00001000\n+#Flush PBL data\n+096100c0 000FFFFF\ndiff --git a/board/freescale/ls1021atwr/ls102xa_rcw_sd.cfg b/board/freescale/ls1021atwr/ls102xa_rcw_sd.cfg\nnew file mode 100644\nindex 0000000..9c3e3b0\n--- /dev/null\n+++ b/board/freescale/ls1021atwr/ls102xa_rcw_sd.cfg\n@@ -0,0 +1,14 @@\n+#PBL preamble and RCW header\n+aa55aa55 01ee0100\n+\n+#enable IFC, disable QSPI and DSPI\n+0608000a 00000000 00000000 00000000\n+20000000 00407900 60040a00 21046000\n+00000000 00000000 00000000 00038000\n+00080000 881b7340 00000000 00000000\n+\n+#disable IFC, enable QSPI and DSPI\n+#0608000a 00000000 00000000 00000000\n+#20000000 00407900 60040a00 21046000\n+#00000000 00000000 00000000 00038000\n+#20084800 881b7340 00000000 00000000\ndiff --git a/configs/ls1021atwr_sdcard_defconfig b/configs/ls1021atwr_sdcard_defconfig\nnew file mode 100644\nindex 0000000..0eb556a\n--- /dev/null\n+++ b/configs/ls1021atwr_sdcard_defconfig\n@@ -0,0 +1,4 @@\n+CONFIG_SPL=y\n+CONFIG_SYS_EXTRA_OPTIONS=\"RAMBOOT_PBL,SPL_FSL_PBL,SD_BOOT\"\n++S:CONFIG_ARM=y\n++S:CONFIG_TARGET_LS1021ATWR=y\ndiff --git a/include/configs/ls1021atwr.h b/include/configs/ls1021atwr.h\nindex 3eac7ee..945463f 100644\n--- a/include/configs/ls1021atwr.h\n+++ b/include/configs/ls1021atwr.h\n@@ -35,6 +35,38 @@\n #define CONFIG_SYS_CLK_FREQ\t\t100000000\n #define CONFIG_DDR_CLK_FREQ\t\t100000000\n \n+#ifdef CONFIG_RAMBOOT_PBL\n+#define CONFIG_SYS_FSL_PBL_PBI\tboard/freescale/ls1021atwr/ls102xa_pbi.cfg\n+#endif\n+\n+#ifdef CONFIG_SD_BOOT\n+#define CONFIG_SYS_FSL_PBL_RCW\tboard/freescale/ls1021atwr/ls102xa_rcw_sd.cfg\n+#define CONFIG_SPL_FRAMEWORK\n+#define CONFIG_SPL_LDSCRIPT\t\"arch/$(ARCH)/cpu/u-boot-spl.lds\"\n+#define CONFIG_SPL_LIBCOMMON_SUPPORT\n+#define CONFIG_SPL_LIBGENERIC_SUPPORT\n+#define CONFIG_SPL_ENV_SUPPORT\n+#define CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT\n+#define CONFIG_SPL_I2C_SUPPORT\n+#define CONFIG_SPL_WATCHDOG_SUPPORT\n+#define CONFIG_SPL_SERIAL_SUPPORT\n+#define CONFIG_SPL_MMC_SUPPORT\n+#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR\t\t0xe8\n+#define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS\t\t0x400\n+\n+#define CONFIG_SPL_TEXT_BASE\t\t0x10000000\n+#define CONFIG_SPL_MAX_SIZE\t\t0x1a000\n+#define CONFIG_SPL_STACK\t\t0x1001d000\n+#define CONFIG_SPL_PAD_TO\t\t0x1c000\n+#define CONFIG_SYS_TEXT_BASE\t\t0x82000000\n+\n+#define CONFIG_SYS_SPL_MALLOC_START\t0x80200000\n+#define CONFIG_SYS_SPL_MALLOC_SIZE\t0x100000\n+#define CONFIG_SPL_BSS_START_ADDR\t0x80100000\n+#define CONFIG_SPL_BSS_MAX_SIZE\t\t0x80000\n+#define CONFIG_SYS_MONITOR_LEN\t\t0x80000\n+#endif\n+\n #ifndef CONFIG_SYS_TEXT_BASE\n #define CONFIG_SYS_TEXT_BASE\t\t0x67f80000\n #endif\n@@ -243,6 +275,7 @@\n \n #define CONFIG_CMDLINE_TAG\n #define CONFIG_CMDLINE_EDITING\n+\n #define CONFIG_CMD_IMLS\n \n #define CONFIG_HWCONFIG\n@@ -288,7 +321,11 @@\n #define CONFIG_SYS_INIT_SP_ADDR \\\n \t(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)\n \n+#ifdef CONFIG_SPL_BUILD\n+#define CONFIG_SYS_MONITOR_BASE CONFIG_SPL_TEXT_BASE\n+#else\n #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /* start of monitor */\n+#endif\n \n #define CONFIG_SYS_QE_FW_ADDR 0x67f40000\n \n@@ -297,10 +334,17 @@\n */\n #define CONFIG_ENV_OVERWRITE\n \n+#if defined(CONFIG_SD_BOOT)\n+#define CONFIG_ENV_OFFSET\t\t0x100000\n+#define CONFIG_ENV_IS_IN_MMC\n+#define CONFIG_SYS_MMC_ENV_DEV\t\t0\n+#define CONFIG_ENV_SIZE\t\t\t0x20000\n+#else\n #define CONFIG_ENV_IS_IN_FLASH\n #define CONFIG_ENV_ADDR\t\t(CONFIG_SYS_MONITOR_BASE - CONFIG_ENV_SECT_SIZE)\n #define CONFIG_ENV_SIZE\t\t\t0x20000\n #define CONFIG_ENV_SECT_SIZE\t\t0x20000 /* 128K (one sector) */\n+#endif\n \n #define CONFIG_OF_LIBFDT\n #define CONFIG_OF_BOARD_SETUP\n", "prefixes": [ "U-Boot", "v4", "8/9" ] }