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GET /api/patches/412987/?format=api
{ "id": 412987, "url": "http://patchwork.ozlabs.org/api/patches/412987/?format=api", "web_url": "http://patchwork.ozlabs.org/project/uboot/patch/1416562859-37857-4-git-send-email-Li.Xiubo@freescale.com/", "project": { "id": 18, "url": "http://patchwork.ozlabs.org/api/projects/18/?format=api", "name": "U-Boot", "link_name": "uboot", "list_id": "u-boot.lists.denx.de", "list_email": "u-boot@lists.denx.de", "web_url": null, "scm_url": null, "webscm_url": null, "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<1416562859-37857-4-git-send-email-Li.Xiubo@freescale.com>", "list_archive_url": null, "date": "2014-11-21T09:40:56", "name": "[U-Boot,PATCHv4,3/6] ls1021a: adding a secondary core boot address and kick functions", "commit_ref": null, "pull_url": null, "state": "accepted", "archived": false, "hash": "28d315ad0dda95ba1f0d0e6efcf1ac105e34f1fc", "submitter": { "id": 44085, "url": "http://patchwork.ozlabs.org/api/people/44085/?format=api", "name": "Xiubo Li", "email": "Li.Xiubo@freescale.com" }, "delegate": { "id": 2666, "url": "http://patchwork.ozlabs.org/api/users/2666/?format=api", "username": "yorksun", "first_name": "York", "last_name": "Sun", "email": "yorksun@freescale.com" }, "mbox": "http://patchwork.ozlabs.org/project/uboot/patch/1416562859-37857-4-git-send-email-Li.Xiubo@freescale.com/mbox/", "series": [], "comments": "http://patchwork.ozlabs.org/api/patches/412987/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/412987/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<u-boot-bounces@lists.denx.de>", "X-Original-To": "incoming@patchwork.ozlabs.org", "Delivered-To": "patchwork-incoming@bilbo.ozlabs.org", "Received": [ "from theia.denx.de (theia.denx.de [85.214.87.163])\n\tby ozlabs.org (Postfix) with ESMTP id C1588140186\n\tfor <incoming@patchwork.ozlabs.org>;\n\tFri, 21 Nov 2014 20:45:40 +1100 (AEDT)", "from localhost (localhost [127.0.0.1])\n\tby theia.denx.de (Postfix) with ESMTP id 8C3B34B8ED;\n\tFri, 21 Nov 2014 10:45:34 +0100 (CET)", "from theia.denx.de ([127.0.0.1])\n\tby localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024)\n\twith ESMTP id 8EdYnfVDMDC6; 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Fri, 21 Nov 2014 02:42:30 -0700" ], "X-policyd-weight": "NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5\n\tNOT_IN_BL_NJABL=-1.5 (only DNSBL check requested)", "From": "Xiubo Li <Li.Xiubo@freescale.com>", "To": "<albert.u.boot@aribaud.net>", "Date": "Fri, 21 Nov 2014 17:40:56 +0800", "Message-ID": "<1416562859-37857-4-git-send-email-Li.Xiubo@freescale.com>", "X-Mailer": "git-send-email 2.1.0.27.g96db324", "In-Reply-To": "<1416562859-37857-1-git-send-email-Li.Xiubo@freescale.com>", "References": "<1416562859-37857-1-git-send-email-Li.Xiubo@freescale.com>", "X-EOPAttributedMessage": "0", "X-Forefront-Antispam-Report": "CIP:192.88.168.50; CTRY:US; IPV:NLI; EFV:NLI;\n\tSFV:NSPM;\n\tSFS:(10019020)(6009001)(199003)(189002)(92726001)(93916002)(19580395003)(19580405001)(95666004)(6806004)(99396003)(104166001)(47776003)(21056001)(68736004)(46102003)(86362001)(92566001)(50226001)(50986999)(62966003)(77156002)(44976005)(110136001)(76176999)(120916001)(106466001)(84676001)(48376002)(89996001)(36756003)(88136002)(31966008)(64706001)(87286001)(229853001)(104016003)(20776003)(97736003)(4396001)(50466002)(105606002)(2351001)(87936001)(107046002)(102836001);\n\tDIR:OUT; SFP:1102; SCL:1; SRVR:DM2PR0301MB0622;\n\tH:tx30smr01.am.freescale.net; FPR:; SPF:Fail; MLV:sfv;\n\tPTR:InfoDomainNonexistent; A:1; MX:1; LANG:en; ", "MIME-Version": "1.0", "X-Microsoft-Antispam": [ "UriScan:;", "BCL:0;PCL:0;RULEID:;SRVR:DM2PR0301MB0622;" ], "X-Exchange-Antispam-Report-Test": "UriScan:;", "X-Exchange-Antispam-Report-CFA-Test": [ "BCL:0; PCL:0; RULEID:;\n\tSRVR:DM2PR0301MB0622; ", "BCL:0; PCL:0; RULEID:;\n\tSRVR:DM2PR0301MB0622; " ], "X-Forefront-PRVS": "0402872DA1", "Received-SPF": "Fail (protection.outlook.com: domain of freescale.com does not\n\tdesignate 192.88.168.50 as permitted sender)\n\treceiver=protection.outlook.com; \n\tclient-ip=192.88.168.50; helo=tx30smr01.am.freescale.net;", "Authentication-Results": "spf=fail (sender IP is 192.88.168.50)\n\tsmtp.mailfrom=Li.Xiubo@freescale.com; ", "X-OriginatorOrg": "freescale.com", "Cc": "R64188@freescale.com, u-boot@lists.denx.de,\n\tXiubo Li <Li.Xiubo@freescale.com>", "Subject": "[U-Boot] [PATCHv4 3/6] ls1021a: adding a secondary core boot\n\taddress and kick functions", "X-BeenThere": "u-boot@lists.denx.de", "X-Mailman-Version": "2.1.13", "Precedence": "list", "List-Id": "U-Boot discussion <u-boot.lists.denx.de>", "List-Unsubscribe": "<http://lists.denx.de/mailman/options/u-boot>,\n\t<mailto:u-boot-request@lists.denx.de?subject=unsubscribe>", "List-Archive": "<http://lists.denx.de/pipermail/u-boot>", "List-Post": "<mailto:u-boot@lists.denx.de>", "List-Help": "<mailto:u-boot-request@lists.denx.de?subject=help>", "List-Subscribe": "<http://lists.denx.de/mailman/listinfo/u-boot>,\n\t<mailto:u-boot-request@lists.denx.de?subject=subscribe>", "Content-Type": "text/plain; charset=\"us-ascii\"", "Content-Transfer-Encoding": "7bit", "Sender": "u-boot-bounces@lists.denx.de", "Errors-To": "u-boot-bounces@lists.denx.de" }, "content": "Define the board specific smp_set_cpu_boot_addr() function to set\nthe start address for secondary cores in the LS1021A specific manner.\n\nDefine the board specific smp_kick_all_cpus() functioin to boot a\nsecondary core. Here the BRR contains control bits for enabling boot\nfor each core. On exiting HRESET or PORESET, the RCW BOOT_HO field\noptionally allows for logical core 0 to be released for booting or to\nremain in boot holdoff. All other cores remain in boot holdoff until\ntheir corresponding bit is set.\n\nSigned-off-by: Xiubo Li <Li.Xiubo@freescale.com>\nAcked-by: York Sun <yorksun@freescale.com>\n---\n arch/arm/cpu/armv7/ls102xa/cpu.c | 18 ++++++++++++++++++\n 1 file changed, 18 insertions(+)", "diff": "diff --git a/arch/arm/cpu/armv7/ls102xa/cpu.c b/arch/arm/cpu/armv7/ls102xa/cpu.c\nindex b7dde45..32b09e0 100644\n--- a/arch/arm/cpu/armv7/ls102xa/cpu.c\n+++ b/arch/arm/cpu/armv7/ls102xa/cpu.c\n@@ -101,3 +101,21 @@ int cpu_eth_init(bd_t *bis)\n \n \treturn 0;\n }\n+\n+#if defined(CONFIG_ARMV7_NONSEC) || defined(CONFIG_ARMV7_VIRT)\n+/* Set the address at which the secondary core starts from.*/\n+void smp_set_core_boot_addr(unsigned long addr, int corenr)\n+{\n+\tstruct ccsr_gur __iomem *gur = (void *)(CONFIG_SYS_FSL_GUTS_ADDR);\n+\n+\tout_be32(&gur->scratchrw[0], addr);\n+}\n+\n+/* Release the secondary core from holdoff state and kick it */\n+void smp_kick_all_cpus(void)\n+{\n+\tstruct ccsr_gur __iomem *gur = (void *)(CONFIG_SYS_FSL_GUTS_ADDR);\n+\n+\tout_be32(&gur->brrl, 0x2);\n+}\n+#endif\n", "prefixes": [ "U-Boot", "PATCHv4", "3/6" ] }