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GET /api/patches/407288/?format=api
HTTP 200 OK
Allow: GET, PUT, PATCH, HEAD, OPTIONS
Content-Type: application/json
Vary: Accept

{
    "id": 407288,
    "url": "http://patchwork.ozlabs.org/api/patches/407288/?format=api",
    "web_url": "http://patchwork.ozlabs.org/project/uboot/patch/1415242319-19815-1-git-send-email-b18965@freescale.com/",
    "project": {
        "id": 18,
        "url": "http://patchwork.ozlabs.org/api/projects/18/?format=api",
        "name": "U-Boot",
        "link_name": "uboot",
        "list_id": "u-boot.lists.denx.de",
        "list_email": "u-boot@lists.denx.de",
        "web_url": null,
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        "list_archive_url": "",
        "list_archive_url_format": "",
        "commit_url_format": ""
    },
    "msgid": "<1415242319-19815-1-git-send-email-b18965@freescale.com>",
    "list_archive_url": null,
    "date": "2014-11-06T02:51:59",
    "name": "[U-Boot] ls1021aqds: set the default I2C channel before DDR init",
    "commit_ref": null,
    "pull_url": null,
    "state": "accepted",
    "archived": false,
    "hash": "dbe61df8321eb151884885f3947af1e4246e2b6e",
    "submitter": {
        "id": 13010,
        "url": "http://patchwork.ozlabs.org/api/people/13010/?format=api",
        "name": "Alison Wang",
        "email": "b18965@freescale.com"
    },
    "delegate": {
        "id": 2666,
        "url": "http://patchwork.ozlabs.org/api/users/2666/?format=api",
        "username": "yorksun",
        "first_name": "York",
        "last_name": "Sun",
        "email": "yorksun@freescale.com"
    },
    "mbox": "http://patchwork.ozlabs.org/project/uboot/patch/1415242319-19815-1-git-send-email-b18965@freescale.com/mbox/",
    "series": [],
    "comments": "http://patchwork.ozlabs.org/api/patches/407288/comments/",
    "check": "pending",
    "checks": "http://patchwork.ozlabs.org/api/patches/407288/checks/",
    "tags": {},
    "related": [],
    "headers": {
        "Return-Path": "<u-boot-bounces@lists.denx.de>",
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            "from localhost (localhost [127.0.0.1])\n\tby theia.denx.de (Postfix) with ESMTP id 5712B4BEB0;\n\tThu,  6 Nov 2014 03:53:13 +0100 (CET)",
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            "from tx30smr01.am.freescale.net (192.88.168.50) by\n\tBY2FFO11FD038.mail.protection.outlook.com (10.1.14.223) with\n\tMicrosoft SMTP Server (TLS) id 15.1.6.13 via Frontend Transport;\n\tThu, 6 Nov 2014 02:52:57 +0000",
            "from titan.ap.freescale.net ([10.192.208.233])\n\tby tx30smr01.am.freescale.net (8.14.3/8.14.0) with ESMTP id\n\tsA62qrlC015140; Wed, 5 Nov 2014 19:52:54 -0700"
        ],
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        "From": "Alison Wang <b18965@freescale.com>",
        "To": "<yorksun@freescale.com>, <u-boot@lists.denx.de>",
        "Date": "Thu, 6 Nov 2014 10:51:59 +0800",
        "Message-ID": "<1415242319-19815-1-git-send-email-b18965@freescale.com>",
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        "Authentication-Results": "spf=fail (sender IP is 192.88.168.50)\n\tsmtp.mailfrom=alison.wang@freescale.com; ",
        "X-OriginatorOrg": "freescale.com",
        "Cc": "Chenhui Zhao <chenhui.zhao@freescale.com>",
        "Subject": "[U-Boot] [PATCH] ls1021aqds: set the default I2C channel before DDR\n\tinit",
        "X-BeenThere": "u-boot@lists.denx.de",
        "X-Mailman-Version": "2.1.13",
        "Precedence": "list",
        "List-Id": "U-Boot discussion <u-boot.lists.denx.de>",
        "List-Unsubscribe": "<http://lists.denx.de/mailman/options/u-boot>,\n\t<mailto:u-boot-request@lists.denx.de?subject=unsubscribe>",
        "List-Archive": "<http://lists.denx.de/pipermail/u-boot>",
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        "List-Help": "<mailto:u-boot-request@lists.denx.de?subject=help>",
        "List-Subscribe": "<http://lists.denx.de/mailman/listinfo/u-boot>,\n\t<mailto:u-boot-request@lists.denx.de?subject=subscribe>",
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    "content": "From: Chenhui Zhao <chenhui.zhao@freescale.com>\n\nWhen resuming from deep sleep, the I2C channel may not be\nin the default channel. So, switch to the default channel\nbefore accessing DDR SPD.\n\nSigned-off-by: Chenhui Zhao <chenhui.zhao@freescale.com>\n---\n board/freescale/ls1021aqds/ls1021aqds.c | 32 +++++++++++++++++++-------------\n 1 file changed, 19 insertions(+), 13 deletions(-)",
    "diff": "diff --git a/board/freescale/ls1021aqds/ls1021aqds.c b/board/freescale/ls1021aqds/ls1021aqds.c\nindex 485f412..7edc828 100644\n--- a/board/freescale/ls1021aqds/ls1021aqds.c\n+++ b/board/freescale/ls1021aqds/ls1021aqds.c\n@@ -137,8 +137,27 @@ unsigned long get_board_ddr_clk(void)\n \treturn 66666666;\n }\n \n+int select_i2c_ch_pca9547(u8 ch)\n+{\n+\tint ret;\n+\n+\tret = i2c_write(I2C_MUX_PCA_ADDR_PRI, 0, 1, &ch, 1);\n+\tif (ret) {\n+\t\tputs(\"PCA: failed to select proper channel\\n\");\n+\t\treturn ret;\n+\t}\n+\n+\treturn 0;\n+}\n+\n int dram_init(void)\n {\n+\t/*\n+\t * When resuming from deep sleep, the I2C channel may not be\n+\t * in the default channel. So, switch to the default channel\n+\t * before accessing DDR SPD.\n+\t */\n+\tselect_i2c_ch_pca9547(I2C_MUX_CH_DEFAULT);\n \tgd->ram_size = initdram(0);\n \n \treturn 0;\n@@ -157,19 +176,6 @@ int board_mmc_init(bd_t *bis)\n }\n #endif\n \n-int select_i2c_ch_pca9547(u8 ch)\n-{\n-\tint ret;\n-\n-\tret = i2c_write(I2C_MUX_PCA_ADDR_PRI, 0, 1, &ch, 1);\n-\tif (ret) {\n-\t\tputs(\"PCA: failed to select proper channel\\n\");\n-\t\treturn ret;\n-\t}\n-\n-\treturn 0;\n-}\n-\n int board_early_init_f(void)\n {\n \tstruct ccsr_scfg *scfg = (struct ccsr_scfg *)CONFIG_SYS_FSL_SCFG_ADDR;\n",
    "prefixes": [
        "U-Boot"
    ]
}