Patch Detail
get:
Show a patch.
patch:
Update a patch.
put:
Update a patch.
GET /api/patches/393683/?format=api
{ "id": 393683, "url": "http://patchwork.ozlabs.org/api/patches/393683/?format=api", "web_url": "http://patchwork.ozlabs.org/project/linux-imx/patch/1411730703-25836-2-git-send-email-chenhui.zhao@freescale.com/", "project": { "id": 19, "url": "http://patchwork.ozlabs.org/api/projects/19/?format=api", "name": "Linux IMX development", "link_name": "linux-imx", "list_id": "linux-imx-kernel.lists.patchwork.ozlabs.org", "list_email": "linux-imx-kernel@lists.patchwork.ozlabs.org", "web_url": null, "scm_url": null, "webscm_url": null, "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<1411730703-25836-2-git-send-email-chenhui.zhao@freescale.com>", "list_archive_url": null, "date": "2014-09-26T11:25:01", "name": "[1/3] arm: ls1: add CPU hotplug platform support", "commit_ref": null, "pull_url": null, "state": "new", "archived": false, "hash": "a50eaf06d327d4aff008df500db881c3f1859f80", "submitter": { "id": 8974, "url": "http://patchwork.ozlabs.org/api/people/8974/?format=api", "name": "chenhui zhao", "email": "chenhui.zhao@freescale.com" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/linux-imx/patch/1411730703-25836-2-git-send-email-chenhui.zhao@freescale.com/mbox/", "series": [], "comments": "http://patchwork.ozlabs.org/api/patches/393683/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/393683/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<linux-arm-kernel-bounces+incoming-imx=patchwork.ozlabs.org@lists.infradead.org>", "X-Original-To": "incoming-imx@patchwork.ozlabs.org", "Delivered-To": "patchwork-incoming-imx@bilbo.ozlabs.org", "Received": [ "from bombadil.infradead.org (bombadil.infradead.org\n\t[IPv6:2001:1868:205::9])\n\t(using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256\n\tbits)) (No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 977E0140092\n\tfor <incoming-imx@patchwork.ozlabs.org>;\n\tFri, 26 Sep 2014 21:27:32 +1000 (EST)", "from localhost ([127.0.0.1] helo=bombadil.infradead.org)\n\tby bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux))\n\tid 1XXTeQ-0005io-5V; Fri, 26 Sep 2014 11:25:26 +0000", "from mail-bn1on0131.outbound.protection.outlook.com\n\t([157.56.110.131] helo=na01-bn1-obe.outbound.protection.outlook.com)\n\tby bombadil.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat\n\tLinux)) id 1XXTe6-0004MY-QL\n\tfor linux-arm-kernel@lists.infradead.org;\n\tFri, 26 Sep 2014 11:25:08 +0000", "from DM2PR03CA0050.namprd03.prod.outlook.com (10.141.96.49) by\n\tDM2PR03MB384.namprd03.prod.outlook.com (10.141.55.25) with Microsoft\n\tSMTP Server (TLS) id 15.0.1039.15; Fri, 26 Sep 2014 11:24:43 +0000", "from BL2FFO11FD017.protection.gbl (2a01:111:f400:7c09::176) by\n\tDM2PR03CA0050.outlook.office365.com (2a01:111:e400:2428::49) with\n\tMicrosoft SMTP Server (TLS) id 15.0.1029.13 via Frontend Transport;\n\tFri, 26 Sep 2014 11:24:43 +0000", "from tx30smr01.am.freescale.net (192.88.168.50) by\n\tBL2FFO11FD017.mail.protection.outlook.com (10.173.161.35) with\n\tMicrosoft SMTP\n\tServer (TLS) id 15.0.1029.15 via Frontend Transport; Fri, 26 Sep 2014\n\t11:24:42 +0000", "from udp189498uds.ap.freescale.net ([10.193.20.174])\n\tby tx30smr01.am.freescale.net (8.14.3/8.14.0) with ESMTP id\n\ts8QBORVf021740; Fri, 26 Sep 2014 04:24:33 -0700" ], "From": "Chenhui Zhao <chenhui.zhao@freescale.com>", "To": "<linux-kernel@vger.kernel.org>, <kernel@pengutronix.de>,\n\t<linux-arm-kernel@lists.infradead.org>", "Subject": "[PATCH 1/3] arm: ls1: add CPU hotplug platform support", "Date": "Fri, 26 Sep 2014 19:25:01 +0800", "Message-ID": "<1411730703-25836-2-git-send-email-chenhui.zhao@freescale.com>", "X-Mailer": "git-send-email 1.7.3", "In-Reply-To": "<1411730703-25836-1-git-send-email-chenhui.zhao@freescale.com>", "References": "<1411730703-25836-1-git-send-email-chenhui.zhao@freescale.com>", "X-EOPAttributedMessage": "0", "X-Forefront-Antispam-Report": "CIP:192.88.168.50; CTRY:US; IPV:CAL; IPV:NLI;\n\tEFV:NLI; SFV:NSPM;\n\tSFS:(10019020)(979002)(6009001)(199003)(189002)(50226001)(89996001)(87286001)(48376002)(50466002)(4396001)(2201001)(68736004)(83072002)(92726001)(85852003)(88136002)(86362001)(19580405001)(44976005)(83322001)(6806004)(93916002)(87936001)(62966002)(92566001)(104166001)(31966008)(19580395003)(104016003)(107046002)(33646002)(84676001)(79102003)(81342003)(77982003)(81542003)(46102003)(99396003)(80022003)(74502003)(74662003)(97736003)(85306004)(64706001)(20776003)(47776003)(102836001)(21056001)(76482002)(26826002)(120916001)(77156001)(229853001)(106466001)(95666004)(36756003)(76176999)(105606002)(10300001)(90102001)(50986999)(969003)(989001)(999001)(1009001)(1019001);\n\tDIR:OUT; SFP:1102; SCL:1; SRVR:DM2PR03MB384;\n\tH:tx30smr01.am.freescale.net; \n\tFPR:; MLV:ovrnspm; PTR:InfoDomainNonexistent; A:1; MX:1; LANG:en; ", "MIME-Version": "1.0", "X-Microsoft-Antispam": [ "UriScan:;", "BCL:0;PCL:0;RULEID:;SRVR:DM2PR03MB384;" ], "X-Forefront-PRVS": "03468CBA43", "Received-SPF": "Fail (protection.outlook.com: domain of freescale.com does not\n\tdesignate 192.88.168.50 as permitted sender)\n\treceiver=protection.outlook.com; \n\tclient-ip=192.88.168.50; helo=tx30smr01.am.freescale.net;", "Authentication-Results": "spf=fail (sender IP is 192.88.168.50)\n\tsmtp.mailfrom=chenhui.zhao@freescale.com; ", "X-OriginatorOrg": "freescale.com", "X-CRM114-Version": "20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 ", "X-CRM114-CacheID": "sfid-20140926_042507_129497_D1333C6A ", "X-CRM114-Status": "GOOD ( 16.29 )", "X-Spam-Score": "-0.3 (/)", "X-Spam-Report": "SpamAssassin version 3.4.0 on bombadil.infradead.org summary:\n\tContent analysis details: (-0.3 points)\n\tpts rule name description\n\t---- ----------------------\n\t--------------------------------------------------\n\t-0.0 RCVD_IN_DNSWL_NONE RBL: Sender listed at http://www.dnswl.org/,\n\tno trust [157.56.110.131 listed in list.dnswl.org]\n\t-0.3 RCVD_IN_MSPIKE_H2 RBL: Average reputation (+2)\n\t[157.56.110.131 listed in wl.mailspike.net]\n\t-0.0 SPF_HELO_PASS SPF: HELO matches SPF record\n\t-0.0 SPF_PASS SPF: sender matches SPF record", "Cc": "leoli@freescale.com, Jason.Jin@freescale.com, Zhuoyu.Zhang@freescale.com", "X-BeenThere": "linux-arm-kernel@lists.infradead.org", "X-Mailman-Version": "2.1.18-1", "Precedence": "list", "List-Unsubscribe": "<http://lists.infradead.org/mailman/options/linux-arm-kernel>,\n\t<mailto:linux-arm-kernel-request@lists.infradead.org?subject=unsubscribe>", "List-Archive": "<http://lists.infradead.org/pipermail/linux-arm-kernel/>", "List-Post": "<mailto:linux-arm-kernel@lists.infradead.org>", "List-Help": "<mailto:linux-arm-kernel-request@lists.infradead.org?subject=help>", "List-Subscribe": "<http://lists.infradead.org/mailman/listinfo/linux-arm-kernel>,\n\t<mailto:linux-arm-kernel-request@lists.infradead.org?subject=subscribe>", "Content-Type": "text/plain; charset=\"us-ascii\"", "Content-Transfer-Encoding": "7bit", "Sender": "\"linux-arm-kernel\" <linux-arm-kernel-bounces@lists.infradead.org>", "Errors-To": "linux-arm-kernel-bounces+incoming-imx=patchwork.ozlabs.org@lists.infradead.org", "List-Id": "linux-imx-kernel.lists.patchwork.ozlabs.org" }, "content": "From: Zhang Zhuoyu <Zhuoyu.Zhang@freescale.com>\n\nThis implements CPU hotplug for ls1. When cpu is down, it will be put\nin WFI state. When cpu is up, it will be waked by a IPI interrupt and\nreinitialized.\n\nSigned-off-by: Zhang Zhuoyu <Zhuoyu.Zhang@freescale.com>\nSigned-off-by: Chenhui Zhao <chenhui.zhao@freescale.com>\n---\n arch/arm/mach-imx/common.h | 4 ++\n arch/arm/mach-imx/hotplug.c | 90 +++++++++++++++++++++++++++++++++++++++++++\n arch/arm/mach-imx/platsmp.c | 22 ++++++++--\n arch/arm/mach-imx/src.c | 21 ++++++++++\n 4 files changed, 132 insertions(+), 5 deletions(-)", "diff": "diff --git a/arch/arm/mach-imx/common.h b/arch/arm/mach-imx/common.h\nindex 203ee73..2ca32fe 100644\n--- a/arch/arm/mach-imx/common.h\n+++ b/arch/arm/mach-imx/common.h\n@@ -115,6 +115,7 @@ void tzic_handle_irq(struct pt_regs *);\n extern void imx_enable_cpu(int cpu, bool enable);\n extern void imx_set_cpu_jump(int cpu, void *jump_addr);\n extern u32 imx_get_cpu_arg(int cpu);\n+extern u32 ls1_get_cpu_arg(int cpu);\n extern void imx_set_cpu_arg(int cpu, u32 arg);\n extern void v7_cpu_resume(void);\n #ifdef CONFIG_SMP\n@@ -145,6 +146,9 @@ extern void imx6q_set_chicken_bit(void);\n extern void imx_cpu_die(unsigned int cpu);\n extern int imx_cpu_kill(unsigned int cpu);\n \n+extern void ls1021a_cpu_die(unsigned int cpu);\n+extern int ls1021a_cpu_kill(unsigned int cpu);\n+\n #ifdef CONFIG_PM\n extern void imx6q_pm_init(void);\n extern void imx5_pm_init(void);\ndiff --git a/arch/arm/mach-imx/hotplug.c b/arch/arm/mach-imx/hotplug.c\nindex 3daf1ed..646034f 100644\n--- a/arch/arm/mach-imx/hotplug.c\n+++ b/arch/arm/mach-imx/hotplug.c\n@@ -14,6 +14,9 @@\n #include <linux/jiffies.h>\n #include <asm/cp15.h>\n #include <asm/proc-fns.h>\n+#include<asm/smp.h>\n+#include<asm/smp_plat.h>\n+#include<asm/cacheflush.h>\n \n #include \"common.h\"\n \n@@ -38,6 +41,22 @@ static inline void cpu_enter_lowpower(void)\n \t : \"cc\");\n }\n \n+static inline void cpu_leave_lowpower(void)\n+{\n+\tunsigned int v;\n+\n+\tasm volatile(\n+\t\"\tmrc p15, 0, %0, c1, c0, 0\\n\"\n+\t\" orr %0, %0, %1\\n\"\n+\t\" mcr p15, 0, %0, c1, c0, 0\\n\"\n+\t\" mrc p15, 0, %0, c1, c0, 1\\n\"\n+\t\" orr %0, %0, %2\\n\"\n+\t\" mcr p15, 0, %0, c1, c0, 1\\n\"\n+\t: \"=&r\" (v)\n+\t: \"Ir\" (CR_C), \"Ir\" (0x40)\n+\t: \"cc\");\n+}\n+\n /*\n * platform-specific code to shutdown a CPU\n *\n@@ -66,3 +85,74 @@ int imx_cpu_kill(unsigned int cpu)\n \timx_set_cpu_arg(cpu, 0);\n \treturn 1;\n }\n+\n+static inline void ls1_do_lowpower(unsigned int cpu, int *spurious)\n+{\n+\t/*\n+\t * there is no power-control hardware on this platform, so all\n+\t * we can do is put the core into WFI; this is safe as the calling\n+\t * code will have already disabled interrupts\n+\t */\n+\tfor (;;) {\n+\t\twfi();\n+\n+\t\tif (pen_release == cpu_logical_map(cpu)) {\n+\t\t\t/*OK, proper wakeup, we're done*/\n+\t\t\tbreak;\n+\t\t}\n+\n+\t\t/*\n+\t\t * Getting here, means that we have come out of WFI without\n+\t\t * having been woken up - this shouldn't happen\n+\t\t *\n+\t\t * Just note it happening - when we're woken, we can report\n+\t\t * its occurrence.\n+\t\t */\n+\t\t(*spurious)++;\n+\t}\n+}\n+\n+/*\n+ * platform-specific code to shutdown a CPU\n+ *\n+ * Called with IRQs disabled\n+ */\n+void __ref ls1021a_cpu_die(unsigned int cpu)\n+{\n+\tint spurious = 0;\n+\n+\tv7_exit_coherency_flush(louis);\n+\n+\t/*we're ready for shutdown now, so do it*/\n+\tls1_do_lowpower(cpu, &spurious);\n+\n+\t/*\n+\t * bring this CPU back into the world of cache\n+\t * coherency, and then restore interrupts\n+\t */\n+\tcpu_leave_lowpower();\n+\n+\tif (spurious)\n+\t\tpr_warn(\"CPU%u: %u spurious wakeup calls\\n\", cpu, spurious);\n+\n+\t/*\n+\t * Do not return to the idle loop - jump back to the secondary\n+\t * cpu initialisation. There's some initialisation which needs\n+\t * to be repeated to undo the effects of taking the CPU offline.\n+\t */\n+\t__asm__(\"mov sp, %0\\n\"\n+\t\" mov fp, #0\\n\"\n+\t\" b ls1021a_secondary_startup\"\n+\t:\n+\t: \"r\" (task_stack_page(current) + THREAD_SIZE - 8));\n+}\n+\n+int ls1021a_cpu_kill(unsigned int cpu)\n+{\n+\tunsigned long timeout = jiffies + msecs_to_jiffies(50);\n+\n+\twhile (ls1_get_cpu_arg(cpu))\n+\t\tif (time_after(jiffies, timeout))\n+\t\t\treturn 0;\n+\treturn 1;\n+}\ndiff --git a/arch/arm/mach-imx/platsmp.c b/arch/arm/mach-imx/platsmp.c\nindex 5225b69..d262b32 100644\n--- a/arch/arm/mach-imx/platsmp.c\n+++ b/arch/arm/mach-imx/platsmp.c\n@@ -29,6 +29,7 @@\n \n u32 g_diag_reg;\n static void __iomem *scu_base;\n+void __iomem *dcfg_base;\n \n static struct map_desc scu_io_desc __initdata = {\n \t/* .virtual and .pfn are run-time assigned */\n@@ -196,19 +197,26 @@ static void __init ls1021a_smp_init_cpus(void)\n \t\tset_cpu_possible(i, false);\n }\n \n+void ls1021a_set_secondary_entry(void)\n+{\n+\tunsigned long paddr;\n+\n+\tif (dcfg_base) {\n+\t\tpaddr = virt_to_phys(ls1021a_secondary_startup);\n+\t\twritel_relaxed(cpu_to_be32(paddr),\n+\t\t\t\tdcfg_base + DCFG_CCSR_SCRATCHRW1);\n+\t}\n+}\n+\n static void __init ls1021a_smp_prepare_cpus(unsigned int max_cpus)\n {\n \tstruct device_node *np;\n-\tvoid __iomem *dcfg_base;\n-\tunsigned long paddr;\n \n \tnp = of_find_compatible_node(NULL, NULL, \"fsl,ls1021a-dcfg\");\n \tdcfg_base = of_iomap(np, 0);\n \tWARN_ON(!dcfg_base);\n \n-\tpaddr = virt_to_phys(ls1021a_secondary_startup);\n-\twritel_relaxed(cpu_to_be32(paddr), dcfg_base + DCFG_CCSR_SCRATCHRW1);\n-\n+\tls1021a_set_secondary_entry();\n }\n \n struct smp_operations ls1021a_smp_ops __initdata = {\n@@ -216,4 +224,8 @@ struct smp_operations ls1021a_smp_ops __initdata = {\n \t.smp_prepare_cpus\t= ls1021a_smp_prepare_cpus,\n \t.smp_boot_secondary\t= ls1021a_boot_secondary,\n \t.smp_secondary_init\t= ls1021a_secondary_init,\n+#ifdef CONFIG_HOTPLUG_CPU\n+\t.cpu_die = ls1021a_cpu_die,\n+\t.cpu_kill = ls1021a_cpu_kill,\n+#endif\n };\ndiff --git a/arch/arm/mach-imx/src.c b/arch/arm/mach-imx/src.c\nindex 10a6b1a..49508d6 100644\n--- a/arch/arm/mach-imx/src.c\n+++ b/arch/arm/mach-imx/src.c\n@@ -30,6 +30,8 @@\n #define BP_SRC_SCR_CORE1_RST\t\t14\n #define BP_SRC_SCR_CORE1_ENABLE\t\t22\n \n+#define CCSR_TWAITSR0 0x04C\n+\n static void __iomem *src_base;\n static DEFINE_SPINLOCK(scr_lock);\n \n@@ -114,6 +116,25 @@ void imx_set_cpu_arg(int cpu, u32 arg)\n \twritel_relaxed(arg, src_base + SRC_GPR1 + cpu * 8 + 4);\n }\n \n+u32 ls1_get_cpu_arg(int cpu)\n+{\n+\tstruct device_node *np;\n+\tvoid __iomem *ls1_rcpm_base;\n+\n+\tnp = of_find_compatible_node(NULL, NULL, \"fsl,qoriq-rcpm-2.1\");\n+\tif (!np) {\n+\t\tpr_err(\"%s(): Can not find the RCPM node.\\n\", __func__);\n+\t\treturn -ENODEV;\n+\t}\n+\n+\tls1_rcpm_base = of_iomap(np, 0);\n+\tof_node_put(np);\n+\tWARN_ON(!ls1_rcpm_base);\n+\n+\tcpu = cpu_logical_map(cpu);\n+\treturn readl_relaxed(ls1_rcpm_base + CCSR_TWAITSR0) & (1 << cpu);\n+}\n+\n void imx_src_prepare_restart(void)\n {\n \tu32 val;\n", "prefixes": [ "1/3" ] }