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GET /api/patches/390654/?format=api
{ "id": 390654, "url": "http://patchwork.ozlabs.org/api/patches/390654/?format=api", "web_url": "http://patchwork.ozlabs.org/project/uboot/patch/1411019239-12360-7-git-send-email-b18965@freescale.com/", "project": { "id": 18, "url": "http://patchwork.ozlabs.org/api/projects/18/?format=api", "name": "U-Boot", "link_name": "uboot", "list_id": "u-boot.lists.denx.de", "list_email": "u-boot@lists.denx.de", "web_url": null, "scm_url": null, "webscm_url": null, "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<1411019239-12360-7-git-send-email-b18965@freescale.com>", "list_archive_url": null, "date": "2014-09-18T05:47:18", "name": "[U-Boot,6/7] arm: ls102xa: Add SD boot support for LS1021AQDS board", "commit_ref": null, "pull_url": null, "state": "changes-requested", "archived": false, "hash": "ca2b9b93dadae97c69352493777420f4375e9659", "submitter": { "id": 13010, "url": "http://patchwork.ozlabs.org/api/people/13010/?format=api", "name": "Alison Wang", "email": "b18965@freescale.com" }, "delegate": { "id": 1694, "url": "http://patchwork.ozlabs.org/api/users/1694/?format=api", "username": "aaribaud", "first_name": "Albert", "last_name": "ARIBAUD", "email": "albert.aribaud@free.fr" }, "mbox": "http://patchwork.ozlabs.org/project/uboot/patch/1411019239-12360-7-git-send-email-b18965@freescale.com/mbox/", "series": [], "comments": "http://patchwork.ozlabs.org/api/patches/390654/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/390654/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<u-boot-bounces@lists.denx.de>", "X-Original-To": "incoming@patchwork.ozlabs.org", "Delivered-To": "patchwork-incoming@bilbo.ozlabs.org", "Received": [ "from theia.denx.de (theia.denx.de [85.214.87.163])\n\tby ozlabs.org (Postfix) with ESMTP id 52D261400E2\n\tfor <incoming@patchwork.ozlabs.org>;\n\tThu, 18 Sep 2014 16:41:54 +1000 (EST)", "from localhost (localhost [127.0.0.1])\n\tby theia.denx.de (Postfix) with ESMTP id BBA6BA7C3E;\n\tThu, 18 Sep 2014 08:41:42 +0200 (CEST)", "from theia.denx.de ([127.0.0.1])\n\tby localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024)\n\twith ESMTP id cfGP++K9yo0X; Thu, 18 Sep 2014 08:41:42 +0200 (CEST)", "from theia.denx.de (localhost [127.0.0.1])\n\tby theia.denx.de (Postfix) with ESMTP id 0A950A7C44;\n\tThu, 18 Sep 2014 08:41:11 +0200 (CEST)", "from localhost (localhost [127.0.0.1])\n\tby theia.denx.de (Postfix) with ESMTP id C4ED0A7C3A\n\tfor <u-boot@lists.denx.de>; Thu, 18 Sep 2014 08:41:05 +0200 (CEST)", "from theia.denx.de ([127.0.0.1])\n\tby localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024)\n\twith ESMTP id t7X8N4QBwSvk for <u-boot@lists.denx.de>;\n\tThu, 18 Sep 2014 08:41:01 +0200 (CEST)", "from na01-bn1-obe.outbound.protection.outlook.com\n\t(mail-bn1bon0131.outbound.protection.outlook.com [157.56.111.131])\n\tby theia.denx.de (Postfix) with ESMTPS id 583BEA7C27\n\tfor <u-boot@lists.denx.de>; Thu, 18 Sep 2014 08:40:44 +0200 (CEST)", "from BY2PR03CA043.namprd03.prod.outlook.com (10.141.249.16) by\n\tDM2PR03MB381.namprd03.prod.outlook.com (10.141.55.11) with Microsoft\n\tSMTP Server (TLS) id 15.0.1024.12; Thu, 18 Sep 2014 06:40:32 +0000", "from BN1BFFO11FD025.protection.gbl (2a01:111:f400:7c10::1:125) by\n\tBY2PR03CA043.outlook.office365.com (2a01:111:e400:2c5d::16) with\n\tMicrosoft SMTP Server (TLS) id 15.0.1034.13 via Frontend Transport;\n\tThu, 18 Sep 2014 06:40:30 +0000", "from tx30smr01.am.freescale.net (192.88.168.50) by\n\tBN1BFFO11FD025.mail.protection.outlook.com (10.58.144.88) with\n\tMicrosoft SMTP\n\tServer (TLS) id 15.0.1029.15 via Frontend Transport; Thu, 18 Sep 2014\n\t06:40:30 +0000", "from rock.ap.freescale.net (rock.ap.freescale.net [10.193.20.106])\n\tby tx30smr01.am.freescale.net (8.14.3/8.14.0) with ESMTP id\n\ts8I6e7aF000575; Wed, 17 Sep 2014 23:40:27 -0700" ], "X-Virus-Scanned": [ "Debian amavisd-new at theia.denx.de", "Debian amavisd-new at theia.denx.de" ], "X-policyd-weight": "NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5\n\tNOT_IN_BL_NJABL=-1.5 (only DNSBL check requested)", "From": "Alison Wang <b18965@freescale.com>", "To": "<yorksun@freescale.com>, <u-boot@lists.denx.de>,\n\t<albert.u.boot@aribaud.net>, <jason.jin@freescale.com>", "Date": "Thu, 18 Sep 2014 13:47:18 +0800", "Message-ID": "<1411019239-12360-7-git-send-email-b18965@freescale.com>", "X-Mailer": "git-send-email 1.8.0", "In-Reply-To": "<1411019239-12360-1-git-send-email-b18965@freescale.com>", "References": "<1411019239-12360-1-git-send-email-b18965@freescale.com>", "X-EOPAttributedMessage": "0", "X-Forefront-Antispam-Report": "CIP:192.88.168.50; CTRY:US; IPV:CAL; IPV:NLI;\n\tEFV:NLI; SFV:NSPM; \n\tSFS:(10019020)(6009001)(199003)(189002)(79102003)(76482002)(19580405001)(97736003)(50466002)(74662003)(104166001)(6806004)(20776003)(46102003)(83072002)(99396002)(44976005)(104016003)(48376002)(85306004)(50226001)(81342003)(85852003)(4396001)(2201001)(80022003)(47776003)(74502003)(68736004)(87936001)(31966008)(36756003)(83322001)(81542003)(88136002)(102836001)(77982003)(77156001)(19580395003)(26826002)(92726001)(33646002)(87286001)(92566001)(84676001)(95666004)(76176999)(50986999)(229853001)(93916002)(21056001)(62966002)(105606002)(107046002)(90102001)(89996001)(64706001)(106466001)(107886001)(42262002);\n\tDIR:OUT; SFP:1102; SCL:1; SRVR:DM2PR03MB381;\n\tH:tx30smr01.am.freescale.net; FPR:; MLV:ovrnspm;\n\tPTR:InfoDomainNonexistent; A:1; MX:1; LANG:en; ", "MIME-Version": "1.0", "X-Microsoft-Antispam": "BCL:0;PCL:0;RULEID:;UriScan:;", "X-Forefront-PRVS": "033857D0BD", "Received-SPF": "Fail (protection.outlook.com: domain of freescale.com does not\n\tdesignate 192.88.168.50 as permitted sender)\n\treceiver=protection.outlook.com; \n\tclient-ip=192.88.168.50; helo=tx30smr01.am.freescale.net;", "Authentication-Results": "spf=fail (sender IP is 192.88.168.50)\n\tsmtp.mailfrom=alison.wang@freescale.com; ", "X-OriginatorOrg": "freescale.com", "Subject": "[U-Boot] [PATCH 6/7] arm: ls102xa: Add SD boot support for\n\tLS1021AQDS board", "X-BeenThere": "u-boot@lists.denx.de", "X-Mailman-Version": "2.1.11", "Precedence": "list", "List-Id": "U-Boot discussion <u-boot.lists.denx.de>", "List-Unsubscribe": "<http://lists.denx.de/mailman/options/u-boot>,\n\t<mailto:u-boot-request@lists.denx.de?subject=unsubscribe>", "List-Archive": "<http://lists.denx.de/pipermail/u-boot>", "List-Post": "<mailto:u-boot@lists.denx.de>", "List-Help": "<mailto:u-boot-request@lists.denx.de?subject=help>", "List-Subscribe": "<http://lists.denx.de/mailman/listinfo/u-boot>,\n\t<mailto:u-boot-request@lists.denx.de?subject=subscribe>", "Content-Type": "text/plain; charset=\"us-ascii\"", "Content-Transfer-Encoding": "7bit", "Sender": "u-boot-bounces@lists.denx.de", "Errors-To": "u-boot-bounces@lists.denx.de" }, "content": "This patch adds SD boot support for LS1021AQDS board. SPL\nframework is used. PBL initialize the internal RAM and copy\nSPL to it, then SPL initialize DDR using SPD and copy u-boot\nfrom SD card to DDR, finally SPL transfer control to u-boot.\n\nSigned-off-by: Alison Wang <alison.wang@freescale.com>\nSigned-off-by: Jason Jin <jason.jin@freescale.com>\n---\n arch/arm/cpu/armv7/ls102xa/Makefile | 1 +\n arch/arm/cpu/armv7/ls102xa/spl.c | 35 +++++++++++\n arch/arm/cpu/armv7/ls102xa/u-boot-spl.lds | 89 +++++++++++++++++++++++++++\n arch/arm/include/asm/arch-ls102xa/spl.h | 20 ++++++\n board/freescale/ls1021aqds/MAINTAINERS | 1 +\n board/freescale/ls1021aqds/ddr.c | 5 +-\n board/freescale/ls1021aqds/ls1021aqds.c | 31 ++++++++++\n board/freescale/ls1021aqds/ls102xa_pbi.cfg | 8 +++\n board/freescale/ls1021aqds/ls102xa_rcw_sd.cfg | 14 +++++\n configs/ls1021aqds_sdcard_defconfig | 4 ++\n include/configs/ls1021aqds.h | 67 ++++++++++++++++++++\n 11 files changed, 274 insertions(+), 1 deletion(-)\n create mode 100644 arch/arm/cpu/armv7/ls102xa/spl.c\n create mode 100644 arch/arm/cpu/armv7/ls102xa/u-boot-spl.lds\n create mode 100644 arch/arm/include/asm/arch-ls102xa/spl.h\n create mode 100644 board/freescale/ls1021aqds/ls102xa_pbi.cfg\n create mode 100644 board/freescale/ls1021aqds/ls102xa_rcw_sd.cfg\n create mode 100644 configs/ls1021aqds_sdcard_defconfig", "diff": "diff --git a/arch/arm/cpu/armv7/ls102xa/Makefile b/arch/arm/cpu/armv7/ls102xa/Makefile\nindex d82ce8d..56ef3a7 100644\n--- a/arch/arm/cpu/armv7/ls102xa/Makefile\n+++ b/arch/arm/cpu/armv7/ls102xa/Makefile\n@@ -10,3 +10,4 @@ obj-y\t+= timer.o\n \n obj-$(CONFIG_OF_LIBFDT) += fdt.o\n obj-$(CONFIG_SYS_HAS_SERDES) += fsl_ls1_serdes.o ls102xa_serdes.o\n+obj-$(CONFIG_SPL) += spl.o\ndiff --git a/arch/arm/cpu/armv7/ls102xa/spl.c b/arch/arm/cpu/armv7/ls102xa/spl.c\nnew file mode 100644\nindex 0000000..77ea1ee\n--- /dev/null\n+++ b/arch/arm/cpu/armv7/ls102xa/spl.c\n@@ -0,0 +1,35 @@\n+/*\n+ * Copyright 2014 Freescale Semiconductor, Inc.\n+ *\n+ * SPDX-License-Identifier:\tGPL-2.0+\n+ */\n+\n+#include <common.h>\n+#include <spl.h>\n+\n+u32 spl_boot_device(void)\n+{\n+#ifdef CONFIG_SPL_MMC_SUPPORT\n+\treturn BOOT_DEVICE_MMC1;\n+#endif\n+\treturn BOOT_DEVICE_NAND;\n+}\n+\n+u32 spl_boot_mode(void)\n+{\n+\tswitch (spl_boot_device()) {\n+\tcase BOOT_DEVICE_MMC1:\n+#ifdef CONFIG_SPL_FAT_SUPPORT\n+\t\treturn MMCSD_MODE_FAT;\n+#else\n+\t\treturn MMCSD_MODE_RAW;\n+#endif\n+\t\tbreak;\n+\tcase BOOT_DEVICE_NAND:\n+\t\treturn 0;\n+\t\tbreak;\n+\tdefault:\n+\t\tputs(\"spl: error: unsupported device\\n\");\n+\t\thang();\n+\t}\n+}\ndiff --git a/arch/arm/cpu/armv7/ls102xa/u-boot-spl.lds b/arch/arm/cpu/armv7/ls102xa/u-boot-spl.lds\nnew file mode 100644\nindex 0000000..10671e7\n--- /dev/null\n+++ b/arch/arm/cpu/armv7/ls102xa/u-boot-spl.lds\n@@ -0,0 +1,89 @@\n+/*\n+ * Copyright (c) 2004-2008 Texas Instruments\n+ *\n+ * (C) Copyright 2002\n+ * Gary Jennejohn, DENX Software Engineering, <garyj@denx.de>\n+ *\n+ * Copyright 2014 Freescale Semiconductor, Inc.\n+ *\n+ * SPDX-License-Identifier:\tGPL-2.0+\n+ */\n+\n+OUTPUT_FORMAT(\"elf32-littlearm\", \"elf32-littlearm\", \"elf32-littlearm\")\n+OUTPUT_ARCH(arm)\n+ENTRY(_start)\n+SECTIONS\n+{\n+\t. = 0x00000000;\n+\n+\t. = ALIGN(4);\n+\t.text :\n+\t{\n+\t\t__image_copy_start = .;\n+\t\t*(.vectors)\n+\t\tCPUDIR/start.o (.text*)\n+\t\t*(.text*)\n+\t}\n+\n+\t. = ALIGN(4);\n+\t.rodata : { *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) }\n+\n+\t. = ALIGN(4);\n+\t.data : {\n+\t\t*(.data*)\n+\t}\n+\n+\t. = ALIGN(4);\n+\t.u_boot_list : {\n+\t\tKEEP(*(SORT(.u_boot_list*_i2c_*)));\n+\t}\n+\n+\t. = .;\n+\n+\t__image_copy_end = .;\n+\n+\t.rel.dyn : {\n+\t\t__rel_dyn_start = .;\n+\t\t*(.rel*)\n+\t\t__rel_dyn_end = .;\n+\t}\n+\n+\t.end :\n+\t{\n+\t\t*(.__end)\n+\t}\n+\n+\t_image_binary_end = .;\n+\n+\t.bss __rel_dyn_start (OVERLAY) : {\n+\t\t__bss_start = .;\n+\t\t*(.bss*)\n+\t\t . = ALIGN(4);\n+\t\t__bss_end = .;\n+\t}\n+\n+\t.dynsym _image_binary_end : { *(.dynsym) }\n+\t.dynbss : { *(.dynbss) }\n+\t.dynstr : { *(.dynstr*) }\n+\t.dynamic : { *(.dynamic*) }\n+\t.hash : { *(.hash*) }\n+\t.plt : { *(.plt*) }\n+\t.interp : { *(.interp*) }\n+\t.gnu : { *(.gnu*) }\n+\t.ARM.exidx : { *(.ARM.exidx*) }\n+}\n+\n+#if defined(CONFIG_SPL_MAX_SIZE)\n+ASSERT(__image_copy_end - __image_copy_start < (CONFIG_SPL_MAX_SIZE), \\\n+\t\"SPL image too big\");\n+#endif\n+\n+#if defined(CONFIG_SPL_BSS_MAX_SIZE)\n+ASSERT(__bss_end - __bss_start < (CONFIG_SPL_BSS_MAX_SIZE), \\\n+\t\"SPL image BSS too big\");\n+#endif\n+\n+#if defined(CONFIG_SPL_MAX_FOOTPRINT)\n+ASSERT(__bss_end - _start < (CONFIG_SPL_MAX_FOOTPRINT), \\\n+\t\"SPL image plus BSS too big\");\n+#endif\ndiff --git a/arch/arm/include/asm/arch-ls102xa/spl.h b/arch/arm/include/asm/arch-ls102xa/spl.h\nnew file mode 100644\nindex 0000000..26e4ea1\n--- /dev/null\n+++ b/arch/arm/include/asm/arch-ls102xa/spl.h\n@@ -0,0 +1,20 @@\n+/*\n+ * Copyright 2014 Freescale Semiconductor, Inc.\n+ *\n+ * SPDX-License-Identifier:\tGPL-2.0+\n+ */\n+\n+#ifndef __ASM_ARCH_SPL_H__\n+#define __ASM_ARCH_SPL_H__\n+\n+#define BOOT_DEVICE_NONE\t0\n+#define BOOT_DEVICE_XIP\t\t1\n+#define BOOT_DEVICE_XIPWAIT\t2\n+#define BOOT_DEVICE_NAND\t3\n+#define BOOT_DEVICE_ONENAND\t4\n+#define BOOT_DEVICE_MMC1\t5\n+#define BOOT_DEVICE_MMC2\t6\n+#define BOOT_DEVICE_MMC2_2\t7\n+#define BOOT_DEVICE_SPI\t\t10\n+\n+#endif\t/* __ASM_ARCH_SPL_H__ */\ndiff --git a/board/freescale/ls1021aqds/MAINTAINERS b/board/freescale/ls1021aqds/MAINTAINERS\nindex 021d82b..9244057 100644\n--- a/board/freescale/ls1021aqds/MAINTAINERS\n+++ b/board/freescale/ls1021aqds/MAINTAINERS\n@@ -4,3 +4,4 @@ S:\tMaintained\n F:\tboard/freescale/ls1021aqds/\n F:\tinclude/configs/ls1021aqds.h\n F:\tconfigs/ls1021aqds_nor_defconfig\n+F:\tconfigs/ls1021aqds_sdcard_defconfig\ndiff --git a/board/freescale/ls1021aqds/ddr.c b/board/freescale/ls1021aqds/ddr.c\nindex 679c654..369088e 100644\n--- a/board/freescale/ls1021aqds/ddr.c\n+++ b/board/freescale/ls1021aqds/ddr.c\n@@ -146,9 +146,12 @@ phys_size_t initdram(int board_type)\n {\n \tphys_size_t dram_size;\n \n+#if defined(CONFIG_SPL_BUILD) || !defined(CONFIG_SPL)\n \tputs(\"Initializing DDR....using SPD\\n\");\n \tdram_size = fsl_ddr_sdram();\n-\n+#else\n+\tdram_size = fsl_ddr_sdram_size();\n+#endif\n \treturn dram_size;\n }\n \ndiff --git a/board/freescale/ls1021aqds/ls1021aqds.c b/board/freescale/ls1021aqds/ls1021aqds.c\nindex 12e83f7..85a53c9 100644\n--- a/board/freescale/ls1021aqds/ls1021aqds.c\n+++ b/board/freescale/ls1021aqds/ls1021aqds.c\n@@ -13,6 +13,7 @@\n #include <mmc.h>\n #include <fsl_esdhc.h>\n #include <fsl_ifc.h>\n+#include <spl.h>\n \n #include \"../common/qixis.h\"\n #include \"ls1021aqds_qixis.h\"\n@@ -29,10 +30,13 @@ enum {\n int checkboard(void)\n {\n \tchar buf[64];\n+#if !defined(CONFIG_SD_BOOT) && !defined(CONFIG_QSPI_BOOT)\n \tu8 sw;\n+#endif\n \n \tputs(\"Board: LS1021AQDS\\n\");\n \n+#if !defined(CONFIG_SD_BOOT) && !defined(CONFIG_QSPI_BOOT)\n \tsw = QIXIS_READ(brdcfg[0]);\n \tsw = (sw & QIXIS_LBMAP_MASK) >> QIXIS_LBMAP_SHIFT;\n \n@@ -46,6 +50,7 @@ int checkboard(void)\n \t\tprintf(\"IFCCard\\n\");\n \telse\n \t\tprintf(\"invalid setting of SW%u\\n\", QIXIS_LBMAP_SWITCH);\n+#endif\n \n \tprintf(\"Sys ID:0x%02x, Sys Ver: 0x%02x\\n\",\n \t QIXIS_READ(id), QIXIS_READ(arch));\n@@ -155,6 +160,32 @@ int board_early_init_f(void)\n \treturn 0;\n }\n \n+#ifdef CONFIG_SPL_BUILD\n+void board_init_f(ulong dummy)\n+{\n+\tstruct ccsr_cci400 *cci = (struct ccsr_cci400 *)CONFIG_SYS_CCI400_ADDR;\n+\n+\t/* Set global data pointer */\n+\tgd = &gdata;\n+\n+\t/* Clear the BSS */\n+\tmemset(__bss_start, 0, __bss_end - __bss_start);\n+\n+\tget_clocks();\n+\n+\tpreloader_console_init();\n+\n+#ifdef CONFIG_SPL_I2C_SUPPORT\n+\ti2c_init_all();\n+#endif\n+\tout_le32(&cci->ctrl_ord, CCI400_CTRLORD_TERM_BARRIER);\n+\n+\tdram_init();\n+\n+\tboard_init_r(NULL, 0);\n+}\n+#endif\n+\n int config_board_mux(int ctrl_type)\n {\n \tu8 reg12;\ndiff --git a/board/freescale/ls1021aqds/ls102xa_pbi.cfg b/board/freescale/ls1021aqds/ls102xa_pbi.cfg\nnew file mode 100644\nindex 0000000..edf9f94\n--- /dev/null\n+++ b/board/freescale/ls1021aqds/ls102xa_pbi.cfg\n@@ -0,0 +1,8 @@\n+#PBI commands\n+\n+#Configure Scratch register\n+09ee0200 10000000\n+#Configure alternate space\n+09570158 00080000\n+#Flush PBL data\n+096100c0 000FFFFF\ndiff --git a/board/freescale/ls1021aqds/ls102xa_rcw_sd.cfg b/board/freescale/ls1021aqds/ls102xa_rcw_sd.cfg\nnew file mode 100644\nindex 0000000..e05ec16\n--- /dev/null\n+++ b/board/freescale/ls1021aqds/ls102xa_rcw_sd.cfg\n@@ -0,0 +1,14 @@\n+#PBL preamble and RCW header\n+aa55aa55 01ee0100\n+\n+#enable IFC, disable QSPI and DSPI\n+#0608000a 00000000 00000000 00000000\n+#00000000 00404000 60025a00 21042000\n+#00200000 00000000 00000000 01038000\n+#00000000 001b1200 00000000 00000000\n+\n+#disable IFC, enable QSPI and DSPI\n+0608000a 00000000 00000000 00000000\n+60000000 00407900 e0025a00 21046000\n+00000000 00000000 00000000 00038000\n+20024800 001b7200 00000000 00000000\ndiff --git a/configs/ls1021aqds_sdcard_defconfig b/configs/ls1021aqds_sdcard_defconfig\nnew file mode 100644\nindex 0000000..e03c3b4\n--- /dev/null\n+++ b/configs/ls1021aqds_sdcard_defconfig\n@@ -0,0 +1,4 @@\n+CONFIG_SPL=y\n+CONFIG_SYS_EXTRA_OPTIONS=\"RAMBOOT_PBL,SPL_FSL_PBL,SD_BOOT\"\n++S:CONFIG_ARM=y\n++S:CONFIG_TARGET_LS1021AQDS=y\ndiff --git a/include/configs/ls1021aqds.h b/include/configs/ls1021aqds.h\nindex 657e3b6..440c118 100644\n--- a/include/configs/ls1021aqds.h\n+++ b/include/configs/ls1021aqds.h\n@@ -37,8 +37,48 @@ unsigned long get_board_sys_clk(void);\n unsigned long get_board_ddr_clk(void);\n #endif\n \n+#if defined(CONFIG_SD_BOOT) || defined(CONFIG_QSPI_BOOT)\n+#define CONFIG_SYS_CLK_FREQ 100000000\n+#define CONFIG_DDR_CLK_FREQ 100000000\n+#define CONFIG_QIXIS_I2C_ACCESS\n+#else\n #define CONFIG_SYS_CLK_FREQ\t\tget_board_sys_clk()\n #define CONFIG_DDR_CLK_FREQ\t\tget_board_ddr_clk()\n+#endif\n+\n+#ifdef CONFIG_RAMBOOT_PBL\n+#define CONFIG_SYS_FSL_PBL_PBI\tboard/freescale/ls1021aqds/ls102xa_pbi.cfg\n+#endif\n+\n+#ifdef CONFIG_SD_BOOT\n+#define CONFIG_SYS_FSL_PBL_RCW\tboard/freescale/ls1021aqds/ls102xa_rcw_sd.cfg\n+#define CONFIG_SPL_PBL_PAD\n+#define CONFIG_SPL_FRAMEWORK\n+#define CONFIG_SPL_LDSCRIPT\t\"arch/arm/cpu/armv7/ls102xa/u-boot-spl.lds\"\n+#define CONFIG_SPL_LIBCOMMON_SUPPORT\n+#define CONFIG_SPL_LIBGENERIC_SUPPORT\n+#define CONFIG_SPL_ENV_SUPPORT\n+#define CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT\n+#define CONFIG_SPL_I2C_SUPPORT\n+#define CONFIG_SPL_WATCHDOG_SUPPORT\n+#define CONFIG_SPL_SERIAL_SUPPORT\n+#define CONFIG_SPL_MMC_SUPPORT\n+#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR\t\t0xe8\n+#define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS\t\t0x400\n+\n+#define CONFIG_SPL_TEXT_BASE\t\t0x10000000\n+#define CONFIG_SPL_MAX_SIZE\t\t0x1a000\n+#define CONFIG_SPL_STACK\t\t0x1001d000\n+#define CONFIG_SPL_PAD_TO\t\t0x1c000\n+#define CONFIG_SYS_TEXT_BASE\t\t0x82000000\n+\n+#define CONFIG_SYS_SPL_MALLOC_START\t0x80200000\n+#define CONFIG_SYS_SPL_MALLOC_SIZE\t0x100000\n+#define CONFIG_SPL_BSS_START_ADDR\t0x80100000\n+#define CONFIG_SPL_BSS_MAX_SIZE\t\t0x80000\n+#define CONFIG_SYS_MONITOR_LEN\t\t0x80000\n+#define CONFIG_SYS_NO_FLASH\n+#endif\n \n #ifndef CONFIG_SYS_TEXT_BASE\n #define CONFIG_SYS_TEXT_BASE\t\t0x67f80000\n@@ -70,6 +110,7 @@ unsigned long get_board_ddr_clk(void);\n /*\n * IFC Definitions\n */\n+#if !defined(CONFIG_SD_BOOT) && !defined(CONFIG_QSPI_BOOT)\n #define CONFIG_FSL_IFC\n #define CONFIG_SYS_FLASH_BASE\t\t0x60000000\n #define CONFIG_SYS_FLASH_BASE_PHYS\tCONFIG_SYS_FLASH_BASE\n@@ -161,6 +202,7 @@ unsigned long get_board_ddr_clk(void);\n #define CONFIG_CMD_NAND\n \n #define CONFIG_SYS_NAND_BLOCK_SIZE\t(128 * 1024)\n+#endif\n \n /*\n * QIXIS Definitions\n@@ -322,7 +364,12 @@ unsigned long get_board_ddr_clk(void);\n \n #define CONFIG_CMDLINE_TAG\n #define CONFIG_CMDLINE_EDITING\n+\n+#if !defined(CONFIG_SD_BOOT) && !defined(CONFIG_QSPI_BOOT)\n #define CONFIG_CMD_IMLS\n+#else\n+#undef CONFIG_CMD_IMLS\n+#endif\n \n #define CONFIG_HWCONFIG\n #define HWCONFIG_BUFFER_SIZE\t\t128\n@@ -370,17 +417,37 @@ unsigned long get_board_ddr_clk(void);\n #define CONFIG_SYS_INIT_SP_ADDR \\\n \t(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)\n \n+#ifdef CONFIG_SPL_BUILD\n+#define CONFIG_SYS_MONITOR_BASE CONFIG_SPL_TEXT_BASE\n+#else\n #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /* start of monitor */\n+#endif\n \n /*\n * Environment\n */\n #define CONFIG_ENV_OVERWRITE\n \n+#if defined(CONFIG_SD_BOOT)\n+#define CONFIG_ENV_OFFSET\t\t(1024 * 1024)\n+#define CONFIG_ENV_IS_IN_MMC\n+#define CONFIG_SYS_MMC_ENV_DEV\t\t0\n+#define CONFIG_ENV_SIZE\t\t\t0x2000\n+#elif defined(CONFIG_NAND_BOOT)\n+#define CONFIG_ENV_IS_IN_NAND\n+#define CONFIG_ENV_SIZE\t\t\t0x2000\n+#define CONFIG_ENV_OFFSET\t\t(10 * CONFIG_SYS_NAND_BLOCK_SIZE)\n+#elif defined(CONFIG_QSPI_BOOT)\n+#define CONFIG_ENV_IS_IN_SPI_FLASH\n+#define CONFIG_ENV_SIZE\t\t\t0x2000 /* 8KB */\n+#define CONFIG_ENV_OFFSET\t\t0x100000 /* 1MB */\n+#define CONFIG_ENV_SECT_SIZE\t\t0x10000\n+#else\n #define CONFIG_ENV_IS_IN_FLASH\n #define CONFIG_ENV_ADDR\t\t(CONFIG_SYS_MONITOR_BASE - CONFIG_ENV_SECT_SIZE)\n #define CONFIG_ENV_SIZE\t\t\t0x2000\n #define CONFIG_ENV_SECT_SIZE\t\t0x20000 /* 128K (one sector) */\n+#endif\n \n #define CONFIG_OF_LIBFDT\n #define CONFIG_OF_BOARD_SETUP\n", "prefixes": [ "U-Boot", "6/7" ] }