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GET /api/patches/387235/?format=api
{ "id": 387235, "url": "http://patchwork.ozlabs.org/api/patches/387235/?format=api", "web_url": "http://patchwork.ozlabs.org/project/linux-imx/patch/1410253952-15631-7-git-send-email-jingchang.lu@freescale.com/", "project": { "id": 19, "url": "http://patchwork.ozlabs.org/api/projects/19/?format=api", "name": "Linux IMX development", "link_name": "linux-imx", "list_id": "linux-imx-kernel.lists.patchwork.ozlabs.org", "list_email": "linux-imx-kernel@lists.patchwork.ozlabs.org", "web_url": null, "scm_url": null, "webscm_url": null, "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<1410253952-15631-7-git-send-email-jingchang.lu@freescale.com>", "list_archive_url": null, "date": "2014-09-09T09:12:32", "name": "[PATCHv3,6/6] ARM: imx: Add Freescale LS1021A SMP support", "commit_ref": null, "pull_url": null, "state": "new", "archived": false, "hash": "5d930b7a84b075b531f45a6f5e564bbd6744fd36", "submitter": { "id": 46273, "url": "http://patchwork.ozlabs.org/api/people/46273/?format=api", "name": "Jingchang Lu", "email": "jingchang.lu@freescale.com" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/linux-imx/patch/1410253952-15631-7-git-send-email-jingchang.lu@freescale.com/mbox/", "series": [], "comments": "http://patchwork.ozlabs.org/api/patches/387235/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/387235/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<linux-arm-kernel-bounces+incoming-imx=patchwork.ozlabs.org@lists.infradead.org>", "X-Original-To": "incoming-imx@patchwork.ozlabs.org", "Delivered-To": "patchwork-incoming-imx@bilbo.ozlabs.org", "Received": [ "from bombadil.infradead.org (bombadil.infradead.org\n\t[IPv6:2001:1868:205::9])\n\t(using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256\n\tbits)) (No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 89241140078\n\tfor <incoming-imx@patchwork.ozlabs.org>;\n\tTue, 9 Sep 2014 20:07:24 +1000 (EST)", "from localhost ([127.0.0.1] helo=bombadil.infradead.org)\n\tby bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux))\n\tid 1XRIId-0005Si-KA; Tue, 09 Sep 2014 10:05:23 +0000", "from mail-bn1bn0107.outbound.protection.outlook.com\n\t([157.56.110.107] helo=na01-bn1-obe.outbound.protection.outlook.com)\n\tby bombadil.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat\n\tLinux)) id 1XRIIE-0003uL-Hk\n\tfor linux-arm-kernel@lists.infradead.org;\n\tTue, 09 Sep 2014 10:04:59 +0000", "from CH1PR03CA007.namprd03.prod.outlook.com (10.255.156.152) by\n\tDM2PR03MB478.namprd03.prod.outlook.com (10.141.85.22) with Microsoft\n\tSMTP Server (TLS) id 15.0.1019.16; Tue, 9 Sep 2014 10:04:38 +0000", "from BN1BFFO11FD002.protection.gbl (10.255.156.132) by\n\tCH1PR03CA007.outlook.office365.com (10.255.156.152) with Microsoft\n\tSMTP Server (TLS) id 15.0.1024.12 via Frontend Transport;\n\tTue, 9 Sep 2014 10:04:38 +0000", "from tx30smr01.am.freescale.net (192.88.168.50) by\n\tBN1BFFO11FD002.mail.protection.outlook.com (10.58.144.65) with\n\tMicrosoft SMTP Server (TLS) id 15.0.1019.14 via Frontend Transport;\n\tTue, 9 Sep 2014 10:04:38 +0000", "from rock.ap.freescale.net (rock.ap.freescale.net [10.193.20.106])\n\tby tx30smr01.am.freescale.net (8.14.3/8.14.0) with ESMTP id\n\ts89A4Hqt026857; Tue, 9 Sep 2014 03:04:35 -0700" ], "From": "Jingchang Lu <jingchang.lu@freescale.com>", "To": "<shawn.guo@freescale.com>", "Subject": "[PATCHv3 6/6] ARM: imx: Add Freescale LS1021A SMP support", "Date": "Tue, 9 Sep 2014 17:12:32 +0800", "Message-ID": "<1410253952-15631-7-git-send-email-jingchang.lu@freescale.com>", "X-Mailer": "git-send-email 1.8.0", "In-Reply-To": "<1410253952-15631-1-git-send-email-jingchang.lu@freescale.com>", "References": "<1410253952-15631-1-git-send-email-jingchang.lu@freescale.com>", "X-EOPAttributedMessage": "0", "X-Forefront-Antispam-Report": "CIP:192.88.168.50; CTRY:US; IPV:CAL; IPV:NLI;\n\tEFV:NLI; SFV:NSPM;\n\tSFS:(10019018)(6009001)(189002)(199003)(89996001)(81342001)(87936001)(20776003)(92566001)(31966008)(26826002)(74662001)(83322001)(68736004)(86362001)(19580395003)(21056001)(87286001)(76176999)(85852003)(85306004)(19580405001)(92726001)(6806004)(64706001)(2351001)(93916002)(80022001)(97736003)(44976005)(81542001)(102836001)(104016003)(62966002)(74502001)(2371004)(48376002)(46102001)(105606002)(76482001)(36756003)(50226001)(77156001)(99396002)(88136002)(90102001)(83072002)(50466002)(84676001)(47776003)(104166001)(50986999)(33646002)(110136001)(4396001)(77982001)(79102001)(106466001)(107046002)(95666004)(229853001);\n\tDIR:OUT; SFP:1102; SCL:1; SRVR:DM2PR03MB478;\n\tH:tx30smr01.am.freescale.net; \n\tFPR:; MLV:ovrnspm; PTR:InfoDomainNonexistent; MX:1; A:1; LANG:en; ", "MIME-Version": "1.0", "X-Microsoft-Antispam": "BCL:0;PCL:0;RULEID:;UriScan:;", "X-Forefront-PRVS": "0329B15C8A", "Received-SPF": "Fail (protection.outlook.com: domain of freescale.com does not\n\tdesignate 192.88.168.50 as permitted sender)\n\treceiver=protection.outlook.com; \n\tclient-ip=192.88.168.50; helo=tx30smr01.am.freescale.net;", "Authentication-Results": "spf=fail (sender IP is 192.88.168.50)\n\tsmtp.mailfrom=jingchang.lu@freescale.com; ", "X-OriginatorOrg": "freescale.com", "X-CRM114-Version": "20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 ", "X-CRM114-CacheID": "sfid-20140909_030458_705409_EF33D020 ", "X-CRM114-Status": "UNSURE ( 9.43 )", "X-CRM114-Notice": "Please train this message.", "X-Spam-Score": "-1.8 (-)", "X-Spam-Report": "SpamAssassin version 3.4.0 on bombadil.infradead.org summary:\n\tContent analysis details: (-1.8 points)\n\tpts rule name description\n\t---- ----------------------\n\t--------------------------------------------------\n\t-1.8 RCVD_IN_MSPIKE_H2 RBL: Average reputation (+2)\n\t[157.56.110.107 listed in wl.mailspike.net]\n\t-0.0 RCVD_IN_DNSWL_NONE RBL: Sender listed at http://www.dnswl.org/,\n\tno trust [157.56.110.107 listed in list.dnswl.org]\n\t-0.0 SPF_HELO_PASS SPF: HELO matches SPF record\n\t-0.0 SPF_PASS SPF: sender matches SPF record", "Cc": "Jingchang Lu <b35083@freescale.com>, devicetree@vger.kernel.org,\n\tlinux-arm-kernel@lists.infradead.org", "X-BeenThere": "linux-arm-kernel@lists.infradead.org", "X-Mailman-Version": "2.1.18-1", "Precedence": "list", "List-Unsubscribe": "<http://lists.infradead.org/mailman/options/linux-arm-kernel>,\n\t<mailto:linux-arm-kernel-request@lists.infradead.org?subject=unsubscribe>", "List-Archive": "<http://lists.infradead.org/pipermail/linux-arm-kernel/>", "List-Post": "<mailto:linux-arm-kernel@lists.infradead.org>", "List-Help": "<mailto:linux-arm-kernel-request@lists.infradead.org?subject=help>", "List-Subscribe": "<http://lists.infradead.org/mailman/listinfo/linux-arm-kernel>,\n\t<mailto:linux-arm-kernel-request@lists.infradead.org?subject=subscribe>", "Content-Type": "text/plain; charset=\"us-ascii\"", "Content-Transfer-Encoding": "7bit", "Sender": "\"linux-arm-kernel\" <linux-arm-kernel-bounces@lists.infradead.org>", "Errors-To": "linux-arm-kernel-bounces+incoming-imx=patchwork.ozlabs.org@lists.infradead.org", "List-Id": "linux-imx-kernel.lists.patchwork.ozlabs.org" }, "content": "From: Jingchang Lu <b35083@freescale.com>\n\nFreescale LS1021A SoCs deploy two cortex-A7 processors,\nthis adds bring-up support for the secondary core.\n\nSigned-off-by: Jingchang Lu <b35083@freescale.com>\n---\n arch/arm/mach-imx/Makefile | 2 +-\n arch/arm/mach-imx/common.h | 1 +\n arch/arm/mach-imx/mach-ls1021a.c | 1 +\n arch/arm/mach-imx/platsmp.c | 32 ++++++++++++++++++++++++++++++++\n 4 files changed, 35 insertions(+), 1 deletion(-)", "diff": "diff --git a/arch/arm/mach-imx/Makefile b/arch/arm/mach-imx/Makefile\nindex 3e12532..e1e59de 100644\n--- a/arch/arm/mach-imx/Makefile\n+++ b/arch/arm/mach-imx/Makefile\n@@ -90,7 +90,7 @@ obj-$(CONFIG_HAVE_IMX_ANATOP) += anatop.o\n obj-$(CONFIG_HAVE_IMX_GPC) += gpc.o\n obj-$(CONFIG_HAVE_IMX_MMDC) += mmdc.o\n obj-$(CONFIG_HAVE_IMX_SRC) += src.o\n-ifdef CONFIG_SOC_IMX6\n+ifneq ($(CONFIG_SOC_IMX6)$(CONFIG_SOC_LS1021A),)\n AFLAGS_headsmp.o :=-Wa,-march=armv7-a\n obj-$(CONFIG_SMP) += headsmp.o platsmp.o\n obj-$(CONFIG_HOTPLUG_CPU) += hotplug.o\ndiff --git a/arch/arm/mach-imx/common.h b/arch/arm/mach-imx/common.h\nindex 1dabf43..c473ca5 100644\n--- a/arch/arm/mach-imx/common.h\n+++ b/arch/arm/mach-imx/common.h\n@@ -157,5 +157,6 @@ static inline void imx_init_l2cache(void) {}\n #endif\n \n extern struct smp_operations imx_smp_ops;\n+extern struct smp_operations ls1021a_smp_ops;\n \n #endif\ndiff --git a/arch/arm/mach-imx/mach-ls1021a.c b/arch/arm/mach-imx/mach-ls1021a.c\nindex 2ffc20f..d284cdb 100644\n--- a/arch/arm/mach-imx/mach-ls1021a.c\n+++ b/arch/arm/mach-imx/mach-ls1021a.c\n@@ -27,6 +27,7 @@ DT_MACHINE_START(LS1021A, \"Freescale LS1021A\")\n #ifdef CONFIG_ZONE_DMA\n \t.dma_zone_size\t= SZ_128M,\n #endif\n+\t.smp\t\t= smp_ops(ls1021a_smp_ops),\n \t.init_machine = ls1021a_init_machine,\n \t.dt_compat\t= ls1021a_dt_compat,\n \t.restart\t= mxc_restart,\ndiff --git a/arch/arm/mach-imx/platsmp.c b/arch/arm/mach-imx/platsmp.c\nindex 771bd25..62376f0 100644\n--- a/arch/arm/mach-imx/platsmp.c\n+++ b/arch/arm/mach-imx/platsmp.c\n@@ -16,6 +16,8 @@\n #include <asm/page.h>\n #include <asm/smp_scu.h>\n #include <asm/mach/map.h>\n+#include <linux/of.h>\n+#include <linux/of_address.h>\n \n #include \"common.h\"\n #include \"hardware.h\"\n@@ -94,3 +96,33 @@ struct smp_operations imx_smp_ops __initdata = {\n \t.cpu_kill\t\t= imx_cpu_kill,\n #endif\n };\n+\n+#define DCFG_CCSR_SCRATCHRW1\t0x200\n+\n+static int ls1021a_boot_secondary(unsigned int cpu, struct task_struct *idle)\n+{\n+\tarch_send_wakeup_ipi_mask(cpumask_of(cpu));\n+\n+\treturn 0;\n+}\n+\n+static void __init ls1021a_smp_prepare_cpus(unsigned int max_cpus)\n+{\n+\tstruct device_node *np;\n+\tvoid __iomem *dcfg_base;\n+\tunsigned long paddr;\n+\n+\tnp = of_find_compatible_node(NULL, NULL, \"fsl,ls1021a-dcfg\");\n+\tdcfg_base = of_iomap(np, 0);\n+\tBUG_ON(!dcfg_base);\n+\n+\tpaddr = virt_to_phys(secondary_startup);\n+\twritel_relaxed(cpu_to_be32(paddr), dcfg_base + DCFG_CCSR_SCRATCHRW1);\n+\n+\tiounmap(dcfg_base);\n+}\n+\n+struct smp_operations ls1021a_smp_ops __initdata = {\n+\t.smp_prepare_cpus\t= ls1021a_smp_prepare_cpus,\n+\t.smp_boot_secondary\t= ls1021a_boot_secondary,\n+};\n", "prefixes": [ "PATCHv3", "6/6" ] }