Patch Detail
get:
Show a patch.
patch:
Update a patch.
put:
Update a patch.
GET /api/patches/386144/?format=api
{ "id": 386144, "url": "http://patchwork.ozlabs.org/api/patches/386144/?format=api", "web_url": "http://patchwork.ozlabs.org/project/uboot/patch/1409895853-17736-18-git-send-email-alison.wang@freescale.com/", "project": { "id": 18, "url": "http://patchwork.ozlabs.org/api/projects/18/?format=api", "name": "U-Boot", "link_name": "uboot", "list_id": "u-boot.lists.denx.de", "list_email": "u-boot@lists.denx.de", "web_url": null, "scm_url": null, "webscm_url": null, "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<1409895853-17736-18-git-send-email-alison.wang@freescale.com>", "list_archive_url": null, "date": "2014-09-05T05:44:13", "name": "[U-Boot,v6,17/17] ls102xa: dcu: Add platform support for DCU on LS1021ATWR board", "commit_ref": null, "pull_url": null, "state": "accepted", "archived": false, "hash": "9662528fb8756a6d978e15f678894577337f4663", "submitter": { "id": 64046, "url": "http://patchwork.ozlabs.org/api/people/64046/?format=api", "name": "alison wang", "email": "Alison.Wang@freescale.com" }, "delegate": { "id": 2666, "url": "http://patchwork.ozlabs.org/api/users/2666/?format=api", "username": "yorksun", "first_name": "York", "last_name": "Sun", "email": "yorksun@freescale.com" }, "mbox": "http://patchwork.ozlabs.org/project/uboot/patch/1409895853-17736-18-git-send-email-alison.wang@freescale.com/mbox/", "series": [], "comments": "http://patchwork.ozlabs.org/api/patches/386144/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/386144/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<u-boot-bounces@lists.denx.de>", "X-Original-To": "incoming@patchwork.ozlabs.org", "Delivered-To": "patchwork-incoming@bilbo.ozlabs.org", "Received": [ "from theia.denx.de (theia.denx.de [85.214.87.163])\n\tby ozlabs.org (Postfix) with ESMTP id F2FD71400BB\n\tfor <incoming@patchwork.ozlabs.org>;\n\tFri, 5 Sep 2014 16:51:26 +1000 (EST)", "from localhost (localhost [127.0.0.1])\n\tby theia.denx.de (Postfix) with ESMTP id 0585AA772B;\n\tFri, 5 Sep 2014 08:51:22 +0200 (CEST)", "from theia.denx.de ([127.0.0.1])\n\tby localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024)\n\twith ESMTP id MBzq1OLq3gU0; Fri, 5 Sep 2014 08:51:21 +0200 (CEST)", "from theia.denx.de (localhost [127.0.0.1])\n\tby theia.denx.de (Postfix) with ESMTP id CB963A7759;\n\tFri, 5 Sep 2014 08:51:14 +0200 (CEST)", "from localhost (localhost [127.0.0.1])\n\tby theia.denx.de (Postfix) with ESMTP id BCF7DA754B\n\tfor <u-boot@lists.denx.de>; Fri, 5 Sep 2014 08:51:07 +0200 (CEST)", "from theia.denx.de ([127.0.0.1])\n\tby localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024)\n\twith ESMTP id fJ21EMtekuar for <u-boot@lists.denx.de>;\n\tFri, 5 Sep 2014 08:51:07 +0200 (CEST)", "from na01-bn1-obe.outbound.protection.outlook.com\n\t(mail-bn1bon0134.outbound.protection.outlook.com [157.56.111.134])\n\tby theia.denx.de (Postfix) with ESMTPS id 87BC0A76BF\n\tfor <u-boot@lists.denx.de>; Fri, 5 Sep 2014 08:50:58 +0200 (CEST)", "from BN3PR0301CA0069.namprd03.prod.outlook.com (25.160.152.165) by\n\tBLUPR03MB375.namprd03.prod.outlook.com (10.141.75.149) with\n\tMicrosoft\n\tSMTP Server (TLS) id 15.0.1019.16; Fri, 5 Sep 2014 06:36:16 +0000", "from BN1AFFO11FD057.protection.gbl (2a01:111:f400:7c10::165) by\n\tBN3PR0301CA0069.outlook.office365.com (2a01:111:e400:401e::37) with\n\tMicrosoft SMTP Server (TLS) id 15.0.1019.16 via Frontend Transport;\n\tFri, 5 Sep 2014 06:36:16 +0000", "from az84smr01.freescale.net (192.88.158.2) by\n\tBN1AFFO11FD057.mail.protection.outlook.com (10.58.53.72) with\n\tMicrosoft SMTP Server (TLS) id 15.0.1010.11 via Frontend Transport;\n\tFri, 5 Sep 2014 06:36:16 +0000", "from rock.ap.freescale.net (rock.ap.freescale.net [10.193.20.106])\n\tby az84smr01.freescale.net (8.14.3/8.14.0) with ESMTP id\n\ts856ZdSw015666; Thu, 4 Sep 2014 23:36:14 -0700" ], "X-Virus-Scanned": [ "Debian amavisd-new at theia.denx.de", "Debian amavisd-new at theia.denx.de" ], "X-policyd-weight": "NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5\n\tNOT_IN_BL_NJABL=-1.5 (only DNSBL check requested)", "From": "Alison Wang <alison.wang@freescale.com>", "To": "<yorksun@freescale.com>, <u-boot@lists.denx.de>", "Date": "Fri, 5 Sep 2014 13:44:13 +0800", "Message-ID": "<1409895853-17736-18-git-send-email-alison.wang@freescale.com>", "X-Mailer": "git-send-email 1.8.4", "In-Reply-To": "<1409895853-17736-1-git-send-email-alison.wang@freescale.com>", "References": "<1409895853-17736-1-git-send-email-alison.wang@freescale.com>", "X-EOPAttributedMessage": "0", "X-Forefront-Antispam-Report": "CIP:192.88.158.2; CTRY:US; IPV:CAL; IPV:NLI;\n\tEFV:NLI; SFV:NSPM;\n\tSFS:(10019016)(6009001)(199003)(54534003)(189002)(81542001)(86362001)(19580405001)(99396002)(33646002)(64706001)(6806004)(36756003)(85852003)(92726001)(44976005)(76176999)(93916002)(83072002)(4396001)(48376002)(31966008)(50986999)(50226001)(50466002)(74662001)(74502001)(21056001)(88136002)(89996001)(81342001)(87936001)(92566001)(79102001)(106466001)(69596002)(76482001)(81156004)(105606002)(62966002)(19580395003)(107046002)(83322001)(90102001)(104166001)(84676001)(77982001)(77156001)(85306004)(47776003)(104016003)(26826002)(97736001)(102836001)(20776003)(87286001)(46102001)(68736004)(95666004)(80022001)(229853001);\n\tDIR:OUT; SFP:1102; SCL:1; SRVR:BLUPR03MB375;\n\tH:az84smr01.freescale.net; FPR:; MLV:ovrnspm;\n\tPTR:InfoDomainNonexistent; A:1; MX:1; LANG:en; ", "MIME-Version": "1.0", "X-Microsoft-Antispam": "BCL:0;PCL:0;RULEID:;UriScan:;", "X-Forefront-PRVS": "0325F6C77B", "Received-SPF": "Fail (protection.outlook.com: domain of freescale.com does not\n\tdesignate 192.88.158.2 as permitted sender)\n\treceiver=protection.outlook.com; \n\tclient-ip=192.88.158.2; helo=az84smr01.freescale.net;", "Authentication-Results": "spf=fail (sender IP is 192.88.158.2)\n\tsmtp.mailfrom=alison.wang@freescale.com; ", "X-OriginatorOrg": "freescale.com", "Subject": "[U-Boot] [PATCH v6 17/17] ls102xa: dcu: Add platform support for\n\tDCU on LS1021ATWR board", "X-BeenThere": "u-boot@lists.denx.de", "X-Mailman-Version": "2.1.11", "Precedence": "list", "List-Id": "U-Boot discussion <u-boot.lists.denx.de>", "List-Unsubscribe": "<http://lists.denx.de/mailman/options/u-boot>,\n\t<mailto:u-boot-request@lists.denx.de?subject=unsubscribe>", "List-Archive": "<http://lists.denx.de/pipermail/u-boot>", "List-Post": "<mailto:u-boot@lists.denx.de>", "List-Help": "<mailto:u-boot-request@lists.denx.de?subject=help>", "List-Subscribe": "<http://lists.denx.de/mailman/listinfo/u-boot>,\n\t<mailto:u-boot-request@lists.denx.de?subject=subscribe>", "Content-Type": "text/plain; charset=\"us-ascii\"", "Content-Transfer-Encoding": "7bit", "Sender": "u-boot-bounces@lists.denx.de", "Errors-To": "u-boot-bounces@lists.denx.de" }, "content": "From: Wang Huan <b18965@freescale.com>\n\nThis patch adds the TWR_LCD_RGB card/HDMI options and the common\nconfiguration for DCU on LS1021ATWR board.\n\nSigned-off-by: Alison Wang <alison.wang@freescale.com>\n---\nChange log:\n v6: Use #define instead of magic numbers.\n v5: Change the patch order.\n v4: Add commit messages.\n v3: New file.\n\n board/freescale/ls1021atwr/Makefile | 1 +\n board/freescale/ls1021atwr/dcu.c | 47 +++++++++++++++++++++++++++++++++\n board/freescale/ls1021atwr/ls1021atwr.c | 6 +++++\n include/configs/ls1021atwr.h | 18 +++++++++++++\n 4 files changed, 72 insertions(+)\n create mode 100644 board/freescale/ls1021atwr/dcu.c", "diff": "diff --git a/board/freescale/ls1021atwr/Makefile b/board/freescale/ls1021atwr/Makefile\nindex b5df668..01296c0 100644\n--- a/board/freescale/ls1021atwr/Makefile\n+++ b/board/freescale/ls1021atwr/Makefile\n@@ -5,3 +5,4 @@\n #\n \n obj-y += ls1021atwr.o\n+obj-$(CONFIG_FSL_DCU_FB) += dcu.o\ndiff --git a/board/freescale/ls1021atwr/dcu.c b/board/freescale/ls1021atwr/dcu.c\nnew file mode 100644\nindex 0000000..8fe4ccb\n--- /dev/null\n+++ b/board/freescale/ls1021atwr/dcu.c\n@@ -0,0 +1,47 @@\n+/*\n+ * Copyright 2014 Freescale Semiconductor, Inc.\n+ *\n+ * FSL DCU Framebuffer driver\n+ *\n+ * SPDX-License-Identifier:\tGPL-2.0+\n+ */\n+\n+#include <common.h>\n+#include <fsl_dcu_fb.h>\n+#include \"div64.h\"\n+#include \"../common/dcu_sii9022a.h\"\n+\n+DECLARE_GLOBAL_DATA_PTR;\n+\n+unsigned int dcu_set_pixel_clock(unsigned int pixclock)\n+{\n+\tunsigned long long div;\n+\n+\tdiv = (unsigned long long)(gd->bus_clk / 1000);\n+\tdiv *= (unsigned long long)pixclock;\n+\tdo_div(div, 1000000000);\n+\n+\treturn div;\n+}\n+\n+int platform_dcu_init(unsigned int xres, unsigned int yres,\n+\t\t const char *port,\n+\t\t struct fb_videomode *dcu_fb_videomode)\n+{\n+\tconst char *name;\n+\tunsigned int pixel_format;\n+\n+\tif (strncmp(port, \"twr_lcd\", 4) == 0) {\n+\t\tname = \"TWR_LCD_RGB card\";\n+\t} else {\n+\t\tname = \"HDMI\";\n+\t\tdcu_set_dvi_encoder(dcu_fb_videomode);\n+\t}\n+\n+\tprintf(\"DCU: Switching to %s monitor @ %ux%u\\n\", name, xres, yres);\n+\n+\tpixel_format = 32;\n+\tfsl_dcu_init(xres, yres, pixel_format);\n+\n+\treturn 0;\n+}\ndiff --git a/board/freescale/ls1021atwr/ls1021atwr.c b/board/freescale/ls1021atwr/ls1021atwr.c\nindex 92ad8cd..b522ff2 100644\n--- a/board/freescale/ls1021atwr/ls1021atwr.c\n+++ b/board/freescale/ls1021atwr/ls1021atwr.c\n@@ -261,6 +261,12 @@ int board_early_init_f(void)\n \tinit_early_memctl_regs();\n #endif\n \n+#ifdef CONFIG_FSL_DCU_FB\n+\tout_be32(&scfg->scfgrevcr, SCFG_SCFGREVCR_REV);\n+\tout_be32(&scfg->pixclkcr, SCFG_PIXCLKCR_PXCKEN);\n+\tout_be32(&scfg->scfgrevcr, SCFG_SCFGREVCR_NOREV);\n+#endif\n+\n \treturn 0;\n }\n \ndiff --git a/include/configs/ls1021atwr.h b/include/configs/ls1021atwr.h\nindex cb6b400..45b2272 100644\n--- a/include/configs/ls1021atwr.h\n+++ b/include/configs/ls1021atwr.h\n@@ -163,6 +163,24 @@\n #define CONFIG_GENERIC_MMC\n \n /*\n+ * Video\n+ */\n+#define CONFIG_FSL_DCU_FB\n+\n+#ifdef CONFIG_FSL_DCU_FB\n+#define CONFIG_VIDEO\n+#define CONFIG_CMD_BMP\n+#define CONFIG_CFB_CONSOLE\n+#define CONFIG_VGA_AS_SINGLE_DEVICE\n+#define CONFIG_VIDEO_LOGO\n+#define CONFIG_VIDEO_BMP_LOGO\n+\n+#define CONFIG_FSL_DCU_SII9022A\n+#define CONFIG_SYS_I2C_DVI_BUS_NUM\t1\n+#define CONFIG_SYS_I2C_DVI_ADDR\t\t0x39\n+#endif\n+\n+/*\n * eTSEC\n */\n #define CONFIG_TSEC_ENET\n", "prefixes": [ "U-Boot", "v6", "17/17" ] }