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GET /api/patches/368962/?format=api
{ "id": 368962, "url": "http://patchwork.ozlabs.org/api/patches/368962/?format=api", "web_url": "http://patchwork.ozlabs.org/project/uboot/patch/1405054046-19791-2-git-send-email-b18965@freescale.com/", "project": { "id": 18, "url": "http://patchwork.ozlabs.org/api/projects/18/?format=api", "name": "U-Boot", "link_name": "uboot", "list_id": "u-boot.lists.denx.de", "list_email": "u-boot@lists.denx.de", "web_url": null, "scm_url": null, "webscm_url": null, "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<1405054046-19791-2-git-send-email-b18965@freescale.com>", "list_archive_url": null, "date": "2014-07-11T04:47:25", "name": "[U-Boot,1/2] arm: ls102xa: Add SD boot support for LS1021AQDS board", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": false, "hash": "aaffbfc180e3ca5a956932e080a176df2e4ff4a1", "submitter": { "id": 13010, "url": "http://patchwork.ozlabs.org/api/people/13010/?format=api", "name": "Alison Wang", "email": "b18965@freescale.com" }, "delegate": { "id": 2666, "url": "http://patchwork.ozlabs.org/api/users/2666/?format=api", "username": "yorksun", "first_name": "York", "last_name": "Sun", "email": "yorksun@freescale.com" }, "mbox": "http://patchwork.ozlabs.org/project/uboot/patch/1405054046-19791-2-git-send-email-b18965@freescale.com/mbox/", "series": [], "comments": "http://patchwork.ozlabs.org/api/patches/368962/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/368962/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<u-boot-bounces@lists.denx.de>", "X-Original-To": "incoming@patchwork.ozlabs.org", "Delivered-To": "patchwork-incoming@bilbo.ozlabs.org", "Received": [ "from theia.denx.de (theia.denx.de [85.214.87.163])\n\tby ozlabs.org (Postfix) with ESMTP id C3132140085\n\tfor <incoming@patchwork.ozlabs.org>;\n\tFri, 11 Jul 2014 15:34:03 +1000 (EST)", "from localhost (localhost [127.0.0.1])\n\tby theia.denx.de (Postfix) with ESMTP id C6B7FA79C9;\n\tFri, 11 Jul 2014 07:34:00 +0200 (CEST)", "from theia.denx.de ([127.0.0.1])\n\tby localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024)\n\twith ESMTP id 5fl1uTGi6EEg; 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Fri, 11 Jul 2014 05:33:40 +0000", "from BY2FFO11FD039.protection.gbl (10.255.156.132) by\n\tCH1PR03CA004.outlook.office365.com (10.255.156.149) with Microsoft\n\tSMTP Server (TLS) id 15.0.985.8 via Frontend Transport;\n\tFri, 11 Jul 2014 05:33:40 +0000", "from az84smr01.freescale.net (192.88.158.2) by\n\tBY2FFO11FD039.mail.protection.outlook.com (10.1.14.224) with\n\tMicrosoft SMTP Server (TLS) id 15.0.980.11 via Frontend Transport;\n\tFri, 11 Jul 2014 05:33:39 +0000", "from rock.ap.freescale.net (rock.ap.freescale.net [10.193.20.106])\n\tby az84smr01.freescale.net (8.14.3/8.14.0) with ESMTP id\n\ts6B5XVgX028996; Thu, 10 Jul 2014 22:33:37 -0700" ], "X-Virus-Scanned": [ "Debian amavisd-new at theia.denx.de", "Debian amavisd-new at theia.denx.de" ], "X-policyd-weight": "NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5\n\tNOT_IN_BL_NJABL=-1.5 (only DNSBL check requested)", "From": "Alison Wang <b18965@freescale.com>", "To": "<albert.u.boot@aribaud.net>, <u-boot@lists.denx.de>", "Date": "Fri, 11 Jul 2014 12:47:25 +0800", "Message-ID": "<1405054046-19791-2-git-send-email-b18965@freescale.com>", "X-Mailer": "git-send-email 1.8.0", "In-Reply-To": "<1405054046-19791-1-git-send-email-b18965@freescale.com>", "References": "<1405054046-19791-1-git-send-email-b18965@freescale.com>", "X-EOPAttributedMessage": "0", "X-Forefront-Antispam-Report": "CIP:192.88.158.2; CTRY:US; IPV:CAL; IPV:NLI;\n\tEFV:NLI; SFV:NSPM;\n\tSFS:(6009001)(199002)(189002)(106466001)(64706001)(74502001)(20776003)(92566001)(47776003)(74662001)(31966008)(107046002)(95666004)(33646001)(81156004)(62966002)(229853001)(92726001)(21056001)(85306003)(6806004)(104016003)(83322001)(19580395003)(97736001)(88136002)(83072002)(105606002)(50986999)(81542001)(81342001)(89996001)(93916002)(50466002)(85852003)(87286001)(84676001)(87936001)(44976005)(69596002)(68736004)(99396002)(77982001)(50226001)(19580405001)(46102001)(4396001)(36756003)(77156001)(80022001)(76482001)(76176999)(79102001)(102836001)(48376002)(104166001)(26826002)(42262001)(473944003);\n\tDIR:OUT; SFP:; SCL:1; SRVR:BN1PR0301MB0690;\n\tH:az84smr01.freescale.net; FPR:; MLV:ovrnspm;\n\tPTR:InfoDomainNonexistent; MX:1; LANG:en; ", "MIME-Version": "1.0", "X-Microsoft-Antispam": [ "BCL:0;PCL:0;RULEID:", "BCL:0;PCL:0;RULEID:" ], "X-Forefront-PRVS": "02698DF457", "Received-SPF": "Fail (: domain of freescale.com does not designate 192.88.158.2\n\tas permitted sender) receiver=; client-ip=192.88.158.2;\n\thelo=az84smr01.freescale.net;", "Authentication-Results": "spf=fail (sender IP is 192.88.158.2)\n\tsmtp.mailfrom=alison.wang@freescale.com; ", "X-OriginatorOrg": "freescale.com", "Cc": "fabio.estevam@freescale.com, yorksun@freescale.com,\n\tAlison Wang <alison.wang@freescale.com>", "Subject": "[U-Boot] [PATCH 1/2] arm: ls102xa: Add SD boot support for\n\tLS1021AQDS board", "X-BeenThere": "u-boot@lists.denx.de", "X-Mailman-Version": "2.1.11", "Precedence": "list", "List-Id": "U-Boot discussion <u-boot.lists.denx.de>", "List-Unsubscribe": "<http://lists.denx.de/mailman/options/u-boot>,\n\t<mailto:u-boot-request@lists.denx.de?subject=unsubscribe>", "List-Archive": "<http://lists.denx.de/pipermail/u-boot>", "List-Post": "<mailto:u-boot@lists.denx.de>", "List-Help": "<mailto:u-boot-request@lists.denx.de?subject=help>", "List-Subscribe": "<http://lists.denx.de/mailman/listinfo/u-boot>,\n\t<mailto:u-boot-request@lists.denx.de?subject=subscribe>", "Content-Type": "text/plain; charset=\"us-ascii\"", "Content-Transfer-Encoding": "7bit", "Sender": "u-boot-bounces@lists.denx.de", "Errors-To": "u-boot-bounces@lists.denx.de" }, "content": "This patch adds SD boot support for LS1021AQDS board. SPL\nframework is used. PBL initialize the internal RAM and copy\nSPL to it, then SPL initialize DDR using SPD and copy u-boot\nfrom SD card to DDR, finally SPL transfer control to u-boot.\n\nSigned-off-by: Alison Wang <alison.wang@freescale.com>\nSigned-off-by: Jason Jin <jason.jin@freescale.com>\n---\n Makefile | 15 ++++-\n arch/arm/cpu/armv7/ls102xa/Makefile | 1 +\n arch/arm/cpu/armv7/ls102xa/spl.c | 35 +++++++++++\n arch/arm/cpu/armv7/ls102xa/u-boot-spl.lds | 83 +++++++++++++++++++++++++++\n arch/arm/include/asm/arch-ls102xa/spl.h | 20 +++++++\n board/freescale/common/qixis.h | 7 +++\n board/freescale/ls1021aqds/ddr.c | 5 +-\n board/freescale/ls1021aqds/ls1021aqds.c | 31 ++++++++++\n board/freescale/ls1021aqds/ls102xa_pbi.cfg | 8 +++\n board/freescale/ls1021aqds/ls102xa_rcw_sd.cfg | 14 +++++\n boards.cfg | 1 +\n common/spl/spl_mmc.c | 2 +\n include/configs/ls1021aqds.h | 64 +++++++++++++++++++++\n tools/pblimage.c | 20 +++++--\n 14 files changed, 300 insertions(+), 6 deletions(-)\n create mode 100644 arch/arm/cpu/armv7/ls102xa/spl.c\n create mode 100644 arch/arm/cpu/armv7/ls102xa/u-boot-spl.lds\n create mode 100644 arch/arm/include/asm/arch-ls102xa/spl.h\n create mode 100644 board/freescale/ls1021aqds/ls102xa_pbi.cfg\n create mode 100644 board/freescale/ls1021aqds/ls102xa_rcw_sd.cfg", "diff": "diff --git a/Makefile b/Makefile\nindex b8cce74..760e8b0 100644\n--- a/Makefile\n+++ b/Makefile\n@@ -711,6 +711,7 @@ ALL-y += u-boot.srec u-boot.bin System.map binary_size_check\n ALL-$(CONFIG_ONENAND_U_BOOT) += u-boot-onenand.bin\n ifeq ($(CONFIG_SPL_FSL_PBL),y)\n ALL-$(CONFIG_RAMBOOT_PBL) += u-boot-with-spl-pbl.bin\n+ALL-$(CONFIG_SPL_PBL_PAD) += spl/u-boot-spl-pbl-pad.bin\n else\n ALL-$(CONFIG_RAMBOOT_PBL) += u-boot.pbl\n endif\n@@ -936,13 +937,25 @@ endif\n u-boot-img.bin: spl/u-boot-spl.bin u-boot.img FORCE\n \t$(call if_changed,cat)\n \n+OBJCOPYFLAGS_u-boot-spl-pbl-pad.bin = -I binary -O binary --pad-to=$(CONFIG_SPL_MAX_SIZE) \\\n+\t--gap-fill=0xff\n+\n+spl/u-boot-spl-pbl-pad.bin: spl/u-boot-spl.bin FORCE\n+\t$(call if_changed,pad_cat)\n+\n+ifdef CONFIG_SPL_PBL_PAD\n+SPLPBL_BINLOAD := spl/u-boot-spl-pbl-pad.bin\n+else\n+SPLPBL_BINLOAD := spl/u-boot-spl.bin\n+endif\n+\n #Add a target to create boot binary having SPL binary in PBI format\n #concatenated with u-boot binary. It is need by PowerPC SoC having\n #internal SRAM <= 512KB.\n MKIMAGEFLAGS_u-boot-spl.pbl = -n $(srctree)/$(CONFIG_SYS_FSL_PBL_RCW:\"%\"=%) \\\n \t\t-R $(srctree)/$(CONFIG_SYS_FSL_PBL_PBI:\"%\"=%) -T pblimage\n \n-spl/u-boot-spl.pbl: spl/u-boot-spl.bin FORCE\n+spl/u-boot-spl.pbl: $(SPLPBL_BINLOAD) FORCE\n \t$(call if_changed,mkimage)\n \n OBJCOPYFLAGS_u-boot-with-spl-pbl.bin = -I binary -O binary --pad-to=$(CONFIG_SPL_PAD_TO) \\\ndiff --git a/arch/arm/cpu/armv7/ls102xa/Makefile b/arch/arm/cpu/armv7/ls102xa/Makefile\nindex d82ce8d..56ef3a7 100644\n--- a/arch/arm/cpu/armv7/ls102xa/Makefile\n+++ b/arch/arm/cpu/armv7/ls102xa/Makefile\n@@ -10,3 +10,4 @@ obj-y\t+= timer.o\n \n obj-$(CONFIG_OF_LIBFDT) += fdt.o\n obj-$(CONFIG_SYS_HAS_SERDES) += fsl_ls1_serdes.o ls102xa_serdes.o\n+obj-$(CONFIG_SPL) += spl.o\ndiff --git a/arch/arm/cpu/armv7/ls102xa/spl.c b/arch/arm/cpu/armv7/ls102xa/spl.c\nnew file mode 100644\nindex 0000000..77ea1ee\n--- /dev/null\n+++ b/arch/arm/cpu/armv7/ls102xa/spl.c\n@@ -0,0 +1,35 @@\n+/*\n+ * Copyright 2014 Freescale Semiconductor, Inc.\n+ *\n+ * SPDX-License-Identifier:\tGPL-2.0+\n+ */\n+\n+#include <common.h>\n+#include <spl.h>\n+\n+u32 spl_boot_device(void)\n+{\n+#ifdef CONFIG_SPL_MMC_SUPPORT\n+\treturn BOOT_DEVICE_MMC1;\n+#endif\n+\treturn BOOT_DEVICE_NAND;\n+}\n+\n+u32 spl_boot_mode(void)\n+{\n+\tswitch (spl_boot_device()) {\n+\tcase BOOT_DEVICE_MMC1:\n+#ifdef CONFIG_SPL_FAT_SUPPORT\n+\t\treturn MMCSD_MODE_FAT;\n+#else\n+\t\treturn MMCSD_MODE_RAW;\n+#endif\n+\t\tbreak;\n+\tcase BOOT_DEVICE_NAND:\n+\t\treturn 0;\n+\t\tbreak;\n+\tdefault:\n+\t\tputs(\"spl: error: unsupported device\\n\");\n+\t\thang();\n+\t}\n+}\ndiff --git a/arch/arm/cpu/armv7/ls102xa/u-boot-spl.lds b/arch/arm/cpu/armv7/ls102xa/u-boot-spl.lds\nnew file mode 100644\nindex 0000000..86cbc6b\n--- /dev/null\n+++ b/arch/arm/cpu/armv7/ls102xa/u-boot-spl.lds\n@@ -0,0 +1,83 @@\n+/*\n+ * Copyright (c) 2004-2008 Texas Instruments\n+ *\n+ * (C) Copyright 2002\n+ * Gary Jennejohn, DENX Software Engineering, <garyj@denx.de>\n+ *\n+ * Copyright 2014 Freescale Semiconductor, Inc.\n+ *\n+ * SPDX-License-Identifier:\tGPL-2.0+\n+ */\n+\n+OUTPUT_FORMAT(\"elf32-littlearm\", \"elf32-littlearm\", \"elf32-littlearm\")\n+OUTPUT_ARCH(arm)\n+ENTRY(_start)\n+SECTIONS\n+{\n+\t. = 0x00000000;\n+\n+\t. = ALIGN(4);\n+\t.text :\n+\t{\n+\t\t__image_copy_start = .;\n+\t\tCPUDIR/start.o (.text*)\n+\t\t*(.text*)\n+\t}\n+\n+\t. = ALIGN(4);\n+\t.rodata : { *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) }\n+\n+\t. = ALIGN(4);\n+\t.data : {\n+\t\t*(.data*)\n+\t}\n+\n+\t. = ALIGN(4);\n+\t.u_boot_list : {\n+\t\tKEEP(*(SORT(.u_boot_list*_i2c_*)));\n+\t}\n+\n+\t. = .;\n+\n+\t__image_copy_end = .;\n+\n+\t.rel.dyn : {\n+\t\t__rel_dyn_start = .;\n+\t\t*(.rel*)\n+\t\t__rel_dyn_end = .;\n+\t}\n+\n+\t_end = .;\n+\n+\t.bss __rel_dyn_start (OVERLAY) : {\n+\t\t__bss_start = .;\n+\t\t*(.bss*)\n+\t\t . = ALIGN(4);\n+\t\t__bss_end = .;\n+\t}\n+\n+\t.dynsym _end : { *(.dynsym) }\n+\t.dynbss : { *(.dynbss) }\n+\t.dynstr : { *(.dynstr*) }\n+\t.dynamic : { *(.dynamic*) }\n+\t.hash : { *(.hash*) }\n+\t.plt : { *(.plt*) }\n+\t.interp : { *(.interp*) }\n+\t.gnu : { *(.gnu*) }\n+\t.ARM.exidx : { *(.ARM.exidx*) }\n+}\n+\n+#if defined(CONFIG_SPL_MAX_SIZE)\n+ASSERT(__image_copy_end - __image_copy_start < (CONFIG_SPL_MAX_SIZE), \\\n+\t\"SPL image too big\");\n+#endif\n+\n+#if defined(CONFIG_SPL_BSS_MAX_SIZE)\n+ASSERT(__bss_end - __bss_start < (CONFIG_SPL_BSS_MAX_SIZE), \\\n+\t\"SPL image BSS too big\");\n+#endif\n+\n+#if defined(CONFIG_SPL_MAX_FOOTPRINT)\n+ASSERT(__bss_end - _start < (CONFIG_SPL_MAX_FOOTPRINT), \\\n+\t\"SPL image plus BSS too big\");\n+#endif\ndiff --git a/arch/arm/include/asm/arch-ls102xa/spl.h b/arch/arm/include/asm/arch-ls102xa/spl.h\nnew file mode 100644\nindex 0000000..26e4ea1\n--- /dev/null\n+++ b/arch/arm/include/asm/arch-ls102xa/spl.h\n@@ -0,0 +1,20 @@\n+/*\n+ * Copyright 2014 Freescale Semiconductor, Inc.\n+ *\n+ * SPDX-License-Identifier:\tGPL-2.0+\n+ */\n+\n+#ifndef __ASM_ARCH_SPL_H__\n+#define __ASM_ARCH_SPL_H__\n+\n+#define BOOT_DEVICE_NONE\t0\n+#define BOOT_DEVICE_XIP\t\t1\n+#define BOOT_DEVICE_XIPWAIT\t2\n+#define BOOT_DEVICE_NAND\t3\n+#define BOOT_DEVICE_ONENAND\t4\n+#define BOOT_DEVICE_MMC1\t5\n+#define BOOT_DEVICE_MMC2\t6\n+#define BOOT_DEVICE_MMC2_2\t7\n+#define BOOT_DEVICE_SPI\t\t10\n+\n+#endif\t/* __ASM_ARCH_SPL_H__ */\ndiff --git a/board/freescale/common/qixis.h b/board/freescale/common/qixis.h\nindex d8fed14..204a3bd 100644\n--- a/board/freescale/common/qixis.h\n+++ b/board/freescale/common/qixis.h\n@@ -100,8 +100,15 @@ u8 qixis_read_i2c(unsigned int reg);\n void qixis_write_i2c(unsigned int reg, u8 value);\n #endif\n \n+#if defined(CONFIG_QIXIS_I2C_ACCESS) && defined(CONFIG_SYS_I2C_FPGA_ADDR)\n+#define QIXIS_READ(reg) qixis_read_i2c(offsetof(struct qixis, reg))\n+#define QIXIS_WRITE(reg, value) \\\n+\t\t\tqixis_write_i2c(offsetof(struct qixis, reg), value)\n+#else\n #define QIXIS_READ(reg) qixis_read(offsetof(struct qixis, reg))\n #define QIXIS_WRITE(reg, value) qixis_write(offsetof(struct qixis, reg), value)\n+#endif\n+\n #ifdef CONFIG_SYS_I2C_FPGA_ADDR\n #define QIXIS_READ_I2C(reg) qixis_read_i2c(offsetof(struct qixis, reg))\n #define QIXIS_WRITE_I2C(reg, value) \\\ndiff --git a/board/freescale/ls1021aqds/ddr.c b/board/freescale/ls1021aqds/ddr.c\nindex bf05e34..5da85aa 100644\n--- a/board/freescale/ls1021aqds/ddr.c\n+++ b/board/freescale/ls1021aqds/ddr.c\n@@ -156,9 +156,12 @@ phys_size_t initdram(int board_type)\n {\n \tphys_size_t dram_size;\n \n+#if defined(CONFIG_SPL_BUILD) || !defined(CONFIG_SPL)\n \tputs(\"Initializing DDR....using SPD\\n\");\n \tdram_size = fsl_ddr_sdram();\n-\n+#else\n+\tdram_size = fsl_ddr_sdram_size();\n+#endif\n \treturn dram_size;\n }\n \ndiff --git a/board/freescale/ls1021aqds/ls1021aqds.c b/board/freescale/ls1021aqds/ls1021aqds.c\nindex e8b3a82..3005975 100644\n--- a/board/freescale/ls1021aqds/ls1021aqds.c\n+++ b/board/freescale/ls1021aqds/ls1021aqds.c\n@@ -13,6 +13,7 @@\n #include <mmc.h>\n #include <fsl_esdhc.h>\n #include <fsl_ifc.h>\n+#include <spl.h>\n \n #include \"../common/qixis.h\"\n #include \"ls1021aqds_qixis.h\"\n@@ -29,10 +30,13 @@ enum {\n int checkboard(void)\n {\n \tchar buf[64];\n+#if !defined(CONFIG_SD_BOOT) && !defined(CONFIG_QSPI_BOOT)\n \tu8 sw;\n+#endif\n \n \tputs(\"Board: LS1021AQDS\\n\");\n \n+#if !defined(CONFIG_SD_BOOT) && !defined(CONFIG_QSPI_BOOT)\n \tsw = QIXIS_READ(brdcfg[0]);\n \tsw = (sw & QIXIS_LBMAP_MASK) >> QIXIS_LBMAP_SHIFT;\n \n@@ -46,6 +50,7 @@ int checkboard(void)\n \t\tprintf(\"IFCCard\\n\");\n \telse\n \t\tprintf(\"invalid setting of SW%u\\n\", QIXIS_LBMAP_SWITCH);\n+#endif\n \n \tprintf(\"Sys ID:0x%02x, Sys Ver: 0x%02x\\n\",\n \t\tQIXIS_READ(id), QIXIS_READ(arch));\n@@ -148,6 +153,32 @@ int board_early_init_f(void)\n \treturn 0;\n }\n \n+#ifdef CONFIG_SPL_BUILD\n+void board_init_f(ulong dummy)\n+{\n+\tstruct ccsr_cci400 *cci = (struct ccsr_cci400 *)CONFIG_SYS_CCI400_ADDR;\n+\n+\t/* Set global data pointer */\n+\tgd = &gdata;\n+\n+\t/* Clear the BSS */\n+\tmemset(__bss_start, 0, __bss_end - __bss_start);\n+\n+\tget_clocks();\n+\n+\tpreloader_console_init();\n+\n+#ifdef CONFIG_SPL_I2C_SUPPORT\n+\ti2c_init_all();\n+#endif\n+\tout_le32(&cci->ctrl_ord, 0x00000008);\n+\n+\tdram_init();\n+\n+\tboard_init_r(NULL, 0);\n+}\n+#endif\n+\n int config_board_mux(int ctrl_type)\n {\n \tu8 reg12;\ndiff --git a/board/freescale/ls1021aqds/ls102xa_pbi.cfg b/board/freescale/ls1021aqds/ls102xa_pbi.cfg\nnew file mode 100644\nindex 0000000..edf9f94\n--- /dev/null\n+++ b/board/freescale/ls1021aqds/ls102xa_pbi.cfg\n@@ -0,0 +1,8 @@\n+#PBI commands\n+\n+#Configure Scratch register\n+09ee0200 10000000\n+#Configure alternate space\n+09570158 00080000\n+#Flush PBL data\n+096100c0 000FFFFF\ndiff --git a/board/freescale/ls1021aqds/ls102xa_rcw_sd.cfg b/board/freescale/ls1021aqds/ls102xa_rcw_sd.cfg\nnew file mode 100644\nindex 0000000..e05ec16\n--- /dev/null\n+++ b/board/freescale/ls1021aqds/ls102xa_rcw_sd.cfg\n@@ -0,0 +1,14 @@\n+#PBL preamble and RCW header\n+aa55aa55 01ee0100\n+\n+#enable IFC, disable QSPI and DSPI\n+#0608000a 00000000 00000000 00000000\n+#00000000 00404000 60025a00 21042000\n+#00200000 00000000 00000000 01038000\n+#00000000 001b1200 00000000 00000000\n+\n+#disable IFC, enable QSPI and DSPI\n+0608000a 00000000 00000000 00000000\n+60000000 00407900 e0025a00 21046000\n+00000000 00000000 00000000 00038000\n+20024800 001b7200 00000000 00000000\ndiff --git a/boards.cfg b/boards.cfg\nindex bf6656f..3e5e1d0 100644\n--- a/boards.cfg\n+++ b/boards.cfg\n@@ -302,6 +302,7 @@ Active arm armv7 exynos samsung universal_c210\n Active arm armv7 highbank - highbank highbank - Rob Herring <robh@kernel.org>\n Active arm armv7 keystone ti k2hk_evm k2hk_evm - Vitaly Andrianov <vitalya@ti.com>\n Active arm armv7 ls102xa freescale ls1021aqds ls1021aqds_nor ls1021aqds Alison Wang <alison.wang@freescale.com>\n+Active arm armv7 ls102xa freescale ls1021aqds ls1021aqds_sdcard ls1021aqds:RAMBOOT_PBL,SPL_FSL_PBL,SD_BOOT Alison Wang <alison.wang@freescale.com>\n Active arm armv7 ls102xa freescale ls1021atwr ls1021atwr_nor ls1021atwr Alison Wang <alison.wang@freescale.com>\n Active arm armv7 mx5 denx m53evk m53evk m53evk:IMX_CONFIG=board/denx/m53evk/imximage.cfg Marek Vasut <marek.vasut@gmail.com>\n Active arm armv7 mx5 esg ima3-mx53 ima3-mx53 ima3-mx53:IMX_CONFIG=board/esg/ima3-mx53/imximage.cfg -\ndiff --git a/common/spl/spl_mmc.c b/common/spl/spl_mmc.c\nindex fa6f891..4937890 100644\n--- a/common/spl/spl_mmc.c\n+++ b/common/spl/spl_mmc.c\n@@ -29,8 +29,10 @@ static int mmc_load_image_raw(struct mmc *mmc, unsigned long sector)\n \tif (err == 0)\n \t\tgoto end;\n \n+#ifndef CONFIG_SYS_SPL_ASSUME_UBOOT_NIH\n \tif (image_get_magic(header) != IH_MAGIC)\n \t\treturn -1;\n+#endif\n \n \tspl_parse_image_header(header);\n \ndiff --git a/include/configs/ls1021aqds.h b/include/configs/ls1021aqds.h\nindex a57b02b..4d70d41 100644\n--- a/include/configs/ls1021aqds.h\n+++ b/include/configs/ls1021aqds.h\n@@ -40,8 +40,50 @@ unsigned long get_board_sys_clk(void);\n unsigned long get_board_ddr_clk(void);\n #endif\n \n+#if defined(CONFIG_SD_BOOT) || defined(CONFIG_QSPI_BOOT)\n+#define CONFIG_SYS_CLK_FREQ 100000000\n+#define CONFIG_DDR_CLK_FREQ 100000000\n+#define CONFIG_QIXIS_I2C_ACCESS\n+#else\n #define CONFIG_SYS_CLK_FREQ\t\tget_board_sys_clk()\n #define CONFIG_DDR_CLK_FREQ\t\tget_board_ddr_clk()\n+#endif\n+\n+#ifdef CONFIG_RAMBOOT_PBL\n+#define CONFIG_SYS_FSL_PBL_PBI\tboard/freescale/ls1021aqds/ls102xa_pbi.cfg\n+#endif\n+\n+#ifdef CONFIG_SD_BOOT\n+#define CONFIG_SYS_FSL_PBL_RCW\tboard/freescale/ls1021aqds/ls102xa_rcw_sd.cfg\n+#define CONFIG_SPL\n+#define CONFIG_SPL_PBL_PAD\n+#define CONFIG_SPL_FRAMEWORK\n+#define CONFIG_SPL_LDSCRIPT\t\"arch/arm/cpu/armv7/ls102xa/u-boot-spl.lds\"\n+#define CONFIG_SPL_LIBCOMMON_SUPPORT\n+#define CONFIG_SPL_LIBGENERIC_SUPPORT\n+#define CONFIG_SPL_ENV_SUPPORT\n+#define CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT\n+#define CONFIG_SPL_I2C_SUPPORT\n+#define CONFIG_SPL_WATCHDOG_SUPPORT\n+#define CONFIG_SPL_SERIAL_SUPPORT\n+#define CONFIG_SPL_MMC_SUPPORT\n+#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR\t\t0x78\n+#define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS\t\t0x400\n+\n+#define CONFIG_SPL_TEXT_BASE\t\t0x10000000\n+#define CONFIG_SPL_MAX_SIZE\t\t0xd000\n+#define CONFIG_SPL_STACK\t\t0x1000f000\n+#define CONFIG_SPL_PAD_TO\t\t0xe000\n+#define CONFIG_SYS_TEXT_BASE\t\t0x82000000\n+\n+#define CONFIG_SYS_SPL_MALLOC_START\t0x80200000\n+#define CONFIG_SYS_SPL_MALLOC_SIZE\t0x100000\n+#define CONFIG_SPL_BSS_START_ADDR\t0x80100000\n+#define CONFIG_SPL_BSS_MAX_SIZE\t\t0x80000\n+#define CONFIG_SYS_MONITOR_LEN\t\t0x80000\n+#define CONFIG_SYS_SPL_ASSUME_UBOOT_NIH\n+#define CONFIG_SYS_NO_FLASH\n+#endif\n \n #ifndef CONFIG_SYS_TEXT_BASE\n #define CONFIG_SYS_TEXT_BASE\t\t0x67f80000\n@@ -72,6 +114,7 @@ unsigned long get_board_ddr_clk(void);\n /*\n * IFC Definitions\n */\n+#if !defined(CONFIG_SD_BOOT) && !defined(CONFIG_QSPI_BOOT)\n #define CONFIG_FSL_IFC\n #define CONFIG_SYS_FLASH_BASE\t\t0x60000000\n #define CONFIG_SYS_FLASH_BASE_PHYS\tCONFIG_SYS_FLASH_BASE\n@@ -158,6 +201,7 @@ unsigned long get_board_ddr_clk(void);\n #define CONFIG_CMD_NAND\n \n #define CONFIG_SYS_NAND_BLOCK_SIZE\t(128 * 1024)\n+#endif\n \n /*\n * QIXIS Definitions\n@@ -400,17 +444,37 @@ unsigned long get_board_ddr_clk(void);\n #define CONFIG_SYS_INIT_SP_ADDR \\\n \t(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)\n \n+#ifdef CONFIG_SPL_BUILD\n+#define CONFIG_SYS_MONITOR_BASE CONFIG_SPL_TEXT_BASE\n+#else\n #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /* start of monitor */\n+#endif\n \n /*\n * Environment\n */\n #define CONFIG_ENV_OVERWRITE\n \n+#if defined(CONFIG_SD_BOOT)\n+#define CONFIG_ENV_OFFSET\t\t(1024 * 1024)\n+#define CONFIG_ENV_IS_IN_MMC\n+#define CONFIG_SYS_MMC_ENV_DEV\t\t0\n+#define CONFIG_ENV_SIZE\t\t\t0x2000\n+#elif defined(CONFIG_NAND_BOOT)\n+#define CONFIG_ENV_IS_IN_NAND\n+#define CONFIG_ENV_SIZE\t\t\t0x2000\n+#define CONFIG_ENV_OFFSET\t\t(10 * CONFIG_SYS_NAND_BLOCK_SIZE)\n+#elif defined(CONFIG_QSPI_BOOT)\n+#define CONFIG_ENV_IS_IN_SPI_FLASH\n+#define CONFIG_ENV_SIZE\t\t\t0x2000 /* 8KB */\n+#define CONFIG_ENV_OFFSET\t\t0x100000 /* 1MB */\n+#define CONFIG_ENV_SECT_SIZE\t\t0x10000\n+#else\n #define CONFIG_ENV_IS_IN_FLASH\n #define CONFIG_ENV_ADDR\t\t\t(CONFIG_SYS_MONITOR_BASE - CONFIG_ENV_SECT_SIZE)\n #define CONFIG_ENV_SIZE\t\t\t0x2000\n #define CONFIG_ENV_SECT_SIZE\t\t0x20000 /* 128K (one sector) */\n+#endif\n \n #define CONFIG_OF_LIBFDT\n #define CONFIG_OF_BOARD_SETUP\ndiff --git a/tools/pblimage.c b/tools/pblimage.c\nindex 6e6e801..bfd1ecf 100644\n--- a/tools/pblimage.c\n+++ b/tools/pblimage.c\n@@ -12,6 +12,10 @@\n * Initialize to an invalid value.\n */\n static uint32_t next_pbl_cmd = 0x82000000;\n+static uint32_t pbl_cmd_initaddr = 0x82000000;\n+static uint32_t pbi_crc_cmd1 = 0x13;\n+static uint32_t pbi_crc_cmd2 = 0x80;\n+\n /*\n * need to store all bytes in memory for calculating crc32, then write the\n * bytes to image file for PBL boot.\n@@ -49,7 +53,7 @@ static void init_next_pbl_cmd(FILE *fp_uboot)\n \t\texit(EXIT_FAILURE);\n \t}\n \n-\tnext_pbl_cmd = 0x82000000 - st.st_size;\n+\tnext_pbl_cmd = pbl_cmd_initaddr - st.st_size;\n }\n \n static void generate_pbl_cmd(void)\n@@ -81,7 +85,7 @@ static void pbl_fget(size_t size, FILE *stream)\n static void load_uboot(FILE *fp_uboot)\n {\n \tinit_next_pbl_cmd(fp_uboot);\n-\twhile (next_pbl_cmd < 0x82000000) {\n+\twhile (next_pbl_cmd < pbl_cmd_initaddr) {\n \t\tgenerate_pbl_cmd();\n \t\tpbl_fget(64, fp_uboot);\n \t}\n@@ -111,6 +115,14 @@ static void pbl_parser(char *name)\n \tsize_t len = 0;\n \n \tfname = name;\n+\n+\tif (strstr(fname, \"ls102xa\")) {\n+\t\tnext_pbl_cmd = 0x8100d000;\n+\t\tpbl_cmd_initaddr = 0x8100d000;\n+\t\tpbi_crc_cmd1 = 0x61;\n+\t\tpbi_crc_cmd2 = 0;\n+\t}\n+\n \tfd = fopen(name, \"r\");\n \tif (fd == NULL) {\n \t\tprintf(\"Error:%s - Can't open\\n\", fname);\n@@ -172,8 +184,8 @@ static void add_end_cmd(void)\n \n \t/* Add PBI CRC command. */\n \t*pmem_buf++ = 0x08;\n-\t*pmem_buf++ = 0x13;\n-\t*pmem_buf++ = 0x80;\n+\t*pmem_buf++ = pbi_crc_cmd1;\n+\t*pmem_buf++ = pbi_crc_cmd2;\n \t*pmem_buf++ = 0x40;\n \tpbl_size += 4;\n \n", "prefixes": [ "U-Boot", "1/2" ] }