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GET /api/patches/366821/?format=api
{ "id": 366821, "url": "http://patchwork.ozlabs.org/api/patches/366821/?format=api", "web_url": "http://patchwork.ozlabs.org/project/uboot/patch/1404381072-42875-4-git-send-email-Li.Xiubo@freescale.com/", "project": { "id": 18, "url": "http://patchwork.ozlabs.org/api/projects/18/?format=api", "name": "U-Boot", "link_name": "uboot", "list_id": "u-boot.lists.denx.de", "list_email": "u-boot@lists.denx.de", "web_url": null, "scm_url": null, "webscm_url": null, "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<1404381072-42875-4-git-send-email-Li.Xiubo@freescale.com>", "list_archive_url": null, "date": "2014-07-03T09:51:11", "name": "[U-Boot,3/4] ARM: LS1021A: enable ARMv7 virt support for LS1021A A7", "commit_ref": null, "pull_url": null, "state": "changes-requested", "archived": false, "hash": "a940c5eacd18f1e3ea559bf6dbc3d20e803e8363", "submitter": { "id": 44085, "url": "http://patchwork.ozlabs.org/api/people/44085/?format=api", "name": "Xiubo Li", "email": "Li.Xiubo@freescale.com" }, "delegate": { "id": 2666, "url": "http://patchwork.ozlabs.org/api/users/2666/?format=api", "username": "yorksun", "first_name": "York", "last_name": "Sun", "email": "yorksun@freescale.com" }, "mbox": "http://patchwork.ozlabs.org/project/uboot/patch/1404381072-42875-4-git-send-email-Li.Xiubo@freescale.com/mbox/", "series": [], "comments": "http://patchwork.ozlabs.org/api/patches/366821/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/366821/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<u-boot-bounces@lists.denx.de>", "X-Original-To": "incoming@patchwork.ozlabs.org", "Delivered-To": "patchwork-incoming@bilbo.ozlabs.org", "Received": [ "from theia.denx.de (theia.denx.de [85.214.87.163])\n\tby ozlabs.org (Postfix) with ESMTP id 6799014012F\n\tfor <incoming@patchwork.ozlabs.org>;\n\tThu, 3 Jul 2014 20:18:10 +1000 (EST)", "from localhost (localhost [127.0.0.1])\n\tby theia.denx.de (Postfix) with ESMTP id 1E8A14A056;\n\tThu, 3 Jul 2014 12:17:58 +0200 (CEST)", "from theia.denx.de ([127.0.0.1])\n\tby localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024)\n\twith ESMTP id oNNxBdDZ1Dls; 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Thu, 3 Jul 2014 02:55:04 -0700" ], "X-Virus-Scanned": [ "Debian amavisd-new at theia.denx.de", "Debian amavisd-new at theia.denx.de" ], "X-policyd-weight": "NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5\n\tNOT_IN_BL_NJABL=-1.5 (only DNSBL check requested)", "From": "Xiubo Li <Li.Xiubo@freescale.com>", "To": "<albert.u.boot@aribaud.net>, <u-boot@lists.denx.de>", "Date": "Thu, 3 Jul 2014 17:51:11 +0800", "Message-ID": "<1404381072-42875-4-git-send-email-Li.Xiubo@freescale.com>", "X-Mailer": "git-send-email 1.8.5", "In-Reply-To": "<1404381072-42875-1-git-send-email-Li.Xiubo@freescale.com>", "References": "<1404381072-42875-1-git-send-email-Li.Xiubo@freescale.com>", "X-EOPAttributedMessage": "0", "X-Forefront-Antispam-Report": "CIP:192.88.158.2; CTRY:US; IPV:CAL; IPV:NLI;\n\tEFV:NLI; SFV:NSPM; \n\tSFS:(6009001)(199002)(189002)(88136002)(83072002)(80022001)(93916002)(81342001)(77982001)(6806004)(87936001)(86362001)(89996001)(74502001)(79102001)(85852003)(50986999)(84676001)(76176999)(92726001)(92566001)(47776003)(48376002)(19580395003)(76482001)(50466002)(85306003)(68736004)(20776003)(26826002)(104016002)(102836001)(97736001)(46102001)(64706001)(104166001)(83322001)(44976005)(69596002)(95666004)(77156001)(36756003)(229853001)(81156004)(106466001)(50226001)(105606002)(99396002)(81542001)(62966002)(19580405001)(87286001)(107046002)(31966008)(21056001)(74662001)(4396001);\n\tDIR:OUT; SFP:; SCL:1; SRVR:BL2PR03MB339;\n\tH:az84smr01.freescale.net; FPR:; MLV:ovrnspm;\n\tPTR:InfoDomainNonexistent; MX:1; LANG:en; ", "MIME-Version": "1.0", "X-Microsoft-Antispam": "BCL:0;PCL:0;RULEID:", "X-Forefront-PRVS": "0261CCEEDF", "Received-SPF": "Fail (: domain of freescale.com does not designate 192.88.158.2\n\tas permitted sender) receiver=; client-ip=192.88.158.2;\n\thelo=az84smr01.freescale.net;", "Authentication-Results": "spf=fail (sender IP is 192.88.158.2)\n\tsmtp.mailfrom=Li.Xiubo@freescale.com; ", "X-OriginatorOrg": "freescale.com", "X-Mailman-Approved-At": "Thu, 03 Jul 2014 12:17:23 +0200", "Cc": "R64188@freescale.com, b44548@freescale.com, marc.zyngier@arm.com,\n\tb46683@freescale.com, b35083@freescale.com,\n\tXiubo Li <Li.Xiubo@freescale.com>, b47053@freescale.com", "Subject": "[U-Boot] [PATCH 3/4] ARM: LS1021A: enable ARMv7 virt support for\n\tLS1021A A7", "X-BeenThere": "u-boot@lists.denx.de", "X-Mailman-Version": "2.1.11", "Precedence": "list", "List-Id": "U-Boot discussion <u-boot.lists.denx.de>", "List-Unsubscribe": "<http://lists.denx.de/mailman/options/u-boot>,\n\t<mailto:u-boot-request@lists.denx.de?subject=unsubscribe>", "List-Archive": "<http://lists.denx.de/pipermail/u-boot>", "List-Post": "<mailto:u-boot@lists.denx.de>", "List-Help": "<mailto:u-boot-request@lists.denx.de?subject=help>", "List-Subscribe": "<http://lists.denx.de/mailman/listinfo/u-boot>,\n\t<mailto:u-boot-request@lists.denx.de?subject=subscribe>", "Content-Type": "text/plain; charset=\"us-ascii\"", "Content-Transfer-Encoding": "7bit", "Sender": "u-boot-bounces@lists.denx.de", "Errors-To": "u-boot-bounces@lists.denx.de" }, "content": "To enable hypervisors utilizing the ARMv7 virtualization extension\non the LS1021A-QDS/TWR boards with the A7 core tile, we add the\nrequired configuration variable.\nAlso we define the board specific smp_set_cpu_boot_addr() function to\nset the start address for secondary cores in the LS1021A specific\nmanner.\n\nSigned-off-by: Xiubo Li <Li.Xiubo@freescale.com>\n---\n arch/arm/cpu/armv7/ls102xa/cpu.c | 12 ++++++++++++\n include/configs/ls1021aqds.h | 9 +++++++++\n include/configs/ls1021atwr.h | 9 +++++++++\n 3 files changed, 30 insertions(+)", "diff": "diff --git a/arch/arm/cpu/armv7/ls102xa/cpu.c b/arch/arm/cpu/armv7/ls102xa/cpu.c\nindex f9046c6..2268f15 100644\n--- a/arch/arm/cpu/armv7/ls102xa/cpu.c\n+++ b/arch/arm/cpu/armv7/ls102xa/cpu.c\n@@ -101,3 +101,15 @@ int cpu_eth_init(bd_t *bis)\n \n \treturn 0;\n }\n+\n+#if defined(CONFIG_ARMV7_NONSEC) || defined(CONFIG_ARMV7_VIRT)\n+/* Setting the address at which secondary cores start from.*/\n+void smp_set_core_boot_addr(unsigned long addr, int corenr)\n+{\n+\t/* After setting the secondary cores start address, just release\n+\t * them to boot.\n+\t */\n+\tout_be32(CONFIG_DCFG_CCSR_SCRATCHRW1, addr);\n+\tout_be32(CONFIG_DCFG_CCSR_BRR, 0x2);\n+}\n+#endif\ndiff --git a/include/configs/ls1021aqds.h b/include/configs/ls1021aqds.h\nindex d639a6f..f090971 100644\n--- a/include/configs/ls1021aqds.h\n+++ b/include/configs/ls1021aqds.h\n@@ -18,6 +18,15 @@\n #define CONFIG_BOARD_EARLY_INIT_F\n #define CONFIG_ARCH_EARLY_INIT_R\n \n+#define CONFIG_ARMV7_NONSEC\n+#define CONFIG_ARMV7_VIRT\n+#define CONFIG_SOC_BIG_ENDIAN\n+#define CONFIG_DCFG_CCSR_SCRATCHRW1\t0x01ee0200\n+#define CONFIG_DCFG_CCSR_BRR\t\t0x01ee00e4\n+#define CONFIG_SMP_PEN_ADDR\t\tCONFIG_DCFG_CCSR_SCRATCHRW1\n+#define CONFIG_ARM_GIC_BASE_ADDRESS\t0x01400000\n+#define CONFIG_TIMER_CLK_FREQ\t\t125000000\n+\n #define CONFIG_HWCONFIG\n #define HWCONFIG_BUFFER_SIZE 128\n \ndiff --git a/include/configs/ls1021atwr.h b/include/configs/ls1021atwr.h\nindex a8dc56e..235a862 100644\n--- a/include/configs/ls1021atwr.h\n+++ b/include/configs/ls1021atwr.h\n@@ -18,6 +18,15 @@\n #define CONFIG_BOARD_EARLY_INIT_F\n #define CONFIG_ARCH_EARLY_INIT_R\n \n+#define CONFIG_ARMV7_NONSEC\n+#define CONFIG_ARMV7_VIRT\n+#define CONFIG_SOC_BIG_ENDIAN\n+#define CONFIG_DCFG_CCSR_SCRATCHRW1\t0x01ee0200\n+#define CONFIG_DCFG_CCSR_BRR\t\t0x01ee00e4\n+#define CONFIG_SMP_PEN_ADDR\t\tCONFIG_DCFG_CCSR_SCRATCHRW1\n+#define CONFIG_ARM_GIC_BASE_ADDRESS\t0x01400000\n+#define CONFIG_TIMER_CLK_FREQ\t\t125000000\n+\n #define CONFIG_HWCONFIG\n #define HWCONFIG_BUFFER_SIZE 128\n \n", "prefixes": [ "U-Boot", "3/4" ] }