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GET /api/patches/354084/?format=api
HTTP 200 OK
Allow: GET, PUT, PATCH, HEAD, OPTIONS
Content-Type: application/json
Vary: Accept

{
    "id": 354084,
    "url": "http://patchwork.ozlabs.org/api/patches/354084/?format=api",
    "web_url": "http://patchwork.ozlabs.org/project/linux-tegra/patch/1401448834-32659-13-git-send-email-hdoyu@nvidia.com/",
    "project": {
        "id": 21,
        "url": "http://patchwork.ozlabs.org/api/projects/21/?format=api",
        "name": "Linux Tegra Development",
        "link_name": "linux-tegra",
        "list_id": "linux-tegra.vger.kernel.org",
        "list_email": "linux-tegra@vger.kernel.org",
        "web_url": null,
        "scm_url": null,
        "webscm_url": null,
        "list_archive_url": "",
        "list_archive_url_format": "",
        "commit_url_format": ""
    },
    "msgid": "<1401448834-32659-13-git-send-email-hdoyu@nvidia.com>",
    "list_archive_url": null,
    "date": "2014-05-30T11:20:25",
    "name": "[PATCHv8,12/21] iommu/tegra: smmu: add SMMU to an global iommu list",
    "commit_ref": null,
    "pull_url": null,
    "state": "superseded",
    "archived": true,
    "hash": "4893bbdb863802f41a09570b368296c7fe24729f",
    "submitter": {
        "id": 10265,
        "url": "http://patchwork.ozlabs.org/api/people/10265/?format=api",
        "name": "Hiroshi Doyu",
        "email": "hdoyu@nvidia.com"
    },
    "delegate": null,
    "mbox": "http://patchwork.ozlabs.org/project/linux-tegra/patch/1401448834-32659-13-git-send-email-hdoyu@nvidia.com/mbox/",
    "series": [],
    "comments": "http://patchwork.ozlabs.org/api/patches/354084/comments/",
    "check": "pending",
    "checks": "http://patchwork.ozlabs.org/api/patches/354084/checks/",
    "tags": {},
    "related": [],
    "headers": {
        "Return-Path": "<linux-tegra-owner@vger.kernel.org>",
        "X-Original-To": "incoming@patchwork.ozlabs.org",
        "Delivered-To": "patchwork-incoming@bilbo.ozlabs.org",
        "Received": [
            "from vger.kernel.org (vger.kernel.org [209.132.180.67])\n\tby ozlabs.org (Postfix) with ESMTP id 9B23F1400D6\n\tfor <incoming@patchwork.ozlabs.org>;\n\tFri, 30 May 2014 21:20:51 +1000 (EST)",
            "(majordomo@vger.kernel.org) by vger.kernel.org via listexpand\n\tid S1754574AbaE3LUs (ORCPT <rfc822;incoming@patchwork.ozlabs.org>);\n\tFri, 30 May 2014 07:20:48 -0400",
            "from hqemgate14.nvidia.com ([216.228.121.143]:12087 \"EHLO\n\thqemgate14.nvidia.com\" rhost-flags-OK-OK-OK-OK) by vger.kernel.org\n\twith ESMTP id S1751291AbaE3LUq (ORCPT\n\t<rfc822;linux-tegra@vger.kernel.org>);\n\tFri, 30 May 2014 07:20:46 -0400",
            "from hqnvupgp08.nvidia.com (Not Verified[216.228.121.13]) by\n\thqemgate14.nvidia.com\n\tid <B538869a00000>; Fri, 30 May 2014 04:21:04 -0700",
            "from hqemhub01.nvidia.com ([172.20.12.94])\n\tby hqnvupgp08.nvidia.com (PGP Universal service);\n\tFri, 30 May 2014 04:15:42 -0700",
            "from deemhub02.nvidia.com (10.21.69.138) by hqemhub01.nvidia.com\n\t(172.20.150.30) with Microsoft SMTP Server (TLS) id 8.3.342.0;\n\tFri, 30 May 2014 04:20:45 -0700",
            "from oreo.nvidia.com (10.21.65.27) by deemhub02.nvidia.com\n\t(10.21.69.138) with Microsoft SMTP Server (TLS) id 8.3.342.0;\n\tFri, 30 May 2014 13:20:42 +0200"
        ],
        "X-PGP-Universal": "processed;\n\tby hqnvupgp08.nvidia.com on Fri, 30 May 2014 04:15:42 -0700",
        "From": "Hiroshi Doyu <hdoyu@nvidia.com>",
        "To": "<linux-tegra@vger.kernel.org>",
        "Subject": "[PATCHv8 12/21] iommu/tegra: smmu: add SMMU to an global iommu list",
        "Date": "Fri, 30 May 2014 14:20:25 +0300",
        "Message-ID": "<1401448834-32659-13-git-send-email-hdoyu@nvidia.com>",
        "X-Mailer": "git-send-email 2.0.0.rc1.15.g7e76a2f",
        "In-Reply-To": "<1401448834-32659-1-git-send-email-hdoyu@nvidia.com>",
        "References": "<1401448834-32659-1-git-send-email-hdoyu@nvidia.com>",
        "X-NVConfidentiality": "public",
        "MIME-Version": "1.0",
        "Content-Type": "text/plain",
        "Sender": "linux-tegra-owner@vger.kernel.org",
        "Precedence": "bulk",
        "List-ID": "<linux-tegra.vger.kernel.org>",
        "X-Mailing-List": "linux-tegra@vger.kernel.org"
    },
    "content": "This allows to inquire if SMMU is populated or not.\n\nSuggested by Thierry Reding and copied his example code.\n\nSigned-off-by: Hiroshi Doyu <hdoyu@nvidia.com>\nCc: Thierry Reding <thierry.reding@gmail.com>\n---\n drivers/iommu/tegra-smmu.c | 53 +++++++++++++++++++++++++---------------------\n 1 file changed, 29 insertions(+), 24 deletions(-)",
    "diff": "diff --git a/drivers/iommu/tegra-smmu.c b/drivers/iommu/tegra-smmu.c\nindex 5cb0e2a2b267..4a326476c364 100644\n--- a/drivers/iommu/tegra-smmu.c\n+++ b/drivers/iommu/tegra-smmu.c\n@@ -225,6 +225,8 @@ struct smmu_debugfs_info {\n  * Per SMMU device - IOMMU device\n  */\n struct smmu_device {\n+\tstruct iommu\tiommu;\n+\n \tvoid __iomem\t*regbase;\t/* register offset base */\n \tvoid __iomem\t**regs;\t\t/* register block start address array */\n \tvoid __iomem\t**rege;\t\t/* register block end address array */\n@@ -234,7 +236,6 @@ struct smmu_device {\n \tunsigned long\tpage_count;\t/* total remappable size */\n \tspinlock_t\tlock;\n \tchar\t\t*name;\n-\tstruct device\t*dev;\n \tstruct rb_root\tclients;\n \tstruct page *avp_vector_page;\t/* dummy page shared by all AS's */\n \n@@ -371,7 +372,7 @@ static int register_smmu_client(struct smmu_device *smmu,\n \t\treturn -EBUSY;\n \t}\n \n-\tclient = devm_kzalloc(smmu->dev, sizeof(*client), GFP_KERNEL);\n+\tclient = devm_kzalloc(smmu->iommu.dev, sizeof(*client), GFP_KERNEL);\n \tif (!client)\n \t\treturn -ENOMEM;\n \n@@ -526,7 +527,7 @@ static void free_ptbl(struct smmu_as *as, dma_addr_t iova)\n \tunsigned long *pdir = (unsigned long *)page_address(as->pdir_page);\n \n \tif (pdir[pdn] != _PDE_VACANT(pdn)) {\n-\t\tdev_dbg(as->smmu->dev, \"pdn: %lx\\n\", pdn);\n+\t\tdev_dbg(as->smmu->iommu.dev, \"pdn: %lx\\n\", pdn);\n \n \t\tClearPageReserved(SMMU_EX_PTBL_PAGE(pdir[pdn]));\n \t\t__free_page(SMMU_EX_PTBL_PAGE(pdir[pdn]));\n@@ -541,7 +542,7 @@ static void free_pdir(struct smmu_as *as)\n {\n \tunsigned addr;\n \tint count;\n-\tstruct device *dev = as->smmu->dev;\n+\tstruct device *dev = as->smmu->iommu.dev;\n \n \tif (!as->pdir_page)\n \t\treturn;\n@@ -584,11 +585,11 @@ static unsigned long *locate_pte(struct smmu_as *as,\n \t\tunsigned long addr = SMMU_PDN_TO_ADDR(pdn);\n \n \t\t/* Vacant - allocate a new page table */\n-\t\tdev_dbg(as->smmu->dev, \"New PTBL pdn: %lx\\n\", pdn);\n+\t\tdev_dbg(as->smmu->iommu.dev, \"New PTBL pdn: %lx\\n\", pdn);\n \n \t\t*ptbl_page_p = alloc_page(GFP_ATOMIC);\n \t\tif (!*ptbl_page_p) {\n-\t\t\tdev_err(as->smmu->dev,\n+\t\t\tdev_err(as->smmu->iommu.dev,\n \t\t\t\t\"failed to allocate smmu_device page table\\n\");\n \t\t\treturn NULL;\n \t\t}\n@@ -648,7 +649,7 @@ static int alloc_pdir(struct smmu_as *as)\n \t/*\n \t * do the allocation, then grab as->lock\n \t */\n-\tcnt = devm_kzalloc(smmu->dev,\n+\tcnt = devm_kzalloc(smmu->iommu.dev,\n \t\t\t   sizeof(cnt[0]) * SMMU_PDIR_COUNT,\n \t\t\t   GFP_KERNEL);\n \tpage = alloc_page(GFP_KERNEL | __GFP_DMA);\n@@ -662,7 +663,8 @@ static int alloc_pdir(struct smmu_as *as)\n \t}\n \n \tif (!page || !cnt) {\n-\t\tdev_err(smmu->dev, \"failed to allocate at %s\\n\", __func__);\n+\t\tdev_err(smmu->iommu.dev,\n+\t\t\t\"failed to allocate at %s\\n\", __func__);\n \t\terr = -ENOMEM;\n \t\tgoto err_out;\n \t}\n@@ -692,7 +694,7 @@ static int alloc_pdir(struct smmu_as *as)\n err_out:\n \tspin_unlock_irqrestore(&as->lock, flags);\n \n-\tdevm_kfree(smmu->dev, cnt);\n+\tdevm_kfree(smmu->iommu.dev, cnt);\n \tif (page)\n \t\t__free_page(page);\n \treturn err;\n@@ -747,7 +749,7 @@ static int smmu_iommu_map(struct iommu_domain *domain, unsigned long iova,\n \tunsigned long pfn = __phys_to_pfn(pa);\n \tunsigned long flags;\n \n-\tdev_dbg(as->smmu->dev, \"[%d] %08lx:%pa\\n\", as->asid, iova, &pa);\n+\tdev_dbg(as->smmu->iommu.dev, \"[%d] %08lx:%pa\\n\", as->asid, iova, &pa);\n \n \tif (!pfn_valid(pfn))\n \t\treturn -ENOMEM;\n@@ -764,7 +766,7 @@ static size_t smmu_iommu_unmap(struct iommu_domain *domain, unsigned long iova,\n \tstruct smmu_as *as = domain->priv;\n \tunsigned long flags;\n \n-\tdev_dbg(as->smmu->dev, \"[%d] %08lx\\n\", as->asid, iova);\n+\tdev_dbg(as->smmu->iommu.dev, \"[%d] %08lx\\n\", as->asid, iova);\n \n \tspin_lock_irqsave(&as->lock, flags);\n \t__smmu_iommu_unmap(as, iova);\n@@ -787,7 +789,7 @@ static phys_addr_t smmu_iommu_iova_to_phys(struct iommu_domain *domain,\n \tpte = locate_pte(as, iova, true, &page, &count);\n \tpfn = *pte & SMMU_PFN_MASK;\n \tWARN_ON(!pfn_valid(pfn));\n-\tdev_dbg(as->smmu->dev,\n+\tdev_dbg(as->smmu->iommu.dev,\n \t\t\"iova:%08llx pfn:%08lx asid:%d\\n\", (unsigned long long)iova,\n \t\t pfn, as->asid);\n \n@@ -821,7 +823,7 @@ static int smmu_iommu_attach_dev(struct iommu_domain *domain,\n \tspin_lock(&as->client_lock);\n \tlist_for_each_entry(c, &as->client, list) {\n \t\tif (c->dev == dev) {\n-\t\t\tdev_err(smmu->dev,\n+\t\t\tdev_err(smmu->iommu.dev,\n \t\t\t\t\"%s is already attached\\n\", dev_name(c->dev));\n \t\t\terr = -EINVAL;\n \t\t\tgoto err_client;\n@@ -843,7 +845,7 @@ static int smmu_iommu_attach_dev(struct iommu_domain *domain,\n \t\tpr_info(\"Reserve \\\"page zero\\\" for AVP vectors using a common dummy\\n\");\n \t}\n \n-\tdev_dbg(smmu->dev, \"%s is attached\\n\", dev_name(dev));\n+\tdev_dbg(smmu->iommu.dev, \"%s is attached\\n\", dev_name(dev));\n \treturn 0;\n \n err_client:\n@@ -866,12 +868,12 @@ static void smmu_iommu_detach_dev(struct iommu_domain *domain,\n \t\t\tsmmu_client_disable_swgroups(c);\n \t\t\tlist_del(&c->list);\n \t\t\tc->as = NULL;\n-\t\t\tdev_dbg(smmu->dev,\n+\t\t\tdev_dbg(smmu->iommu.dev,\n \t\t\t\t\"%s is detached\\n\", dev_name(c->dev));\n \t\t\tgoto out;\n \t\t}\n \t}\n-\tdev_err(smmu->dev, \"Couldn't find %s\\n\", dev_name(dev));\n+\tdev_err(smmu->iommu.dev, \"Couldn't find %s\\n\", dev_name(dev));\n out:\n \tspin_unlock(&as->client_lock);\n }\n@@ -898,7 +900,7 @@ static int smmu_iommu_domain_init(struct iommu_domain *domain)\n \t\t\tbreak;\n \t}\n \tif (i == smmu->num_as)\n-\t\tdev_err(smmu->dev,  \"no free AS\\n\");\n+\t\tdev_err(smmu->iommu.dev,  \"no free AS\\n\");\n \treturn err;\n \n found:\n@@ -919,7 +921,7 @@ found:\n \t\tsmmu->page_count * SMMU_PAGE_SIZE - 1;\n \tdomain->geometry.force_aperture = true;\n \n-\tdev_dbg(smmu->dev, \"smmu_as@%p\\n\", as);\n+\tdev_dbg(smmu->iommu.dev, \"smmu_as@%p\\n\", as);\n \n \treturn 0;\n }\n@@ -952,7 +954,7 @@ static void smmu_iommu_domain_destroy(struct iommu_domain *domain)\n \tspin_unlock_irqrestore(&as->lock, flags);\n \n \tdomain->priv = NULL;\n-\tdev_dbg(smmu->dev, \"smmu_as@%p\\n\", as);\n+\tdev_dbg(smmu->iommu.dev, \"smmu_as@%p\\n\", as);\n }\n \n /*\n@@ -1084,7 +1086,7 @@ static ssize_t smmu_debugfs_stats_write(struct file *file,\n \t\tbreak;\n \t}\n \n-\tdev_dbg(smmu->dev, \"%s() %08x, %08x @%08x\\n\", __func__,\n+\tdev_dbg(smmu->iommu.dev, \"%s() %08x, %08x @%08x\\n\", __func__,\n \t\tval, smmu_read(smmu, offs), offs);\n \n \treturn count;\n@@ -1106,7 +1108,7 @@ static int smmu_debugfs_stats_show(struct seq_file *s, void *v)\n \t\tval = smmu_read(smmu, offs);\n \t\tseq_printf(s, \"%s:%08x \", stats[i], val);\n \n-\t\tdev_dbg(smmu->dev, \"%s() %s %08x @%08x\\n\", __func__,\n+\t\tdev_dbg(smmu->iommu.dev, \"%s() %s %08x @%08x\\n\", __func__,\n \t\t\tstats[i], val, offs);\n \t}\n \tseq_printf(s, \"\\n\");\n@@ -1144,7 +1146,7 @@ static void smmu_debugfs_create(struct smmu_device *smmu)\n \tif (!smmu->debugfs_info)\n \t\treturn;\n \n-\troot = debugfs_create_dir(dev_name(smmu->dev), NULL);\n+\troot = debugfs_create_dir(dev_name(smmu->iommu.dev), NULL);\n \tif (!root)\n \t\tgoto err_out;\n \tsmmu->debugfs_root = root;\n@@ -1216,7 +1218,7 @@ static void tegra_smmu_create_default_map(struct smmu_device *smmu)\n \t\tsmmu->map[i] = arm_iommu_create_mapping(&platform_bus_type,\n \t\t\t\t\t\t\tbase, size);\n \t\tif (IS_ERR(smmu->map[i]))\n-\t\t\tdev_err(smmu->dev,\n+\t\t\tdev_err(smmu->iommu.dev,\n \t\t\t\t\"Couldn't create: asid=%d map=%p %pa-%pa\\n\",\n \t\t\t\ti, smmu->map[i], &base, &base + size - 1);\n \t}\n@@ -1284,7 +1286,7 @@ static int tegra_smmu_probe(struct platform_device *pdev)\n \tif (!smmu->ahb)\n \t\treturn -ENODEV;\n \n-\tsmmu->dev = dev;\n+\tsmmu->iommu.dev = dev;\n \tsmmu->num_as = asids;\n \tsmmu->iovmm_base = base;\n \tsmmu->page_count = size;\n@@ -1321,6 +1323,8 @@ static int tegra_smmu_probe(struct platform_device *pdev)\n \tsmmu_handle = smmu;\n \tbus_set_iommu(&platform_bus_type, &smmu_iommu_ops);\n \ttegra_smmu_create_default_map(smmu);\n+\n+\tiommu_add(&smmu->iommu);\n \treturn 0;\n }\n \n@@ -1336,6 +1340,7 @@ static int tegra_smmu_remove(struct platform_device *pdev)\n \t\tfree_pdir(&smmu->as[i]);\n \t__free_page(smmu->avp_vector_page);\n \tsmmu_handle = NULL;\n+\tiommu_del(&smmu->iommu);\n \treturn 0;\n }\n \n",
    "prefixes": [
        "PATCHv8",
        "12/21"
    ]
}