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GET /api/patches/336/?format=api
{ "id": 336, "url": "http://patchwork.ozlabs.org/api/patches/336/?format=api", "web_url": "http://patchwork.ozlabs.org/project/linuxppc-dev/patch/1221590264-3368-4-git-send-email-galak@kernel.crashing.org/", "project": { "id": 2, "url": "http://patchwork.ozlabs.org/api/projects/2/?format=api", "name": "Linux PPC development", "link_name": "linuxppc-dev", "list_id": "linuxppc-dev.lists.ozlabs.org", "list_email": "linuxppc-dev@lists.ozlabs.org", "web_url": "https://github.com/linuxppc/wiki/wiki", "scm_url": "https://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux.git", "webscm_url": "https://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux.git/", "list_archive_url": "https://lore.kernel.org/linuxppc-dev/", "list_archive_url_format": "https://lore.kernel.org/linuxppc-dev/{}/", "commit_url_format": "https://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux.git/commit/?id={}" }, "msgid": "<1221590264-3368-4-git-send-email-galak@kernel.crashing.org>", "list_archive_url": "https://lore.kernel.org/linuxppc-dev/1221590264-3368-4-git-send-email-galak@kernel.crashing.org/", "date": "2008-09-16T18:37:44", "name": "[v6,4/4] powerpc/mm: Implement _PAGE_SPECIAL & pte_special() for 32-bit", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "a0ad28bc3c65d5d4aaaf65da52253f731023490a", "submitter": { "id": 5, "url": "http://patchwork.ozlabs.org/api/people/5/?format=api", "name": "Kumar Gala", "email": "galak@kernel.crashing.org" }, "delegate": { "id": 9, "url": "http://patchwork.ozlabs.org/api/users/9/?format=api", "username": "galak", "first_name": "Kumar", "last_name": "Gala", "email": "galak@kernel.crashing.org" }, "mbox": "http://patchwork.ozlabs.org/project/linuxppc-dev/patch/1221590264-3368-4-git-send-email-galak@kernel.crashing.org/mbox/", "series": [], "comments": "http://patchwork.ozlabs.org/api/patches/336/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/336/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<linuxppc-dev-bounces+patchwork=ozlabs.org@ozlabs.org>", "X-Original-To": [ "patchwork@ozlabs.org", "linuxppc-dev@ozlabs.org" ], "Delivered-To": [ "patchwork@ozlabs.org", "linuxppc-dev@ozlabs.org" ], "Received": [ "from ozlabs.org (localhost [127.0.0.1])\n\tby ozlabs.org (Postfix) with ESMTP id A2D43DE76F\n\tfor <patchwork@ozlabs.org>; Wed, 17 Sep 2008 04:39:22 +1000 (EST)", "from gate.crashing.org (gate.crashing.org [63.228.1.57])\n\t(using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits))\n\t(Client did not present a certificate)\n\tby ozlabs.org (Postfix) with ESMTPS id CDE06DE506\n\tfor <linuxppc-dev@ozlabs.org>; Wed, 17 Sep 2008 04:37:50 +1000 (EST)", "from localhost (localhost.localdomain [127.0.0.1])\n\tby gate.crashing.org (8.14.1/8.13.8) with ESMTP id m8GIbkkg006368\n\tfor <linuxppc-dev@ozlabs.org>; Tue, 16 Sep 2008 13:37:47 -0500" ], "From": "Kumar Gala <galak@kernel.crashing.org>", "To": "linuxppc-dev@ozlabs.org", "Subject": "[PATCH v6 4/4] powerpc/mm: Implement _PAGE_SPECIAL & pte_special()\n\tfor 32-bit", "Date": "Tue, 16 Sep 2008 13:37:44 -0500", "Message-Id": "<1221590264-3368-4-git-send-email-galak@kernel.crashing.org>", "X-Mailer": "git-send-email 1.5.5.1", "In-Reply-To": "<1221590264-3368-3-git-send-email-galak@kernel.crashing.org>", "References": "<1221590264-3368-1-git-send-email-galak@kernel.crashing.org>\n\t<1221590264-3368-2-git-send-email-galak@kernel.crashing.org>\n\t<1221590264-3368-3-git-send-email-galak@kernel.crashing.org>", "X-BeenThere": "linuxppc-dev@ozlabs.org", "X-Mailman-Version": "2.1.11", "Precedence": "list", "List-Id": "Linux on PowerPC Developers Mail List <linuxppc-dev.ozlabs.org>", "List-Unsubscribe": "<https://ozlabs.org/mailman/options/linuxppc-dev>,\n\t<mailto:linuxppc-dev-request@ozlabs.org?subject=unsubscribe>", "List-Archive": "<http://ozlabs.org/pipermail/linuxppc-dev>", "List-Post": "<mailto:linuxppc-dev@ozlabs.org>", "List-Help": "<mailto:linuxppc-dev-request@ozlabs.org?subject=help>", "List-Subscribe": "<https://ozlabs.org/mailman/listinfo/linuxppc-dev>,\n\t<mailto:linuxppc-dev-request@ozlabs.org?subject=subscribe>", "MIME-Version": "1.0", "Content-Type": "text/plain; charset=\"us-ascii\"", "Content-Transfer-Encoding": "7bit", "Sender": "linuxppc-dev-bounces+patchwork=ozlabs.org@ozlabs.org", "Errors-To": "linuxppc-dev-bounces+patchwork=ozlabs.org@ozlabs.org" }, "content": "Implement _PAGE_SPECIAL and pte_special() for 32-bit powerpc. This bit will\nbe used by the fast get_user_pages() to differenciate PTEs that correspond\nto a valid struct page from special mappings that don't such as IO mappings\nobtained via io_remap_pfn_ranges().\n\nWe currently only implement this on sub-arch that support SMP or will so\nin the future (6xx, 44x, FSL-BookE) and not (8xx, 40x).\n\nSigned-off-by: Kumar Gala <galak@kernel.crashing.org>\nAcked-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>", "diff": "diff --git a/arch/powerpc/include/asm/pgtable-ppc32.h b/arch/powerpc/include/asm/pgtable-ppc32.h\nindex 1b11955..c2e58b4 100644\n--- a/arch/powerpc/include/asm/pgtable-ppc32.h\n+++ b/arch/powerpc/include/asm/pgtable-ppc32.h\n@@ -261,6 +261,7 @@ extern int icache_44x_need_flush;\n #define _PAGE_HWEXEC\t0x00000004\t\t/* H: Execute permission */\n #define _PAGE_ACCESSED\t0x00000008\t\t/* S: Page referenced */\n #define _PAGE_DIRTY\t0x00000010\t\t/* S: Page dirty */\n+#define _PAGE_SPECIAL\t0x00000020\t\t/* S: Special page */\n #define _PAGE_USER\t0x00000040\t\t/* S: User page */\n #define _PAGE_ENDIAN\t0x00000080\t\t/* H: E bit */\n #define _PAGE_GUARDED\t0x00000100\t\t/* H: G bit */\n@@ -276,6 +277,7 @@ extern int icache_44x_need_flush;\n /* ERPN in a PTE never gets cleared, ignore it */\n #define _PTE_NONE_MASK\t0xffffffff00000000ULL\n \n+#define __HAVE_ARCH_PTE_SPECIAL\n \n #elif defined(CONFIG_FSL_BOOKE)\n /*\n@@ -305,6 +307,7 @@ extern int icache_44x_need_flush;\n #define _PAGE_COHERENT\t0x00100\t/* H: M bit */\n #define _PAGE_NO_CACHE\t0x00200\t/* H: I bit */\n #define _PAGE_WRITETHRU\t0x00400\t/* H: W bit */\n+#define _PAGE_SPECIAL\t0x00800 /* S: Special page */\n \n #ifdef CONFIG_PTE_64BIT\n /* ERPN in a PTE never gets cleared, ignore it */\n@@ -315,6 +318,8 @@ extern int icache_44x_need_flush;\n #define _PMD_PRESENT_MASK (PAGE_MASK)\n #define _PMD_BAD\t(~PAGE_MASK)\n \n+#define __HAVE_ARCH_PTE_SPECIAL\n+\n #elif defined(CONFIG_8xx)\n /* Definitions for 8xx embedded chips. */\n #define _PAGE_PRESENT\t0x0001\t/* Page is valid */\n@@ -362,6 +367,7 @@ extern int icache_44x_need_flush;\n #define _PAGE_ACCESSED\t0x100\t/* R: page referenced */\n #define _PAGE_EXEC\t0x200\t/* software: i-cache coherency required */\n #define _PAGE_RW\t0x400\t/* software: user write access allowed */\n+#define _PAGE_SPECIAL\t0x800\t/* software: Special page */\n \n #define _PTE_NONE_MASK\t_PAGE_HASHPTE\n \n@@ -372,6 +378,8 @@ extern int icache_44x_need_flush;\n /* Hash table based platforms need atomic updates of the linux PTE */\n #define PTE_ATOMIC_UPDATES\t1\n \n+#define __HAVE_ARCH_PTE_SPECIAL\n+\n #endif\n \n /*\n@@ -404,6 +412,9 @@ extern int icache_44x_need_flush;\n #ifndef _PAGE_WRITETHRU\n #define _PAGE_WRITETHRU\t0\n #endif\n+#ifndef _PAGE_SPECIAL\n+#define _PAGE_SPECIAL\t0\n+#endif\n #ifndef _PMD_PRESENT_MASK\n #define _PMD_PRESENT_MASK\t_PMD_PRESENT\n #endif\n@@ -534,7 +545,7 @@ static inline int pte_write(pte_t pte)\t\t{ return pte_val(pte) & _PAGE_RW; }\n static inline int pte_dirty(pte_t pte)\t\t{ return pte_val(pte) & _PAGE_DIRTY; }\n static inline int pte_young(pte_t pte)\t\t{ return pte_val(pte) & _PAGE_ACCESSED; }\n static inline int pte_file(pte_t pte)\t\t{ return pte_val(pte) & _PAGE_FILE; }\n-static inline int pte_special(pte_t pte)\t{ return 0; }\n+static inline int pte_special(pte_t pte)\t{ return pte_val(pte) & _PAGE_SPECIAL; }\n \n static inline void pte_uncache(pte_t pte) { pte_val(pte) |= _PAGE_NO_CACHE; }\n static inline void pte_cache(pte_t pte) { pte_val(pte) &= ~_PAGE_NO_CACHE; }\n@@ -553,7 +564,7 @@ static inline pte_t pte_mkdirty(pte_t pte) {\n static inline pte_t pte_mkyoung(pte_t pte) {\n \tpte_val(pte) |= _PAGE_ACCESSED; return pte; }\n static inline pte_t pte_mkspecial(pte_t pte) {\n-\treturn pte; }\n+\tpte_val(pte) |= _PAGE_SPECIAL; return pte; }\n static inline unsigned long pte_pgprot(pte_t pte)\n {\n \treturn __pgprot(pte_val(pte)) & PAGE_PROT_BITS;\n", "prefixes": [ "v6", "4/4" ] }