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GET /api/patches/334937/?format=api
{ "id": 334937, "url": "http://patchwork.ozlabs.org/api/patches/334937/?format=api", "web_url": "http://patchwork.ozlabs.org/project/linux-imx/patch/1396075706-25384-2-git-send-email-shc_work@mail.ru/", "project": { "id": 19, "url": "http://patchwork.ozlabs.org/api/projects/19/?format=api", "name": "Linux IMX development", "link_name": "linux-imx", "list_id": "linux-imx-kernel.lists.patchwork.ozlabs.org", "list_email": "linux-imx-kernel@lists.patchwork.ozlabs.org", "web_url": null, "scm_url": null, "webscm_url": null, "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<1396075706-25384-2-git-send-email-shc_work@mail.ru>", "list_archive_url": null, "date": "2014-03-29T06:48:26", "name": "ARM i.MX51: Add Digi ConnectCore devicetree", "commit_ref": null, "pull_url": null, "state": "new", "archived": false, "hash": "a17ddc86b05159c38341903cca6c2daea15fbd7e", "submitter": { "id": 13523, "url": "http://patchwork.ozlabs.org/api/people/13523/?format=api", "name": "Alexander Shiyan", "email": "shc_work@mail.ru" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/linux-imx/patch/1396075706-25384-2-git-send-email-shc_work@mail.ru/mbox/", "series": [], "comments": "http://patchwork.ozlabs.org/api/patches/334937/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/334937/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<linux-arm-kernel-bounces+incoming-imx=patchwork.ozlabs.org@lists.infradead.org>", "X-Original-To": "incoming-imx@patchwork.ozlabs.org", "Delivered-To": "patchwork-incoming-imx@bilbo.ozlabs.org", "Received": [ "from casper.infradead.org (unknown [IPv6:2001:770:15f::2])\n\t(using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256\n\tbits)) (No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id DFF681400A4\n\tfor <incoming-imx@patchwork.ozlabs.org>;\n\tSat, 29 Mar 2014 17:50:21 +1100 (EST)", "from merlin.infradead.org ([2001:4978:20e::2])\n\tby casper.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux))\n\tid 1WTn59-00032l-Oc; Sat, 29 Mar 2014 06:49:32 +0000", "from localhost ([::1] helo=merlin.infradead.org)\n\tby merlin.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux))\n\tid 1WTn4x-0003bR-4y; Sat, 29 Mar 2014 06:49:19 +0000", "from smtp14.mail.ru ([94.100.176.91])\n\tby merlin.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux))\n\tid 1WTn4e-0003Zz-3K for linux-arm-kernel@lists.infradead.org;\n\tSat, 29 Mar 2014 06:49:02 +0000", "from [5.18.98.0] (port=44540 helo=shc.zet)\n\tby smtp14.mail.ru with esmtpa (envelope-from <shc_work@mail.ru>)\n\tid 1WTn4G-00046m-Ch; Sat, 29 Mar 2014 10:48:36 +0400" ], "DKIM-Signature": "v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mail.ru; \n\ts=mail2; \n\th=Content-Transfer-Encoding:Content-Type:MIME-Version:References:In-Reply-To:Message-Id:Date:Subject:Cc:To:From;\n\tbh=w5Ni8Cfg6pLfzzSJ6DdxtxE1vtJ8Z5x2iYZFOuEBlfw=; \n\tb=swEL2jdklEpl8rVG09PAXTKgB6mZcim//NRvjnpEQX6rIPbLxx6NchzDAZuhwk7Xese190Bz2+WL6nCK9FDVSC7kAL1swbFHrjzhoGbXXK2kcyJMqS5t2VhT/+z3W6kGl2/PXgkYh98B7brAradbgOXfCZpD7mX6xN9pm/KxN0s=;", "From": "Alexander Shiyan <shc_work@mail.ru>", "To": "linux-arm-kernel@lists.infradead.org", "Subject": "[PATCH] ARM i.MX51: Add Digi ConnectCore devicetree", "Date": "Sat, 29 Mar 2014 10:48:26 +0400", "Message-Id": "<1396075706-25384-2-git-send-email-shc_work@mail.ru>", "X-Mailer": "git-send-email 1.8.3.2", "In-Reply-To": "<1396075706-25384-1-git-send-email-shc_work@mail.ru>", "References": "<1396075706-25384-1-git-send-email-shc_work@mail.ru>", "MIME-Version": "1.0", "X-Spam": "Not detected", "X-Mras": "Ok", "X-CRM114-Version": "20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 ", "X-CRM114-CacheID": "sfid-20140329_024900_609977_832B87FB ", "X-CRM114-Status": "GOOD ( 10.02 )", "X-Spam-Score": "-2.0 (--)", "X-Spam-Report": "SpamAssassin version 3.3.2 on merlin.infradead.org summary:\n\tContent analysis details: (-2.0 points)\n\tpts rule name description\n\t---- ----------------------\n\t--------------------------------------------------\n\t-0.0 RCVD_IN_DNSWL_NONE RBL: Sender listed at http://www.dnswl.org/,\n\tno trust [94.100.176.91 listed in list.dnswl.org]\n\t0.0 FREEMAIL_FROM Sender email is commonly abused enduser mail\n\tprovider (shc_work[at]mail.ru)\n\t-0.0 SPF_PASS SPF: sender matches SPF record\n\t-1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1%\n\t[score: 0.0000]\n\t-0.1 DKIM_VALID_AU Message has a valid DKIM or DK signature from\n\tauthor's domain\n\t0.1 DKIM_SIGNED Message has a DKIM or DK signature,\n\tnot necessarily valid\n\t-0.1 DKIM_VALID Message has at least one valid DKIM or DK signature", "Cc": "Alexander Shiyan <shc_work@mail.ru>, Sascha Hauer <kernel@pengutronix.de>,\n\tShawn Guo <shawn.guo@freescale.com>", "X-BeenThere": "linux-arm-kernel@lists.infradead.org", "X-Mailman-Version": "2.1.15", "Precedence": "list", "List-Unsubscribe": "<http://lists.infradead.org/mailman/options/linux-arm-kernel>,\n\t<mailto:linux-arm-kernel-request@lists.infradead.org?subject=unsubscribe>", "List-Archive": "<http://lists.infradead.org/pipermail/linux-arm-kernel/>", "List-Post": "<mailto:linux-arm-kernel@lists.infradead.org>", "List-Help": "<mailto:linux-arm-kernel-request@lists.infradead.org?subject=help>", "List-Subscribe": "<http://lists.infradead.org/mailman/listinfo/linux-arm-kernel>,\n\t<mailto:linux-arm-kernel-request@lists.infradead.org?subject=subscribe>", "Content-Type": "text/plain; charset=\"utf-8\"", "Content-Transfer-Encoding": "base64", "Sender": "\"linux-arm-kernel\" <linux-arm-kernel-bounces@lists.infradead.org>", "Errors-To": "linux-arm-kernel-bounces+incoming-imx=patchwork.ozlabs.org@lists.infradead.org", "List-Id": "linux-imx-kernel.lists.patchwork.ozlabs.org" }, "content": "This patch adds support for Digi ConnectCore® i.MX51/Wi-i.MX51 SOM\nand basic support for the ConnectCore for i.MX51 JumpStart Kit.\n\nSigned-off-by: Alexander Shiyan <shc_work@mail.ru>\n---\n arch/arm/boot/dts/Makefile | 1 +\n arch/arm/boot/dts/imx51-digi-connectcore-jsk.dts | 108 ++++++\n arch/arm/boot/dts/imx51-digi-connectcore-som.dtsi | 389 ++++++++++++++++++++++\n 3 files changed, 498 insertions(+)\n create mode 100644 arch/arm/boot/dts/imx51-digi-connectcore-jsk.dts\n create mode 100644 arch/arm/boot/dts/imx51-digi-connectcore-som.dtsi", "diff": "diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile\nindex 8f68a0a..91a58eb 100644\n--- a/arch/arm/boot/dts/Makefile\n+++ b/arch/arm/boot/dts/Makefile\n@@ -164,6 +164,7 @@ dtb-$(CONFIG_ARCH_MXC) += \\\n \timx51-apf51.dtb \\\n \timx51-apf51dev.dtb \\\n \timx51-babbage.dtb \\\n+\timx51-digi-connectcore-jsk.dtb \\\n \timx51-eukrea-mbimxsd51-baseboard.dtb \\\n \timx53-ard.dtb \\\n \timx53-m53evk.dtb \\\ndiff --git a/arch/arm/boot/dts/imx51-digi-connectcore-jsk.dts b/arch/arm/boot/dts/imx51-digi-connectcore-jsk.dts\nnew file mode 100644\nindex 0000000..1db517d\n--- /dev/null\n+++ b/arch/arm/boot/dts/imx51-digi-connectcore-jsk.dts\n@@ -0,0 +1,108 @@\n+/*\n+ * Copyright (C) 2014 Alexander Shiyan <shc_work@mail.ru>\n+ *\n+ * The code contained herein is licensed under the GNU General Public\n+ * License. You may obtain a copy of the GNU General Public License\n+ * Version 2 or later at the following locations:\n+ *\n+ * http://www.opensource.org/licenses/gpl-license.html\n+ * http://www.gnu.org/copyleft/gpl.html\n+ */\n+\n+#include \"imx51-digi-connectcore-som.dtsi\"\n+\n+/ {\n+\tmodel = \"Digi ConnectCore CC(W)-MX51 JSK\";\n+\tcompatible = \"digi,connectcore-ccxmx51-jsk\",\n+\t\t \"digi,connectcore-ccxmx51-som\", \"fsl,imx51\";\n+\n+\tchosen {\n+\t\tlinux,stdout-path = &uart1;\n+\t};\n+};\n+\n+&owire {\n+\tpinctrl-names = \"default\";\n+\tpinctrl-0 = <&pinctrl_owire>;\n+\tstatus = \"okay\";\n+};\n+\n+&uart1 {\n+\tpinctrl-names = \"default\";\n+\tpinctrl-0 = <&pinctrl_uart1>;\n+\tstatus = \"okay\";\n+};\n+\n+&uart2 {\n+\tpinctrl-names = \"default\";\n+\tpinctrl-0 = <&pinctrl_uart2>;\n+\tstatus = \"okay\";\n+};\n+\n+&uart3 {\n+\tpinctrl-names = \"default\";\n+\tpinctrl-0 = <&pinctrl_uart3>;\n+\tstatus = \"okay\";\n+};\n+\n+&usbotg {\n+\tdr_mode = \"otg\";\n+\tstatus = \"okay\";\n+};\n+\n+&usbh1 {\n+\tpinctrl-names = \"default\";\n+\tpinctrl-0 = <&pinctrl_usbh1>;\n+\tdr_mode = \"host\";\n+\tphy_type = \"ulpi\";\n+\tdisable-over-current;\n+\tstatus = \"okay\";\n+};\n+\n+&iomuxc {\n+\timx51-digi-connectcore-jsk {\n+\t\tpinctrl_owire: owiregrp {\n+\t\t\tfsl,pins = <\n+\t\t\t\tMX51_PAD_OWIRE_LINE__OWIRE_LINE\t\t0x40000000\n+\t\t\t>;\n+\t\t};\n+\n+\t\tpinctrl_uart1: uart1grp {\n+\t\t\tfsl,pins = <\n+\t\t\t\tMX51_PAD_UART1_RXD__UART1_RXD\t\t0x1c5\n+\t\t\t\tMX51_PAD_UART1_TXD__UART1_TXD\t\t0x1c5\n+\t\t\t>;\n+\t\t};\n+\n+\t\tpinctrl_uart2: uart2grp {\n+\t\t\tfsl,pins = <\n+\t\t\t\tMX51_PAD_UART2_RXD__UART2_RXD\t\t0x1c5\n+\t\t\t\tMX51_PAD_UART2_TXD__UART2_TXD\t\t0x1c5\n+\t\t\t>;\n+\t\t};\n+\n+\t\tpinctrl_uart3: uart3grp {\n+\t\t\tfsl,pins = <\n+\t\t\t\tMX51_PAD_UART3_RXD__UART3_RXD\t\t0x1c5\n+\t\t\t\tMX51_PAD_UART3_TXD__UART3_TXD\t\t0x1c5\n+\t\t\t>;\n+\t\t};\n+\n+\t\tpinctrl_usbh1: usbh1grp {\n+\t\t\tfsl,pins = <\n+\t\t\t\tMX51_PAD_USBH1_DATA0__USBH1_DATA0\t0x1e5\n+\t\t\t\tMX51_PAD_USBH1_DATA1__USBH1_DATA1\t0x1e5\n+\t\t\t\tMX51_PAD_USBH1_DATA2__USBH1_DATA2\t0x1e5\n+\t\t\t\tMX51_PAD_USBH1_DATA3__USBH1_DATA3\t0x1e5\n+\t\t\t\tMX51_PAD_USBH1_DATA4__USBH1_DATA4\t0x1e5\n+\t\t\t\tMX51_PAD_USBH1_DATA5__USBH1_DATA5\t0x1e5\n+\t\t\t\tMX51_PAD_USBH1_DATA6__USBH1_DATA6\t0x1e5\n+\t\t\t\tMX51_PAD_USBH1_DATA7__USBH1_DATA7\t0x1e5\n+\t\t\t\tMX51_PAD_USBH1_CLK__USBH1_CLK\t\t0x1e5\n+\t\t\t\tMX51_PAD_USBH1_DIR__USBH1_DIR\t\t0x1e5\n+\t\t\t\tMX51_PAD_USBH1_NXT__USBH1_NXT\t\t0x1e5\n+\t\t\t\tMX51_PAD_USBH1_STP__USBH1_STP\t\t0x1e5\n+\t\t\t>;\n+\t\t};\n+\t};\n+};\ndiff --git a/arch/arm/boot/dts/imx51-digi-connectcore-som.dtsi b/arch/arm/boot/dts/imx51-digi-connectcore-som.dtsi\nnew file mode 100644\nindex 0000000..f240dfc\n--- /dev/null\n+++ b/arch/arm/boot/dts/imx51-digi-connectcore-som.dtsi\n@@ -0,0 +1,389 @@\n+/*\n+ * Copyright (C) 2014 Alexander Shiyan <shc_work@mail.ru>\n+ *\n+ * The code contained herein is licensed under the GNU General Public\n+ * License. You may obtain a copy of the GNU General Public License\n+ * Version 2 or later at the following locations:\n+ *\n+ * http://www.opensource.org/licenses/gpl-license.html\n+ * http://www.gnu.org/copyleft/gpl.html\n+ */\n+\n+/dts-v1/;\n+#include \"imx51.dtsi\"\n+\n+/ {\n+\tmodel = \"Digi ConnectCore CC(W)-MX51\";\n+\tcompatible = \"digi,connectcore-ccxmx51-som\", \"fsl,imx51\";\n+\n+\tmemory {\n+\t\treg = <0x90000000 0x08000000>;\n+\t};\n+};\n+\n+&ecspi1 {\n+\tpinctrl-names = \"default\";\n+\tpinctrl-0 = <&pinctrl_ecspi1>;\n+\tfsl,spi-num-chipselects = <1>;\n+\tcs-gpios = <&gpio4 24 GPIO_ACTIVE_HIGH>;\n+\tstatus = \"okay\";\n+\n+\tpmic: mc13892@0 {\n+\t\tpinctrl-names = \"default\";\n+\t\tpinctrl-0 = <&pinctrl_mc13892>;\n+\t\tcompatible = \"fsl,mc13892\";\n+\t\tspi-max-frequency = <16000000>;\n+\t\tspi-cs-high;\n+\t\treg = <0>;\n+\t\tinterrupt-parent = <&gpio1>;\n+\t\tinterrupts = <5 IRQ_TYPE_LEVEL_HIGH>;\n+\t\tfsl,mc13xxx-uses-rtc;\n+\n+\t\tregulators {\n+\t\t\tsw1_reg: sw1 {\n+\t\t\t\tregulator-min-microvolt = <1000000>;\n+\t\t\t\tregulator-max-microvolt = <1100000>;\n+\t\t\t\tregulator-boot-on;\n+\t\t\t\tregulator-always-on;\n+\t\t\t};\n+\n+\t\t\tsw2_reg: sw2 {\n+\t\t\t\tregulator-min-microvolt = <1225000>;\n+\t\t\t\tregulator-max-microvolt = <1225000>;\n+\t\t\t\tregulator-boot-on;\n+\t\t\t\tregulator-always-on;\n+\t\t\t};\n+\n+\t\t\tsw3_reg: sw3 {\n+\t\t\t\tregulator-min-microvolt = <1200000>;\n+\t\t\t\tregulator-max-microvolt = <1200000>;\n+\t\t\t\tregulator-boot-on;\n+\t\t\t\tregulator-always-on;\n+\t\t\t};\n+\n+\t\t\tswbst_reg: swbst { };\n+\n+\t\t\tviohi_reg: viohi {\n+\t\t\t\tregulator-always-on;\n+\t\t\t};\n+\n+\t\t\tvpll_reg: vpll {\n+\t\t\t\tregulator-min-microvolt = <1800000>;\n+\t\t\t\tregulator-max-microvolt = <1800000>;\n+\t\t\t\tregulator-always-on;\n+\t\t\t};\n+\n+\t\t\tvdig_reg: vdig {\n+\t\t\t\tregulator-min-microvolt = <1250000>;\n+\t\t\t\tregulator-max-microvolt = <1250000>;\n+\t\t\t\tregulator-always-on;\n+\t\t\t};\n+\n+\t\t\tvsd_reg: vsd {\n+\t\t\t\tregulator-min-microvolt = <3150000>;\n+\t\t\t\tregulator-max-microvolt = <3150000>;\n+\t\t\t\tregulator-always-on;\n+\t\t\t};\n+\n+\t\t\tvusb2_reg: vusb2 {\n+\t\t\t\tregulator-min-microvolt = <2600000>;\n+\t\t\t\tregulator-max-microvolt = <2600000>;\n+\t\t\t\tregulator-always-on;\n+\t\t\t};\n+\n+\t\t\tvvideo_reg: vvideo {\n+\t\t\t\tregulator-min-microvolt = <2775000>;\n+\t\t\t\tregulator-max-microvolt = <2775000>;\n+\t\t\t\tregulator-always-on;\n+\t\t\t};\n+\n+\t\t\tvaudio_reg: vaudio {\n+\t\t\t\tregulator-min-microvolt = <3000000>;\n+\t\t\t\tregulator-max-microvolt = <3000000>;\n+\t\t\t\tregulator-always-on;\n+\t\t\t};\n+\n+\t\t\tvcam_reg: vcam {\n+\t\t\t\tregulator-min-microvolt = <2750000>;\n+\t\t\t\tregulator-max-microvolt = <2750000>;\n+\t\t\t\tregulator-always-on;\n+\t\t\t};\n+\n+\t\t\tvgen1_reg: vgen1 {\n+\t\t\t\tregulator-min-microvolt = <1200000>;\n+\t\t\t\tregulator-max-microvolt = <1200000>;\n+\t\t\t\tregulator-always-on;\n+\t\t\t};\n+\n+\t\t\tvgen2_reg: vgen2 {\n+\t\t\t\tregulator-min-microvolt = <3150000>;\n+\t\t\t\tregulator-max-microvolt = <3150000>;\n+\t\t\t\tregulator-always-on;\n+\t\t\t};\n+\n+\t\t\tvgen3_reg: vgen3 {\n+\t\t\t\tregulator-min-microvolt = <1800000>;\n+\t\t\t\tregulator-max-microvolt = <1800000>;\n+\t\t\t\tregulator-always-on;\n+\t\t\t};\n+\n+\t\t\tvusb_reg: vusb {\n+\t\t\t\tregulator-always-on;\n+\t\t\t};\n+\n+\t\t\tgpo1_reg: gpo1 { };\n+\n+\t\t\tgpo2_reg: gpo2 { };\n+\n+\t\t\tgpo3_reg: gpo3 { };\n+\n+\t\t\tgpo4_reg: gpo4 { };\n+\n+\t\t\tpwgt2spi_reg: pwgt2spi {\n+\t\t\t\tregulator-always-on;\n+\t\t\t};\n+\n+\t\t\tvcoincell_reg: vcoincell {\n+\t\t\t\tregulator-min-microvolt = <3000000>;\n+\t\t\t\tregulator-max-microvolt = <3000000>;\n+\t\t\t\tregulator-always-on;\n+\t\t\t};\n+\t\t};\n+\t};\n+};\n+\n+&esdhc2 {\n+\tpinctrl-names = \"default\";\n+\tpinctrl-0 = <&pinctrl_esdhc2>;\n+\tcap-sdio-irq;\n+\tenable-sdio-wakeup;\n+\tkeep-power-in-suspend;\n+\tmax-frequency = <50000000>;\n+\tno-1-8-v;\n+\tnon-removable;\n+\tvmmc-supply = <&gpo4_reg>;\n+\tstatus = \"okay\";\n+};\n+\n+&fec {\n+\tpinctrl-names = \"default\";\n+\tpinctrl-0 = <&pinctrl_fec>;\n+\tphy-mode = \"mii\";\n+\tphy-supply = <&gpo3_reg>;\n+\t/* Pins shared with LCD2, keep status disabled */\n+};\n+\n+&i2c2 {\n+\tpinctrl-names = \"default\";\n+\tpinctrl-0 = <&pinctrl_i2c2>;\n+\tclock-frequency = <400000>;\n+\tstatus = \"okay\";\n+\n+\tmma7455l@1d {\n+\t\tpinctrl-names = \"default\";\n+\t\tpinctrl-0 = <&pinctrl_mma7455l>;\n+\t\tcompatible = \"fsl,mma7455l\";\n+\t\treg = <0x1d>;\n+\t\tinterrupt-parent = <&gpio1>;\n+\t\tinterrupts = <7 IRQ_TYPE_LEVEL_HIGH>, <6 IRQ_TYPE_LEVEL_HIGH>;\n+\t};\n+};\n+\n+&nfc {\n+\tpinctrl-names = \"default\";\n+\tpinctrl-0 = <&pinctrl_nfc>;\n+\tnand-bus-width = <8>;\n+\tnand-ecc-mode = \"hw\";\n+\tnand-on-flash-bbt;\n+\t#address-cells = <1>;\n+\t#size-cells = <1>;\n+\tstatus = \"okay\";\n+\n+\tpartition@0 {\n+\t\tlabel = \"boot\";\n+\t\treg = <0x00000 0x80000>;\n+\t};\n+\n+\tpartition@1 {\n+\t\tlabel = \"env\";\n+\t\treg = <0x80000 0x40000>;\n+\t};\n+};\n+\n+&usbotg {\n+\tphy_type = \"utmi_wide\";\n+\tdisable-over-current;\n+\t/* Device role is not known, keep status disabled */\n+};\n+\n+&weim {\n+\tpinctrl-names = \"default\";\n+\tpinctrl-0 = <&pinctrl_weim>;\n+\tstatus = \"okay\";\n+\n+\tlan9221: lan9221@ce000000 {\n+\t\tpinctrl-names = \"default\";\n+\t\tpinctrl-0 = <&pinctrl_lan9221>;\n+\t\tcompatible = \"smsc,lan9221\", \"smsc,lan9115\";\n+\t\treg = <5 0x00000000 0x1000>;\n+\t\tfsl,weim-cs-timing = <\n+\t\t\t0x00420081 0x00000000\n+\t\t\t0x32260000 0x00000000\n+\t\t\t0x72080f00 0x00000000\n+\t\t>;\n+\t\tclocks = <&clks IMX5_CLK_DUMMY>;\n+\t\tinterrupt-parent = <&gpio1>;\n+\t\tinterrupts = <9 IRQ_TYPE_LEVEL_LOW>;\n+\t\tphy-mode = \"mii\";\n+\t\treg-io-width = <2>;\n+\t\tsmsc,irq-push-pull;\n+\t\tvdd33a-supply = <&gpo2_reg>;\n+\t\tvddvario-supply = <&gpo2_reg>;\n+\t};\n+};\n+\n+&iomuxc {\n+\timx51-digi-connectcore-som {\n+\t\tpinctrl_ecspi1: ecspi1grp {\n+\t\t\tfsl,pins = <\n+\t\t\t\tMX51_PAD_CSPI1_MISO__ECSPI1_MISO\t0x185\n+\t\t\t\tMX51_PAD_CSPI1_MOSI__ECSPI1_MOSI\t0x185\n+\t\t\t\tMX51_PAD_CSPI1_SCLK__ECSPI1_SCLK\t0x185\n+\t\t\t\tMX51_PAD_CSPI1_SS0__GPIO4_24\t\t0x85 /* CS0 */\n+\t\t\t>;\n+\t\t};\n+\n+\t\tpinctrl_esdhc2: esdhc2grp {\n+\t\t\tfsl,pins = <\n+\t\t\t\tMX51_PAD_SD2_CMD__SD2_CMD\t\t0x400020d5\n+\t\t\t\tMX51_PAD_SD2_CLK__SD2_CLK\t\t0x20d5\n+\t\t\t\tMX51_PAD_SD2_DATA0__SD2_DATA0\t\t0x20d5\n+\t\t\t\tMX51_PAD_SD2_DATA1__SD2_DATA1\t\t0x20d5\n+\t\t\t\tMX51_PAD_SD2_DATA2__SD2_DATA2\t\t0x20d5\n+\t\t\t\tMX51_PAD_SD2_DATA3__SD2_DATA3\t\t0x20d5\n+\t\t\t>;\n+\t\t};\n+\n+\t\tpinctrl_fec: fecgrp {\n+\t\t\tfsl,pins = <\n+\t\t\t\tMX51_PAD_DI_GP3__FEC_TX_ER\t\t0x80000000\n+\t\t\t\tMX51_PAD_DI2_PIN4__FEC_CRS\t\t0x80000000\n+\t\t\t\tMX51_PAD_DI2_PIN2__FEC_MDC\t\t0x80000000\n+\t\t\t\tMX51_PAD_DI2_PIN3__FEC_MDIO\t\t0x80000000\n+\t\t\t\tMX51_PAD_DI2_DISP_CLK__FEC_RDATA1\t0x80000000\n+\t\t\t\tMX51_PAD_DI_GP4__FEC_RDATA2\t\t0x80000000\n+\t\t\t\tMX51_PAD_DISP2_DAT0__FEC_RDATA3\t\t0x80000000\n+\t\t\t\tMX51_PAD_DISP2_DAT1__FEC_RX_ER\t\t0x80000000\n+\t\t\t\tMX51_PAD_DISP2_DAT6__FEC_TDATA1\t\t0x80000000\n+\t\t\t\tMX51_PAD_DISP2_DAT7__FEC_TDATA2\t\t0x80000000\n+\t\t\t\tMX51_PAD_DISP2_DAT8__FEC_TDATA3\t\t0x80000000\n+\t\t\t\tMX51_PAD_DISP2_DAT9__FEC_TX_EN\t\t0x80000000\n+\t\t\t\tMX51_PAD_DISP2_DAT10__FEC_COL\t\t0x80000000\n+\t\t\t\tMX51_PAD_DISP2_DAT11__FEC_RX_CLK\t0x80000000\n+\t\t\t\tMX51_PAD_DISP2_DAT12__FEC_RX_DV\t\t0x80000000\n+\t\t\t\tMX51_PAD_DISP2_DAT13__FEC_TX_CLK\t0x80000000\n+\t\t\t\tMX51_PAD_DISP2_DAT14__FEC_RDATA0\t0x80000000\n+\t\t\t\tMX51_PAD_DISP2_DAT15__FEC_TDATA0\t0x80000000\n+\t\t\t>;\n+\t\t};\n+\n+\t\tpinctrl_i2c2: i2c2grp {\n+\t\t\tfsl,pins = <\n+\t\t\t\tMX51_PAD_GPIO1_2__I2C2_SCL\t\t0x400001ed\n+\t\t\t\tMX51_PAD_GPIO1_3__I2C2_SDA\t\t0x400001ed\n+\t\t\t>;\n+\t\t};\n+\n+\t\tpinctrl_nfc: nfcgrp {\n+\t\t\tfsl,pins = <\n+\t\t\t\tMX51_PAD_NANDF_D0__NANDF_D0\t\t0x80000000\n+\t\t\t\tMX51_PAD_NANDF_D1__NANDF_D1\t\t0x80000000\n+\t\t\t\tMX51_PAD_NANDF_D2__NANDF_D2\t\t0x80000000\n+\t\t\t\tMX51_PAD_NANDF_D3__NANDF_D3\t\t0x80000000\n+\t\t\t\tMX51_PAD_NANDF_D4__NANDF_D4\t\t0x80000000\n+\t\t\t\tMX51_PAD_NANDF_D5__NANDF_D5\t\t0x80000000\n+\t\t\t\tMX51_PAD_NANDF_D6__NANDF_D6\t\t0x80000000\n+\t\t\t\tMX51_PAD_NANDF_D7__NANDF_D7\t\t0x80000000\n+\t\t\t\tMX51_PAD_NANDF_ALE__NANDF_ALE\t\t0x80000000\n+\t\t\t\tMX51_PAD_NANDF_CLE__NANDF_CLE\t\t0x80000000\n+\t\t\t\tMX51_PAD_NANDF_RE_B__NANDF_RE_B\t\t0x80000000\n+\t\t\t\tMX51_PAD_NANDF_WE_B__NANDF_WE_B\t\t0x80000000\n+\t\t\t\tMX51_PAD_NANDF_WP_B__NANDF_WP_B\t\t0x80000000\n+\t\t\t\tMX51_PAD_NANDF_CS0__NANDF_CS0\t\t0x80000000\n+\t\t\t\tMX51_PAD_NANDF_RB0__NANDF_RB0\t\t0x80000000\n+\t\t\t>;\n+\t\t};\n+\n+\t\tpinctrl_lan9221: lan9221grp {\n+\t\t\tfsl,pins = <\n+\t\t\t\tMX51_PAD_EIM_CS5__EIM_CS5\t\t0x80000000 /* CS5 */\n+\t\t\t\tMX51_PAD_GPIO1_9__GPIO1_9\t\t0xe5 /* IRQ */\n+\t\t\t>;\n+\t\t};\n+\n+\t\tpinctrl_mc13892: mc13892grp {\n+\t\t\tfsl,pins = <\n+\t\t\t\tMX51_PAD_GPIO1_5__GPIO1_5\t\t0xe5 /* IRQ */\n+\t\t\t>;\n+\t\t};\n+\n+\t\tpinctrl_mma7455l: mma7455lgrp {\n+\t\t\tfsl,pins = <\n+\t\t\t\tMX51_PAD_GPIO1_7__GPIO1_7\t\t0xe5 /* IRQ1 */\n+\t\t\t\tMX51_PAD_GPIO1_6__GPIO1_6\t\t0xe5 /* IRQ2 */\n+\t\t\t>;\n+\t\t};\n+\n+\t\tpinctrl_weim: weimgrp {\n+\t\t\tfsl,pins = <\n+\t\t\t\tMX51_PAD_EIM_DA0__EIM_DA0\t\t0x80000000\n+\t\t\t\tMX51_PAD_EIM_DA1__EIM_DA1\t\t0x80000000\n+\t\t\t\tMX51_PAD_EIM_DA2__EIM_DA2\t\t0x80000000\n+\t\t\t\tMX51_PAD_EIM_DA3__EIM_DA3\t\t0x80000000\n+\t\t\t\tMX51_PAD_EIM_DA4__EIM_DA4\t\t0x80000000\n+\t\t\t\tMX51_PAD_EIM_DA5__EIM_DA5\t\t0x80000000\n+\t\t\t\tMX51_PAD_EIM_DA6__EIM_DA6\t\t0x80000000\n+\t\t\t\tMX51_PAD_EIM_DA7__EIM_DA7\t\t0x80000000\n+\t\t\t\tMX51_PAD_EIM_DA8__EIM_DA8\t\t0x80000000\n+\t\t\t\tMX51_PAD_EIM_DA9__EIM_DA9\t\t0x80000000\n+\t\t\t\tMX51_PAD_EIM_DA10__EIM_DA10\t\t0x80000000\n+\t\t\t\tMX51_PAD_EIM_DA11__EIM_DA11\t\t0x80000000\n+\t\t\t\tMX51_PAD_EIM_DA12__EIM_DA12\t\t0x80000000\n+\t\t\t\tMX51_PAD_EIM_DA13__EIM_DA13\t\t0x80000000\n+\t\t\t\tMX51_PAD_EIM_DA14__EIM_DA14\t\t0x80000000\n+\t\t\t\tMX51_PAD_EIM_DA15__EIM_DA15\t\t0x80000000\n+\t\t\t\tMX51_PAD_EIM_A16__EIM_A16\t\t0x80000000\n+\t\t\t\tMX51_PAD_EIM_A17__EIM_A17\t\t0x80000000\n+\t\t\t\tMX51_PAD_EIM_A18__EIM_A18\t\t0x80000000\n+\t\t\t\tMX51_PAD_EIM_A19__EIM_A19\t\t0x80000000\n+\t\t\t\tMX51_PAD_EIM_A20__EIM_A20\t\t0x80000000\n+\t\t\t\tMX51_PAD_EIM_A21__EIM_A21\t\t0x80000000\n+\t\t\t\tMX51_PAD_EIM_A22__EIM_A22\t\t0x80000000\n+\t\t\t\tMX51_PAD_EIM_A23__EIM_A23\t\t0x80000000\n+\t\t\t\tMX51_PAD_EIM_A24__EIM_A24\t\t0x80000000\n+\t\t\t\tMX51_PAD_EIM_A25__EIM_A25\t\t0x80000000\n+\t\t\t\tMX51_PAD_EIM_A26__EIM_A26\t\t0x80000000\n+\t\t\t\tMX51_PAD_EIM_A27__EIM_A27\t\t0x80000000\n+\t\t\t\tMX51_PAD_EIM_D16__EIM_D16\t\t0x80000000\n+\t\t\t\tMX51_PAD_EIM_D17__EIM_D17\t\t0x80000000\n+\t\t\t\tMX51_PAD_EIM_D18__EIM_D18\t\t0x80000000\n+\t\t\t\tMX51_PAD_EIM_D19__EIM_D19\t\t0x80000000\n+\t\t\t\tMX51_PAD_EIM_D20__EIM_D20\t\t0x80000000\n+\t\t\t\tMX51_PAD_EIM_D21__EIM_D21\t\t0x80000000\n+\t\t\t\tMX51_PAD_EIM_D22__EIM_D22\t\t0x80000000\n+\t\t\t\tMX51_PAD_EIM_D23__EIM_D23\t\t0x80000000\n+\t\t\t\tMX51_PAD_EIM_D24__EIM_D24\t\t0x80000000\n+\t\t\t\tMX51_PAD_EIM_D25__EIM_D25\t\t0x80000000\n+\t\t\t\tMX51_PAD_EIM_D26__EIM_D26\t\t0x80000000\n+\t\t\t\tMX51_PAD_EIM_D27__EIM_D27\t\t0x80000000\n+\t\t\t\tMX51_PAD_EIM_D28__EIM_D28\t\t0x80000000\n+\t\t\t\tMX51_PAD_EIM_D29__EIM_D29\t\t0x80000000\n+\t\t\t\tMX51_PAD_EIM_D30__EIM_D30\t\t0x80000000\n+\t\t\t\tMX51_PAD_EIM_D31__EIM_D31\t\t0x80000000\n+\t\t\t\tMX51_PAD_EIM_OE__EIM_OE\t\t\t0x80000000\n+\t\t\t\tMX51_PAD_EIM_DTACK__EIM_DTACK\t\t0x80000000\n+\t\t\t\tMX51_PAD_EIM_LBA__EIM_LBA\t\t0x80000000\n+\t\t\t>;\n+\t\t};\n+\t};\n+};\n", "prefixes": [] }