Patch Detail
get:
Show a patch.
patch:
Update a patch.
put:
Update a patch.
GET /api/patches/291441/?format=api
{ "id": 291441, "url": "http://patchwork.ozlabs.org/api/patches/291441/?format=api", "web_url": "http://patchwork.ozlabs.org/project/uboot/patch/1384487159-43032-10-git-send-email-fenghua@phytium.com.cn/", "project": { "id": 18, "url": "http://patchwork.ozlabs.org/api/projects/18/?format=api", "name": "U-Boot", "link_name": "uboot", "list_id": "u-boot.lists.denx.de", "list_email": "u-boot@lists.denx.de", "web_url": null, "scm_url": null, "webscm_url": null, "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<1384487159-43032-10-git-send-email-fenghua@phytium.com.cn>", "list_archive_url": null, "date": "2013-11-15T03:45:58", "name": "[U-Boot,v15,09/10] arm64: board support of vexpress_aemv8a", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": false, "hash": "004233d36ea4ffb6d8b69f34fc4078d2c0c46a93", "submitter": { "id": 34808, "url": "http://patchwork.ozlabs.org/api/people/34808/?format=api", "name": null, "email": "fenghua@phytium.com.cn" }, "delegate": { "id": 1694, "url": "http://patchwork.ozlabs.org/api/users/1694/?format=api", "username": "aaribaud", "first_name": "Albert", "last_name": "ARIBAUD", "email": "albert.aribaud@free.fr" }, "mbox": "http://patchwork.ozlabs.org/project/uboot/patch/1384487159-43032-10-git-send-email-fenghua@phytium.com.cn/mbox/", "series": [], "comments": "http://patchwork.ozlabs.org/api/patches/291441/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/291441/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<u-boot-bounces@lists.denx.de>", "X-Original-To": "incoming@patchwork.ozlabs.org", "Delivered-To": "patchwork-incoming@bilbo.ozlabs.org", "Received": [ "from theia.denx.de (theia.denx.de [85.214.87.163])\n\tby ozlabs.org (Postfix) with ESMTP id 9B9172C00BC\n\tfor <incoming@patchwork.ozlabs.org>;\n\tFri, 15 Nov 2013 14:49:01 +1100 (EST)", "from localhost (localhost [127.0.0.1])\n\tby theia.denx.de (Postfix) with ESMTP id 3D51F4AE3E;\n\tFri, 15 Nov 2013 04:48:34 +0100 (CET)", "from theia.denx.de ([127.0.0.1])\n\tby localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024)\n\twith ESMTP id BJ0kzqVsrpBL; Fri, 15 Nov 2013 04:48:34 +0100 (CET)", "from theia.denx.de (localhost [127.0.0.1])\n\tby theia.denx.de (Postfix) with ESMTP id F3CC54AE13;\n\tFri, 15 Nov 2013 04:48:09 +0100 (CET)", "from localhost (localhost [127.0.0.1])\n\tby theia.denx.de (Postfix) with ESMTP id 9AE7F4ADD8\n\tfor <u-boot@lists.denx.de>; Fri, 15 Nov 2013 04:48:07 +0100 (CET)", "from theia.denx.de ([127.0.0.1])\n\tby localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024)\n\twith ESMTP id nVYphdwX8cqL for <u-boot@lists.denx.de>;\n\tFri, 15 Nov 2013 04:48:02 +0100 (CET)", "from mail.corpease.net (mail10.corpease.net [61.145.121.76])\n\tby theia.denx.de (Postfix) with ESMTP id 250A74ADEF\n\tfor <u-boot@lists.denx.de>; Fri, 15 Nov 2013 04:47:44 +0100 (CET)", "from localhost (unknown [220.202.153.92])\n\tby mail10.corpease.net (Coremail) with SMTP id\n\tTAGowJDrH3xRmYVShR02AA--.6292S3; \n\tFri, 15 Nov 2013 11:47:31 +0800 (CST)" ], "X-Virus-Scanned": [ "Debian amavisd-new at theia.denx.de", "Debian amavisd-new at theia.denx.de" ], "X-policyd-weight": "NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5\n\tNOT_IN_BL_NJABL=-1.5 (only DNSBL check requested)", "From": "fenghua@phytium.com.cn", "To": "u-boot@lists.denx.de", "Date": "Fri, 15 Nov 2013 11:45:58 +0800", "Message-Id": "<1384487159-43032-10-git-send-email-fenghua@phytium.com.cn>", "X-Mailer": "git-send-email 1.7.9.5", "In-Reply-To": "<1384487159-43032-9-git-send-email-fenghua@phytium.com.cn>", "References": "<1384487159-43032-1-git-send-email-fenghua@phytium.com.cn>\n\t<1384487159-43032-2-git-send-email-fenghua@phytium.com.cn>\n\t<1384487159-43032-3-git-send-email-fenghua@phytium.com.cn>\n\t<1384487159-43032-4-git-send-email-fenghua@phytium.com.cn>\n\t<1384487159-43032-5-git-send-email-fenghua@phytium.com.cn>\n\t<1384487159-43032-6-git-send-email-fenghua@phytium.com.cn>\n\t<1384487159-43032-7-git-send-email-fenghua@phytium.com.cn>\n\t<1384487159-43032-8-git-send-email-fenghua@phytium.com.cn>\n\t<1384487159-43032-9-git-send-email-fenghua@phytium.com.cn>", "MIME-Version": "1.0", "X-CM-TRANSID": "TAGowJDrH3xRmYVShR02AA--.6292S3", "X-Coremail-Antispam": "1UD129KBjvJXoW3XFyrJr4xAr4Utry3ArWfGrg_yoWfurW7pF\n\t93AFWFkws7Ja1Ig3ySkF15Cr9xtrWUAry8Jw17Zr45XF1rJws7Grn09r45tryUXws5GFW8\n\tG3Z7Ja1a9r9xX3DanT9S1TB71UUUUUUqnTZGkaVYY2UrUUUUjbIjqfuFe4nvWSU5nxnvy2\n\t9KBjDU0xBIdaVrnRJUUUdKb7IF0VCYb41lb7IF0VCFI7km07C26c804VAKzcIF0wAYjxAI\n\t6xZILanIXVAFwwAYjxAI6IIYrVAFwwAYjsxI4VWxJwAYFVCjjxCrM7AC8VAFwI0_Gr0_Xr\n\t1l1xkIjI8I6I8E6xAIw20EY4v20xvaj40_Wr0E3s1l1IIY67AEw4v_Jr0_Jr4l8cAvFVAK\n\t0II2c7xJM28CjxkF64kEwVA0rcxSw2x7M28EF7xvwVC0I7IYx2IY67AKxVWUCVW8JwA2z4\n\tx0Y4vE2Ix0cI8IcVCY1x0267AKxVWxJVW8Jr1l84ACjcxK6I8E87Iv67AKxVW8JVWxJwA2\n\tz4x0Y4vEx4A2jsIEc7CjxVAFwI0_Gr0_Gr1UM2kK6xCIbVAIwIAEc20F6c8GOVW8Jr15Jr\n\t4le2I262IYc4CY6c8Ij28IcVAaY2xG8wAqjxCE34x0Y48IcwAqx4xG64xvF2IEw4CE5I8C\n\trVC2j2WlYx0E2Ix0cI8IcVAFwI0_Jw0_WrylYx0Ex4A2jsIE14v26r4j6F4UMcvjeVCFs4\n\tIE7xkEbVWUJVW8JwACjcxG0xvY0x0EwIxGrwACjI8F5VA0II8E6IAqYI8I648v4I1lw4CE\n\tc2x0rVAKj4xxMxkIecxEwVAFwVW8GwCF04k20xvY0x0EwIxGrwCFx2IqxVCFs4IE7xkEbV\n\tWUJVW8JwCFI7vE0wC20s026c02F40E14v26r1j6r18MI8I3I0E7480Y4vE14v26r106r1r\n\tMI8E67AF67kF1VAFwI0_JF0_Jw1lIxkGc2Ij64vIr41lIxAIcVC0I7IYx2IY67AKxVWUCV\n\tW8JwCI42IY6xIIjxv20xvEc7CjxVAFwI0_Cr0_Gr1UMIIF0xvE42xK8VAvwI8IcIk0rVWU\n\tJVWUCwCI42IY6I8E87Iv67AKxVWUJVW8JwCI42IY6I8E87Iv6xkF7I0E14v26r4j6r4UJb\n\tIYCTnIWIevJa73UjIFyTuYvj7q7JbAUUUUU", "X-Originating-IP": "[220.202.153.92]", "X-CM-SenderInfo": "pihqwxdxd61x51wl3zoofrzhdfq/", "Cc": "trini@ti.com, scottwood@freescale.com", "Subject": "[U-Boot] =?utf-8?q?=5BPATCH_v15_09/10=5D_arm64=3A_board_support_o?=\n\t=?utf-8?q?f_vexpress=5Faemv8a?=", "X-BeenThere": "u-boot@lists.denx.de", "X-Mailman-Version": "2.1.11", "Precedence": "list", "List-Id": "U-Boot discussion <u-boot.lists.denx.de>", "List-Unsubscribe": "<http://lists.denx.de/mailman/options/u-boot>,\n\t<mailto:u-boot-request@lists.denx.de?subject=unsubscribe>", "List-Archive": "<http://lists.denx.de/pipermail/u-boot>", "List-Post": "<mailto:u-boot@lists.denx.de>", "List-Help": "<mailto:u-boot-request@lists.denx.de?subject=help>", "List-Subscribe": "<http://lists.denx.de/mailman/listinfo/u-boot>,\n\t<mailto:u-boot-request@lists.denx.de?subject=subscribe>", "Content-Type": "text/plain; charset=\"utf-8\"", "Content-Transfer-Encoding": "base64", "Sender": "u-boot-bounces@lists.denx.de", "Errors-To": "u-boot-bounces@lists.denx.de" }, "content": "From: David Feng <fenghua@phytium.com.cn>\n\nSigned-off-by: David Feng <fenghua@phytium.com.cn>\nSigned-off-by: Bhupesh Sharma <bhupesh.sharma@freescale.com>\n---\n board/armltd/vexpress64/Makefile | 8 ++\n board/armltd/vexpress64/vexpress64.c | 56 ++++++++++\n boards.cfg | 1 +\n include/configs/vexpress_aemv8a.h | 189 ++++++++++++++++++++++++++++++++++\n 4 files changed, 254 insertions(+)\n create mode 100644 board/armltd/vexpress64/Makefile\n create mode 100644 board/armltd/vexpress64/vexpress64.c\n create mode 100644 include/configs/vexpress_aemv8a.h", "diff": "diff --git a/board/armltd/vexpress64/Makefile b/board/armltd/vexpress64/Makefile\nnew file mode 100644\nindex 0000000..e009141\n--- /dev/null\n+++ b/board/armltd/vexpress64/Makefile\n@@ -0,0 +1,8 @@\n+#\n+# (C) Copyright 2000-2004\n+# Wolfgang Denk, DENX Software Engineering, wd@denx.de.\n+#\n+# SPDX-License-Identifier:\tGPL-2.0+\n+#\n+\n+obj-y\t:= vexpress64.o\ndiff --git a/board/armltd/vexpress64/vexpress64.c b/board/armltd/vexpress64/vexpress64.c\nnew file mode 100644\nindex 0000000..2ec3bc9\n--- /dev/null\n+++ b/board/armltd/vexpress64/vexpress64.c\n@@ -0,0 +1,56 @@\n+/*\n+ * (C) Copyright 2013\n+ * David Feng <fenghua@phytium.com.cn>\n+ * Sharma Bhupesh <bhupesh.sharma@freescale.com>\n+ *\n+ * SPDX-License-Identifier:\tGPL-2.0+\n+ */\n+#include <common.h>\n+#include <malloc.h>\n+#include <errno.h>\n+#include <netdev.h>\n+#include <asm/io.h>\n+#include <linux/compiler.h>\n+\n+DECLARE_GLOBAL_DATA_PTR;\n+\n+int board_init(void)\n+{\n+\treturn 0;\n+}\n+\n+int dram_init(void)\n+{\n+\t/*\n+\t * Clear spin table so that secondary processors\n+\t * observe the correct value after waken up from wfe.\n+\t */\n+\t*(unsigned long *)CPU_RELEASE_ADDR = 0;\n+\n+\tgd->ram_size = PHYS_SDRAM_1_SIZE;\n+\treturn 0;\n+}\n+\n+int timer_init(void)\n+{\n+\treturn 0;\n+}\n+\n+/*\n+ * Board specific reset that is system reset.\n+ */\n+void reset_cpu(ulong addr)\n+{\n+}\n+\n+/*\n+ * Board specific ethernet initialization routine.\n+ */\n+int board_eth_init(bd_t *bis)\n+{\n+\tint rc = 0;\n+#ifdef CONFIG_SMC91111\n+\trc = smc91111_initialize(0, CONFIG_SMC91111_BASE);\n+#endif\n+\treturn rc;\n+}\ndiff --git a/boards.cfg b/boards.cfg\nindex caba64e..5e0c99a 100644\n--- a/boards.cfg\n+++ b/boards.cfg\n@@ -386,6 +386,7 @@ Active arm pxa - - vpac270\n Active arm pxa - icpdas lp8x4x lp8x4x - Sergey Yanovich <ynvich@gmail.com>\n Active arm pxa - toradex - colibri_pxa270 - Marek Vasut <marek.vasut@gmail.com>\n Active arm sa1100 - - - jornada - Kristoffer Ericson <kristoffer.ericson@gmail.com>\n+Active arm armv8 - armltd vexpress64 vexpress_aemv8a vexpress_aemv8a:ARM64 David Feng <fenghua@phytium.com.cn>\n Active avr32 at32ap at32ap700x atmel - atngw100 - Haavard Skinnemoen <haavard.skinnemoen@atmel.com>\n Active avr32 at32ap at32ap700x atmel - atngw100mkii - Andreas Bießmann <andreas.devel@googlemail.com>\n Active avr32 at32ap at32ap700x atmel atstk1000 atstk1002 - Haavard Skinnemoen <haavard.skinnemoen@atmel.com>\ndiff --git a/include/configs/vexpress_aemv8a.h b/include/configs/vexpress_aemv8a.h\nnew file mode 100644\nindex 0000000..ce5f384\n--- /dev/null\n+++ b/include/configs/vexpress_aemv8a.h\n@@ -0,0 +1,189 @@\n+/*\n+ * Configuration for Versatile Express. Parts were derived from other ARM\n+ * configurations.\n+ *\n+ * SPDX-License-Identifier:\tGPL-2.0+\n+ */\n+\n+#ifndef __VEXPRESS_AEMV8A_H\n+#define __VEXPRESS_AEMV8A_H\n+\n+#define DEBUG\n+\n+#define CONFIG_REMAKE_ELF\n+\n+/*#define CONFIG_ARMV8_SWITCH_TO_EL1*/\n+\n+/*#define CONFIG_SYS_GENERIC_BOARD*/\n+\n+#define CONFIG_SYS_NO_FLASH\n+\n+#define CONFIG_SUPPORT_RAW_INITRD\n+\n+/* Cache Definitions */\n+#define CONFIG_SYS_DCACHE_OFF\n+#define CONFIG_SYS_ICACHE_OFF\n+\n+#define CONFIG_IDENT_STRING\t\t\" vexpress_aemv8a\"\n+#define CONFIG_BOOTP_VCI_STRING\t\t\"U-boot.armv8.vexpress_aemv8a\"\n+\n+/* Link Definitions */\n+#define CONFIG_SYS_TEXT_BASE\t\t0x80000000\n+#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + 0x7fff0)\n+\n+/* Flat Device Tree Definitions */\n+#define CONFIG_OF_LIBFDT\n+\n+#define CONFIG_DEFAULT_DEVICE_TREE\tvexpress64\n+\n+/* SMP Spin Table Definitions */\n+#define CPU_RELEASE_ADDR\t\t(CONFIG_SYS_SDRAM_BASE + 0x7fff0)\n+\n+/* CS register bases for the original memory map. */\n+#define V2M_PA_CS0\t\t\t0x00000000\n+#define V2M_PA_CS1\t\t\t0x14000000\n+#define V2M_PA_CS2\t\t\t0x18000000\n+#define V2M_PA_CS3\t\t\t0x1c000000\n+#define V2M_PA_CS4\t\t\t0x0c000000\n+#define V2M_PA_CS5\t\t\t0x10000000\n+\n+#define V2M_PERIPH_OFFSET(x)\t\t(x << 16)\n+#define V2M_SYSREGS\t\t\t(V2M_PA_CS3 + V2M_PERIPH_OFFSET(1))\n+#define V2M_SYSCTL\t\t\t(V2M_PA_CS3 + V2M_PERIPH_OFFSET(2))\n+#define V2M_SERIAL_BUS_PCI\t\t(V2M_PA_CS3 + V2M_PERIPH_OFFSET(3))\n+\n+#define V2M_BASE\t\t\t0x80000000\n+\n+/*\n+ * Physical addresses, offset from V2M_PA_CS0-3\n+ */\n+#define V2M_NOR0\t\t\t(V2M_PA_CS0)\n+#define V2M_NOR1\t\t\t(V2M_PA_CS4)\n+#define V2M_SRAM\t\t\t(V2M_PA_CS1)\n+\n+/* Common peripherals relative to CS7. */\n+#define V2M_AACI\t\t\t(V2M_PA_CS3 + V2M_PERIPH_OFFSET(4))\n+#define V2M_MMCI\t\t\t(V2M_PA_CS3 + V2M_PERIPH_OFFSET(5))\n+#define V2M_KMI0\t\t\t(V2M_PA_CS3 + V2M_PERIPH_OFFSET(6))\n+#define V2M_KMI1\t\t\t(V2M_PA_CS3 + V2M_PERIPH_OFFSET(7))\n+\n+#define V2M_UART0\t\t\t(V2M_PA_CS3 + V2M_PERIPH_OFFSET(9))\n+#define V2M_UART1\t\t\t(V2M_PA_CS3 + V2M_PERIPH_OFFSET(10))\n+#define V2M_UART2\t\t\t(V2M_PA_CS3 + V2M_PERIPH_OFFSET(11))\n+#define V2M_UART3\t\t\t(V2M_PA_CS3 + V2M_PERIPH_OFFSET(12))\n+\n+#define V2M_WDT\t\t\t\t(V2M_PA_CS3 + V2M_PERIPH_OFFSET(15))\n+\n+#define V2M_TIMER01\t\t\t(V2M_PA_CS3 + V2M_PERIPH_OFFSET(17))\n+#define V2M_TIMER23\t\t\t(V2M_PA_CS3 + V2M_PERIPH_OFFSET(18))\n+\n+#define V2M_SERIAL_BUS_DVI\t\t(V2M_PA_CS3 + V2M_PERIPH_OFFSET(22))\n+#define V2M_RTC\t\t\t\t(V2M_PA_CS3 + V2M_PERIPH_OFFSET(23))\n+\n+#define V2M_CF\t\t\t\t(V2M_PA_CS3 + V2M_PERIPH_OFFSET(26))\n+\n+#define V2M_CLCD\t\t\t(V2M_PA_CS3 + V2M_PERIPH_OFFSET(31))\n+\n+/* System register offsets. */\n+#define V2M_SYS_CFGDATA\t\t\t(V2M_SYSREGS + 0x0a0)\n+#define V2M_SYS_CFGCTRL\t\t\t(V2M_SYSREGS + 0x0a4)\n+#define V2M_SYS_CFGSTAT\t\t\t(V2M_SYSREGS + 0x0a8)\n+\n+/* Generic Timer Definitions */\n+#define COUNTER_FREQUENCY\t\t(0x1800000)\t/* 24MHz */\n+\n+/* Generic Interrupt Controller Definitions */\n+#define GICD_BASE\t\t\t(0x2C001000)\n+#define GICC_BASE\t\t\t(0x2C002000)\n+\n+#define CONFIG_SYS_MEMTEST_START\tV2M_BASE\n+#define CONFIG_SYS_MEMTEST_END\t\t(V2M_BASE + 0x80000000)\n+\n+/* Size of malloc() pool */\n+#define CONFIG_SYS_MALLOC_LEN\t\t(CONFIG_ENV_SIZE + 128 * 1024)\n+\n+/* SMSC9115 Ethernet from SMSC9118 family */\n+#define CONFIG_SMC9111\t\t\t1\n+#define CONFIG_SMC9111_BASE\t\t(0x1a000000)\n+\n+/* PL011 Serial Configuration */\n+#define CONFIG_PL011_SERIAL\n+#define CONFIG_PL011_CLOCK\t\t24000000\n+#define CONFIG_PL01x_PORTS\t\t{(void *)CONFIG_SYS_SERIAL0, \\\n+\t\t\t\t\t (void *)CONFIG_SYS_SERIAL1}\n+#define CONFIG_CONS_INDEX\t\t0\n+\n+#define CONFIG_BAUDRATE\t\t\t115200\n+#define CONFIG_SYS_BAUDRATE_TABLE\t{ 9600, 19200, 38400, 57600, 115200 }\n+#define CONFIG_SYS_SERIAL0\t\tV2M_UART0\n+#define CONFIG_SYS_SERIAL1\t\tV2M_UART1\n+\n+/* Command line configuration */\n+#define CONFIG_MENU\n+/*#define CONFIG_MENU_SHOW*/\n+#define CONFIG_CMD_CACHE\n+#define CONFIG_CMD_BDI\n+#define CONFIG_CMD_DHCP\n+#define CONFIG_CMD_PXE\n+#define CONFIG_CMD_ENV\n+#define CONFIG_CMD_FLASH\n+#define CONFIG_CMD_IMI\n+#define CONFIG_CMD_MEMORY\n+#define CONFIG_CMD_MII\n+#define CONFIG_CMD_NET\n+#define CONFIG_CMD_PING\n+#define CONFIG_CMD_SAVEENV\n+#define CONFIG_CMD_RUN\n+#define CONFIG_CMD_BOOTD\n+#define CONFIG_CMD_ECHO\n+#define CONFIG_CMD_SOURCE\n+#define CONFIG_CMD_FAT\n+#define CONFIG_DOS_PARTITION\n+\n+/* BOOTP options */\n+#define CONFIG_BOOTP_BOOTFILESIZE\n+#define CONFIG_BOOTP_BOOTPATH\n+#define CONFIG_BOOTP_GATEWAY\n+#define CONFIG_BOOTP_HOSTNAME\n+#define CONFIG_BOOTP_PXE\n+#define CONFIG_BOOTP_PXE_CLIENTARCH\t0x100\n+\n+/* Miscellaneous configurable options */\n+#define CONFIG_SYS_LOAD_ADDR\t\t(V2M_BASE + 0x10000000)\n+\n+/* Physical Memory Map */\n+#define CONFIG_NR_DRAM_BANKS\t\t1\n+#define PHYS_SDRAM_1\t\t\t(V2M_BASE)\t/* SDRAM Bank #1 */\n+#define PHYS_SDRAM_1_SIZE\t\t0x80000000\t/* 2048 MB */\n+#define CONFIG_SYS_SDRAM_BASE\t\tPHYS_SDRAM_1\n+\n+/* Initial environment variables */\n+#define CONFIG_EXTRA_ENV_SETTINGS\t\\\n+\t\t\t\t\t\"kernel_addr=0x200000\\0\"\t\\\n+\t\t\t\t\t\"initrd_addr=0xa00000\\0\"\t\\\n+\t\t\t\t\t\"initrd_size=0x2000000\\0\"\t\\\n+\t\t\t\t\t\"fdt_addr=0x100000\\0\"\t\t\\\n+\t\t\t\t\t\"fdt_high=0xa0000000\\0\"\n+\n+#define CONFIG_BOOTARGS\t\t\t\"console=ttyAMA0 root=/dev/ram0\"\n+#define CONFIG_BOOTCOMMAND\t\t\"bootm $kernel_addr \" \\\n+\t\t\t\t\t\"$initrd_addr:$initrd_size $fdt_addr\"\n+#define CONFIG_BOOTDELAY\t\t-1\n+\n+/* Do not preserve environment */\n+#define CONFIG_ENV_IS_NOWHERE\t\t1\n+#define CONFIG_ENV_SIZE\t\t\t0x1000\n+\n+/* Monitor Command Prompt */\n+#define CONFIG_SYS_CBSIZE\t\t512\t/* Console I/O Buffer Size */\n+#define CONFIG_SYS_PROMPT\t\t\"VExpress64# \"\n+#define CONFIG_SYS_PBSIZE\t\t(CONFIG_SYS_CBSIZE + \\\n+\t\t\t\t\tsizeof(CONFIG_SYS_PROMPT) + 16)\n+#define CONFIG_SYS_HUSH_PARSER\n+#define CONFIG_SYS_PROMPT_HUSH_PS2\t\"> \"\n+#define CONFIG_SYS_BARGSIZE\t\tCONFIG_SYS_CBSIZE\n+#define CONFIG_SYS_LONGHELP\n+#define CONFIG_CMDLINE_EDITING\t\t1\n+#define CONFIG_SYS_MAXARGS\t\t64\t/* max command args */\n+\n+#endif /* __VEXPRESS_AEMV8A_H */\n", "prefixes": [ "U-Boot", "v15", "09/10" ] }