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GET /api/patches/231643/?format=api
{ "id": 231643, "url": "http://patchwork.ozlabs.org/api/patches/231643/?format=api", "web_url": "http://patchwork.ozlabs.org/project/linux-imx/patch/1364377893-26839-1-git-send-email-p.zabel@pengutronix.de/", "project": { "id": 19, "url": "http://patchwork.ozlabs.org/api/projects/19/?format=api", "name": "Linux IMX development", "link_name": "linux-imx", "list_id": "linux-imx-kernel.lists.patchwork.ozlabs.org", "list_email": "linux-imx-kernel@lists.patchwork.ozlabs.org", "web_url": null, "scm_url": null, "webscm_url": null, "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<1364377893-26839-1-git-send-email-p.zabel@pengutronix.de>", "list_archive_url": null, "date": "2013-03-27T09:51:33", "name": "ARM i.MX53: Add GPU clocks to clock tree", "commit_ref": null, "pull_url": null, "state": "new", "archived": false, "hash": "f33de5b3e4b1b7d942760f3210109c024e055073", "submitter": { "id": 16215, "url": "http://patchwork.ozlabs.org/api/people/16215/?format=api", "name": "Philipp Zabel", "email": "p.zabel@pengutronix.de" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/linux-imx/patch/1364377893-26839-1-git-send-email-p.zabel@pengutronix.de/mbox/", "series": [], "comments": "http://patchwork.ozlabs.org/api/patches/231643/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/231643/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<linux-arm-kernel-bounces+incoming-imx=patchwork.ozlabs.org@lists.infradead.org>", "X-Original-To": "incoming-imx@patchwork.ozlabs.org", "Delivered-To": "patchwork-incoming-imx@bilbo.ozlabs.org", "Received": [ "from merlin.infradead.org (merlin.infradead.org\n\t[IPv6:2001:4978:20e::2])\n\t(using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits))\n\t(Client did not present a certificate)\n\tby ozlabs.org (Postfix) with ESMTPS id 68DF22C008C\n\tfor <incoming-imx@patchwork.ozlabs.org>;\n\tWed, 27 Mar 2013 20:55:29 +1100 (EST)", "from localhost ([::1] helo=merlin.infradead.org)\n\tby merlin.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux))\n\tid 1UKn1v-00014W-1h; Wed, 27 Mar 2013 09:52:27 +0000", "from metis.ext.pengutronix.de\n\t([2001:6f8:1178:4:290:27ff:fe1d:cc33])\n\tby merlin.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux))\n\tid 1UKn1A-0000ip-1C for linux-arm-kernel@lists.infradead.org;\n\tWed, 27 Mar 2013 09:51:41 +0000", "from dude.hi.pengutronix.de ([10.1.0.7] helo=dude.pengutronix.de)\n\tby metis.ext.pengutronix.de with esmtp (Exim 4.72)\n\t(envelope-from <p.zabel@pengutronix.de>)\n\tid 1UKn15-0001sf-Py; Wed, 27 Mar 2013 10:51:35 +0100" ], "From": "Philipp Zabel <p.zabel@pengutronix.de>", "To": "linux-arm-kernel@lists.infradead.org", "Subject": "[PATCH] ARM i.MX53: Add GPU clocks to clock tree", "Date": "Wed, 27 Mar 2013 10:51:33 +0100", "Message-Id": "<1364377893-26839-1-git-send-email-p.zabel@pengutronix.de>", "X-Mailer": "git-send-email 1.8.2.rc2", "X-SA-Exim-Connect-IP": "10.1.0.7", "X-SA-Exim-Mail-From": "p.zabel@pengutronix.de", "X-SA-Exim-Scanned": "No (on metis.ext.pengutronix.de);\n\tSAEximRunCond expanded to false", "X-PTX-Original-Recipient": "linux-arm-kernel@lists.infradead.org", "X-CRM114-Version": "20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 ", "X-CRM114-CacheID": "sfid-20130327_055140_426598_99421E60 ", "X-CRM114-Status": "GOOD ( 11.86 )", "X-Spam-Score": "-3.2 (---)", "X-Spam-Report": "SpamAssassin version 3.3.2 on merlin.infradead.org summary:\n\tContent analysis details: (-3.2 points)\n\tpts rule name description\n\t---- ----------------------\n\t--------------------------------------------------\n\t-1.3 RP_MATCHES_RCVD Envelope sender domain matches handover relay\n\tdomain\n\t-1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1%\n\t[score: 0.0000]", "Cc": "devicetree-discuss@lists.ozlabs.org, Shawn Guo <shawn.guo@linaro.org>,\n\tPhilipp Zabel <p.zabel@pengutronix.de>,\n\tSascha Hauer <kernel@pengutronix.de>", "X-BeenThere": "linux-arm-kernel@lists.infradead.org", "X-Mailman-Version": "2.1.15", "Precedence": "list", "List-Unsubscribe": "<http://lists.infradead.org/mailman/options/linux-arm-kernel>,\n\t<mailto:linux-arm-kernel-request@lists.infradead.org?subject=unsubscribe>", "List-Archive": "<http://lists.infradead.org/pipermail/linux-arm-kernel/>", "List-Post": "<mailto:linux-arm-kernel@lists.infradead.org>", "List-Help": "<mailto:linux-arm-kernel-request@lists.infradead.org?subject=help>", "List-Subscribe": "<http://lists.infradead.org/mailman/listinfo/linux-arm-kernel>,\n\t<mailto:linux-arm-kernel-request@lists.infradead.org?subject=subscribe>", "MIME-Version": "1.0", "Content-Type": "text/plain; charset=\"us-ascii\"", "Content-Transfer-Encoding": "7bit", "Sender": "\"linux-arm-kernel\" <linux-arm-kernel-bounces@lists.infradead.org>", "Errors-To": "linux-arm-kernel-bounces+incoming-imx=patchwork.ozlabs.org@lists.infradead.org", "List-Id": "linux-imx-kernel.lists.patchwork.ozlabs.org" }, "content": "This patch adds the missing GPU2D and GPU3D mux and gate clocks,\nand the graphics arbiter gate clock.\n\nSigned-off-by: Philipp Zabel <p.zabel@pengutronix.de>\n---\n Documentation/devicetree/bindings/clock/imx5-clock.txt | 5 +++++\n arch/arm/mach-imx/clk-imx51-imx53.c | 9 ++++++++-\n 2 files changed, 13 insertions(+), 1 deletion(-)", "diff": "diff --git a/Documentation/devicetree/bindings/clock/imx5-clock.txt b/Documentation/devicetree/bindings/clock/imx5-clock.txt\nindex 2a0c904..342ad0f 100644\n--- a/Documentation/devicetree/bindings/clock/imx5-clock.txt\n+++ b/Documentation/devicetree/bindings/clock/imx5-clock.txt\n@@ -172,6 +172,11 @@ clocks and IDs.\n \tcan1_serial_gate\t157\n \tcan1_ipg_gate\t\t158\n \towire_gate\t\t159\n+\tgpu3d_s\t\t\t160\n+\tgpu2d_s\t\t\t161\n+\tgpu3d_gate\t\t162\n+\tgpu2d_gate\t\t163\n+\tgarb_gate\t\t164\n \n Examples (for mx53):\n \ndiff --git a/arch/arm/mach-imx/clk-imx51-imx53.c b/arch/arm/mach-imx/clk-imx51-imx53.c\nindex 0f39f8c..fdd8657 100644\n--- a/arch/arm/mach-imx/clk-imx51-imx53.c\n+++ b/arch/arm/mach-imx/clk-imx51-imx53.c\n@@ -47,6 +47,8 @@ static const char *mx51_tve_ext_sel[] = { \"osc\", \"ckih1\", };\n static const char *mx53_tve_ext_sel[] = { \"pll4_sw\", \"ckih1\", };\n static const char *tve_sel[] = { \"tve_pred\", \"tve_ext_sel\", };\n static const char *ipu_sel[] = { \"axi_a\", \"axi_b\", \"emi_slow_gate\", \"ahb\", };\n+static const char *gpu3d_sel[] = { \"axi_a\", \"axi_b\", \"emi_slow_gate\", \"ahb\" };\n+static const char *gpu2d_sel[] = { \"axi_a\", \"axi_b\", \"emi_slow_gate\", \"ahb\" };\n static const char *vpu_sel[] = { \"axi_a\", \"axi_b\", \"emi_slow_gate\", \"ahb\", };\n static const char *mx53_can_sel[] = { \"ipg\", \"ckih1\", \"ckih2\", \"lp_apm\", };\n \n@@ -83,7 +85,7 @@ enum imx5_clks {\n \tssi2_root_gate, ssi3_root_gate, ssi_ext1_gate, ssi_ext2_gate,\n \tepit1_ipg_gate, epit1_hf_gate, epit2_ipg_gate, epit2_hf_gate,\n \tcan_sel, can1_serial_gate, can1_ipg_gate,\n-\towire_gate,\n+\towire_gate, gpu3d_s, gpu2d_s, gpu3d_gate, gpu2d_gate, garb_gate,\n \tclk_max\n };\n \n@@ -200,6 +202,11 @@ static void __init mx5_clocks_common_init(unsigned long rate_ckil,\n \tclk[nfc_gate] = imx_clk_gate2(\"nfc_gate\", \"nfc_podf\", MXC_CCM_CCGR5, 20);\n \tclk[ipu_di0_gate] = imx_clk_gate2(\"ipu_di0_gate\", \"ipu_di0_sel\", MXC_CCM_CCGR6, 10);\n \tclk[ipu_di1_gate] = imx_clk_gate2(\"ipu_di1_gate\", \"ipu_di1_sel\", MXC_CCM_CCGR6, 12);\n+\tclk[gpu3d_s] = imx_clk_mux(\"gpu3d_sel\", MXC_CCM_CBCMR, 4, 2, gpu3d_sel, ARRAY_SIZE(gpu3d_sel));\n+\tclk[gpu2d_s] = imx_clk_mux(\"gpu2d_sel\", MXC_CCM_CBCMR, 16, 2, gpu2d_sel, ARRAY_SIZE(gpu2d_sel));\n+\tclk[gpu3d_gate] = imx_clk_gate2(\"gpu3d_gate\", \"gpu3d_sel\", MXC_CCM_CCGR5, 2);\n+\tclk[garb_gate] = imx_clk_gate2(\"garb_gate\", \"axi_a\", MXC_CCM_CCGR5, 4);\n+\tclk[gpu2d_gate] = imx_clk_gate2(\"gpu2d_gate\", \"gpu2d_sel\", MXC_CCM_CCGR6, 14);\n \tclk[vpu_s] = imx_clk_mux(\"vpu_sel\", MXC_CCM_CBCMR, 14, 2, vpu_sel, ARRAY_SIZE(vpu_sel));\n \tclk[vpu_gate] = imx_clk_gate2(\"vpu_gate\", \"vpu_sel\", MXC_CCM_CCGR5, 6);\n \tclk[vpu_reference_gate] = imx_clk_gate2(\"vpu_reference_gate\", \"osc\", MXC_CCM_CCGR5, 8);\n", "prefixes": [] }