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GET /api/patches/2237935/?format=api
{ "id": 2237935, "url": "http://patchwork.ozlabs.org/api/patches/2237935/?format=api", "web_url": "http://patchwork.ozlabs.org/project/qemu-devel/patch/20260513163356.3033159-6-shaju.abraham@nutanix.com/", "project": { "id": 14, "url": "http://patchwork.ozlabs.org/api/projects/14/?format=api", "name": "QEMU Development", "link_name": "qemu-devel", "list_id": "qemu-devel.nongnu.org", "list_email": "qemu-devel@nongnu.org", "web_url": "", "scm_url": "", "webscm_url": "", "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<20260513163356.3033159-6-shaju.abraham@nutanix.com>", "list_archive_url": null, "date": "2026-05-13T16:33:48", "name": "[RFC,v1,05/13] target/arm: named_cpu_model: replace FIELD macro with IDREG_FIELD", "commit_ref": null, "pull_url": null, "state": "new", "archived": false, "hash": "6e6c7d25bc14ed0ce2d48ff59e32e6abde6ea14f", "submitter": { "id": 77003, "url": "http://patchwork.ozlabs.org/api/people/77003/?format=api", "name": "Shaju Abraham", "email": "shaju.abraham@nutanix.com" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/qemu-devel/patch/20260513163356.3033159-6-shaju.abraham@nutanix.com/mbox/", "series": [ { "id": 504187, "url": "http://patchwork.ozlabs.org/api/series/504187/?format=api", "web_url": "http://patchwork.ozlabs.org/project/qemu-devel/list/?series=504187", "date": "2026-05-13T16:33:48", "name": "named CPU models for ARM64 on KVM", "version": 1, "mbox": "http://patchwork.ozlabs.org/series/504187/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/2237935/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/2237935/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org>", "X-Original-To": "incoming@patchwork.ozlabs.org", "Delivered-To": "patchwork-incoming@legolas.ozlabs.org", "Authentication-Results": [ "legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=nutanix.com header.i=@nutanix.com header.a=rsa-sha256\n header.s=proofpoint20171006 header.b=ZStV4jxT;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=nutanix.com header.i=@nutanix.com header.a=rsa-sha256\n header.s=selector1 header.b=l6YWOb2S;\n\tdkim-atps=neutral", "legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org\n (client-ip=209.51.188.17; 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mx.microsoft.com 1; spf=pass\n smtp.mailfrom=nutanix.com; dmarc=pass action=none header.from=nutanix.com;\n dkim=pass header.d=nutanix.com; arc=none", "From": "Shaju Abraham <shaju.abraham@nutanix.com>", "To": "eric.auger@redhat.com, qemu-devel@nongnu.org, qemu-arm@nongnu.org,\n kvmarm@lists.linux.dev, peter.maydell@linaro.org,\n richard.henderson@linaro.org, cohuck@redhat.com, sebott@redhat.com,\n skolothumtho@nvidia.com, philmd@linaro.org", "Cc": "maz@kernel.org, oliver.upton@linux.dev, pbonzini@redhat.com,\n prerna.saxena@nutanix.com, jon@nutanix.com, jond@nutanix.com,\n Shaju Abraham <shaju.abraham@nutanix.com>,\n Khushit Shah <khushit.shah@nutanix.com>", "Subject": "[RFC PATCH v1 05/13] target/arm: named_cpu_model: replace FIELD macro\n with IDREG_FIELD", "Date": "Wed, 13 May 2026 16:33:48 +0000", "Message-ID": "<20260513163356.3033159-6-shaju.abraham@nutanix.com>", "X-Mailer": "git-send-email 2.43.0", "In-Reply-To": "<20260513163356.3033159-1-shaju.abraham@nutanix.com>", "References": "<20260513163356.3033159-1-shaju.abraham@nutanix.com>", "Content-Transfer-Encoding": "8bit", "Content-Type": "text/plain", "X-ClientProxiedBy": "CY5PR10CA0003.namprd10.prod.outlook.com\n (2603:10b6:930:1c::30) To PH7PR02MB10160.namprd02.prod.outlook.com\n (2603:10b6:510:2e7::19)", "MIME-Version": "1.0", "X-MS-PublicTrafficType": "Email", "X-MS-TrafficTypeDiagnostic": "PH7PR02MB10160:EE_|CH3PR02MB9564:EE_", "X-MS-Office365-Filtering-Correlation-Id": "00293c69-2ac9-41da-d2db-08deb10d78d7", "x-proofpoint-crosstenant": "true", "X-MS-Exchange-SenderADCheck": "1", "X-MS-Exchange-AntiSpam-Relay": "0", "X-Microsoft-Antispam": "BCL:0;\n ARA:13230040|7416014|376014|366016|1800799024|18002099003|22082099003|921020|56012099003;", "X-Microsoft-Antispam-Message-Info": "\n y/4iP6HwN6RzIkz62arKXPM42MQbWSJb5RQF6TWnjuCeNbs5rwgoseX/kH71em36oDd9+vDwSJxqaRaXFzRXyzSkXl+2IiJcYNngdSk1igSAZYwzmK6Zcw30XEUu91e/HfvOZbguft83XrxVFl9kOIi05I3ZyJXiRc6fy3ljbMxkR6RHYb2Nan10hqRzbAiyxYgYt8+UwhKEMT4qTfXzJ6XeBXkus8IEgICecLdvLnOa36IUYvv2E18ldik3WakuKQrEcgltUIbIbkigk87iJti7/685xfNRPb37WtSQvjZImmOS8KptnV1bSGXzlYIzkvUxVBQnpnyP/fmIsMJhQkcvBrYSJjfUWaiMs2phaLzF+CZNZqMsHLlmNi2n/eVLzZE6VRWsAdHnkYLJ9vmSu+1UDZo8wT2PCUHCGvfPqRNS0kuUZgRLHZCigLioKNC51ql9ZeTcG+ay9UCAA/Iva8yvZzTVbianubftWIjYLux8WZbPycMzRbKcqtsWPPeMVg9JQkrYKNMkam37Ij3Q/8Ry6JLFUgt+xuJja2zqnz1zL9sNiy95rtWL42Um1IspSgczLo3a/od0tSd1rNw/mZ0LqRcyFEx/hH0cHN/WPuNqEgpKhMsGolM9g8DciKkXEgZJ4l4ccPQa0k+0PK0sF1Qje2Rm7HMIddoGzXSlGfZDr68mAX2X9wLg6smfcq5DnqHeyxbUqfMtPpA7QEu75bRHoGdYmhnlS710I6NOUiM=", "X-Forefront-Antispam-Report": "CIP:255.255.255.255; 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helo=mx0b-002c1b01.pphosted.com", "X-Spam_score_int": "-31", "X-Spam_score": "-3.2", "X-Spam_bar": "---", "X-Spam_report": "(-3.2 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.445,\n DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1,\n RCVD_IN_DNSWL_LOW=-0.7, SPF_HELO_NONE=0.001, SPF_PASS=-0.001,\n UPPERCASE_50_75=0.008 autolearn=ham autolearn_force=no", "X-Spam_action": "no action", "X-BeenThere": "qemu-devel@nongnu.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "qemu development <qemu-devel.nongnu.org>", "List-Unsubscribe": "<https://lists.nongnu.org/mailman/options/qemu-devel>,\n <mailto:qemu-devel-request@nongnu.org?subject=unsubscribe>", "List-Archive": "<https://lists.nongnu.org/archive/html/qemu-devel>", "List-Post": "<mailto:qemu-devel@nongnu.org>", "List-Help": "<mailto:qemu-devel-request@nongnu.org?subject=help>", "List-Subscribe": "<https://lists.nongnu.org/mailman/listinfo/qemu-devel>,\n <mailto:qemu-devel-request@nongnu.org?subject=subscribe>", "Errors-To": "qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org", "Sender": "qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org" }, "content": "Replace the existing FIELD() macro with the newly introduced IDREG_FIELD()\nmacro to remove deduplication. All definitions for TCG remains the same.\n\nCo-authored-by: Khushit Shah <khushit.shah@nutanix.com>\nSigned-off-by: Shaju Abraham <shaju.abraham@nutanix.com>\n---\n target/arm/cpu-features.h | 232 +++-----------------------------------\n 1 file changed, 18 insertions(+), 214 deletions(-)", "diff": "diff --git a/target/arm/cpu-features.h b/target/arm/cpu-features.h\nindex 4e44245a8b..782850ccec 100644\n--- a/target/arm/cpu-features.h\n+++ b/target/arm/cpu-features.h\n@@ -50,14 +50,6 @@ FIELD(CCSIDR_EL1, LINESIZE, 0, 3)\n FIELD(CCSIDR_EL1, ASSOCIATIVITY, 3, 10)\n FIELD(CCSIDR_EL1, NUMSETS, 13, 15)\n \n-FIELD(CTR_EL0, IMINLINE, 0, 4)\n-FIELD(CTR_EL0, L1IP, 14, 2)\n-FIELD(CTR_EL0, DMINLINE, 16, 4)\n-FIELD(CTR_EL0, ERG, 20, 4)\n-FIELD(CTR_EL0, CWG, 24, 4)\n-FIELD(CTR_EL0, IDC, 28, 1)\n-FIELD(CTR_EL0, DIC, 29, 1)\n-FIELD(CTR_EL0, TMINLINE, 32, 6)\n \n FIELD(MIDR_EL1, REVISION, 0, 4)\n FIELD(MIDR_EL1, PARTNUM, 4, 12)\n@@ -189,217 +181,29 @@ FIELD(ID_PFR1, VIRTUALIZATION, 12, 4)\n FIELD(ID_PFR1, GENTIMER, 16, 4)\n FIELD(ID_PFR1, SEC_FRAC, 20, 4)\n FIELD(ID_PFR1, VIRT_FRAC, 24, 4)\n-FIELD(ID_PFR1, GIC, 28, 4)\n \n FIELD(ID_PFR2, CSV3, 0, 4)\n FIELD(ID_PFR2, SSBS, 4, 4)\n FIELD(ID_PFR2, RAS_FRAC, 8, 4)\n \n-FIELD(ID_AA64ISAR0, AES, 4, 4)\n-FIELD(ID_AA64ISAR0, SHA1, 8, 4)\n-FIELD(ID_AA64ISAR0, SHA2, 12, 4)\n-FIELD(ID_AA64ISAR0, CRC32, 16, 4)\n-FIELD(ID_AA64ISAR0, ATOMIC, 20, 4)\n-FIELD(ID_AA64ISAR0, TME, 24, 4)\n-FIELD(ID_AA64ISAR0, RDM, 28, 4)\n-FIELD(ID_AA64ISAR0, SHA3, 32, 4)\n-FIELD(ID_AA64ISAR0, SM3, 36, 4)\n-FIELD(ID_AA64ISAR0, SM4, 40, 4)\n-FIELD(ID_AA64ISAR0, DP, 44, 4)\n-FIELD(ID_AA64ISAR0, FHM, 48, 4)\n-FIELD(ID_AA64ISAR0, TS, 52, 4)\n-FIELD(ID_AA64ISAR0, TLB, 56, 4)\n-FIELD(ID_AA64ISAR0, RNDR, 60, 4)\n-\n-FIELD(ID_AA64ISAR1, DPB, 0, 4)\n-FIELD(ID_AA64ISAR1, APA, 4, 4)\n-FIELD(ID_AA64ISAR1, API, 8, 4)\n-FIELD(ID_AA64ISAR1, JSCVT, 12, 4)\n-FIELD(ID_AA64ISAR1, FCMA, 16, 4)\n-FIELD(ID_AA64ISAR1, LRCPC, 20, 4)\n-FIELD(ID_AA64ISAR1, GPA, 24, 4)\n-FIELD(ID_AA64ISAR1, GPI, 28, 4)\n-FIELD(ID_AA64ISAR1, FRINTTS, 32, 4)\n-FIELD(ID_AA64ISAR1, SB, 36, 4)\n-FIELD(ID_AA64ISAR1, SPECRES, 40, 4)\n-FIELD(ID_AA64ISAR1, BF16, 44, 4)\n-FIELD(ID_AA64ISAR1, DGH, 48, 4)\n-FIELD(ID_AA64ISAR1, I8MM, 52, 4)\n-FIELD(ID_AA64ISAR1, XS, 56, 4)\n-FIELD(ID_AA64ISAR1, LS64, 60, 4)\n-\n-FIELD(ID_AA64ISAR2, WFXT, 0, 4)\n-FIELD(ID_AA64ISAR2, RPRES, 4, 4)\n-FIELD(ID_AA64ISAR2, GPA3, 8, 4)\n-FIELD(ID_AA64ISAR2, APA3, 12, 4)\n-FIELD(ID_AA64ISAR2, MOPS, 16, 4)\n-FIELD(ID_AA64ISAR2, BC, 20, 4)\n-FIELD(ID_AA64ISAR2, PAC_FRAC, 24, 4)\n-FIELD(ID_AA64ISAR2, CLRBHB, 28, 4)\n-FIELD(ID_AA64ISAR2, SYSREG_128, 32, 4)\n-FIELD(ID_AA64ISAR2, SYSINSTR_128, 36, 4)\n-FIELD(ID_AA64ISAR2, PRFMSLC, 40, 4)\n-FIELD(ID_AA64ISAR2, RPRFM, 48, 4)\n-FIELD(ID_AA64ISAR2, CSSC, 52, 4)\n-FIELD(ID_AA64ISAR2, LUT, 56, 4)\n-FIELD(ID_AA64ISAR2, ATS1A, 60, 4)\n-\n-FIELD(ID_AA64PFR0, EL0, 0, 4)\n-FIELD(ID_AA64PFR0, EL1, 4, 4)\n-FIELD(ID_AA64PFR0, EL2, 8, 4)\n-FIELD(ID_AA64PFR0, EL3, 12, 4)\n-FIELD(ID_AA64PFR0, FP, 16, 4)\n-FIELD(ID_AA64PFR0, ADVSIMD, 20, 4)\n-FIELD(ID_AA64PFR0, GIC, 24, 4)\n-FIELD(ID_AA64PFR0, RAS, 28, 4)\n-FIELD(ID_AA64PFR0, SVE, 32, 4)\n-FIELD(ID_AA64PFR0, SEL2, 36, 4)\n-FIELD(ID_AA64PFR0, MPAM, 40, 4)\n-FIELD(ID_AA64PFR0, AMU, 44, 4)\n-FIELD(ID_AA64PFR0, DIT, 48, 4)\n-FIELD(ID_AA64PFR0, RME, 52, 4)\n-FIELD(ID_AA64PFR0, CSV2, 56, 4)\n-FIELD(ID_AA64PFR0, CSV3, 60, 4)\n-\n-FIELD(ID_AA64PFR1, BT, 0, 4)\n-FIELD(ID_AA64PFR1, SSBS, 4, 4)\n-FIELD(ID_AA64PFR1, MTE, 8, 4)\n-FIELD(ID_AA64PFR1, RAS_FRAC, 12, 4)\n-FIELD(ID_AA64PFR1, MPAM_FRAC, 16, 4)\n-FIELD(ID_AA64PFR1, SME, 24, 4)\n-FIELD(ID_AA64PFR1, RNDR_TRAP, 28, 4)\n-FIELD(ID_AA64PFR1, CSV2_FRAC, 32, 4)\n-FIELD(ID_AA64PFR1, NMI, 36, 4)\n-FIELD(ID_AA64PFR1, MTE_FRAC, 40, 4)\n-FIELD(ID_AA64PFR1, GCS, 44, 4)\n-FIELD(ID_AA64PFR1, THE, 48, 4)\n-FIELD(ID_AA64PFR1, MTEX, 52, 4)\n-FIELD(ID_AA64PFR1, DF2, 56, 4)\n-FIELD(ID_AA64PFR1, PFAR, 60, 4)\n-\n-FIELD(ID_AA64PFR2, MTEPERM, 0, 4)\n-FIELD(ID_AA64PFR2, MTESTOREONLY, 4, 4)\n-FIELD(ID_AA64PFR2, MTEFAR, 8, 4)\n-FIELD(ID_AA64PFR2, GCIE, 12, 4)\n-FIELD(ID_AA64PFR2, FPMR, 32, 4)\n-\n-FIELD(ID_AA64MMFR0, PARANGE, 0, 4)\n-FIELD(ID_AA64MMFR0, ASIDBITS, 4, 4)\n-FIELD(ID_AA64MMFR0, BIGEND, 8, 4)\n-FIELD(ID_AA64MMFR0, SNSMEM, 12, 4)\n-FIELD(ID_AA64MMFR0, BIGENDEL0, 16, 4)\n-FIELD(ID_AA64MMFR0, TGRAN16, 20, 4)\n-FIELD(ID_AA64MMFR0, TGRAN64, 24, 4)\n-FIELD(ID_AA64MMFR0, TGRAN4, 28, 4)\n-FIELD(ID_AA64MMFR0, TGRAN16_2, 32, 4)\n-FIELD(ID_AA64MMFR0, TGRAN64_2, 36, 4)\n-FIELD(ID_AA64MMFR0, TGRAN4_2, 40, 4)\n-FIELD(ID_AA64MMFR0, EXS, 44, 4)\n-FIELD(ID_AA64MMFR0, FGT, 56, 4)\n-FIELD(ID_AA64MMFR0, ECV, 60, 4)\n-\n-FIELD(ID_AA64MMFR1, HAFDBS, 0, 4)\n-FIELD(ID_AA64MMFR1, VMIDBITS, 4, 4)\n-FIELD(ID_AA64MMFR1, VH, 8, 4)\n-FIELD(ID_AA64MMFR1, HPDS, 12, 4)\n-FIELD(ID_AA64MMFR1, LO, 16, 4)\n-FIELD(ID_AA64MMFR1, PAN, 20, 4)\n-FIELD(ID_AA64MMFR1, SPECSEI, 24, 4)\n-FIELD(ID_AA64MMFR1, XNX, 28, 4)\n-FIELD(ID_AA64MMFR1, TWED, 32, 4)\n-FIELD(ID_AA64MMFR1, ETS, 36, 4)\n-FIELD(ID_AA64MMFR1, HCX, 40, 4)\n-FIELD(ID_AA64MMFR1, AFP, 44, 4)\n-FIELD(ID_AA64MMFR1, NTLBPA, 48, 4)\n-FIELD(ID_AA64MMFR1, TIDCP1, 52, 4)\n-FIELD(ID_AA64MMFR1, CMOW, 56, 4)\n-FIELD(ID_AA64MMFR1, ECBHB, 60, 4)\n-\n-FIELD(ID_AA64MMFR2, CNP, 0, 4)\n-FIELD(ID_AA64MMFR2, UAO, 4, 4)\n-FIELD(ID_AA64MMFR2, LSM, 8, 4)\n-FIELD(ID_AA64MMFR2, IESB, 12, 4)\n-FIELD(ID_AA64MMFR2, VARANGE, 16, 4)\n-FIELD(ID_AA64MMFR2, CCIDX, 20, 4)\n-FIELD(ID_AA64MMFR2, NV, 24, 4)\n-FIELD(ID_AA64MMFR2, ST, 28, 4)\n-FIELD(ID_AA64MMFR2, AT, 32, 4)\n-FIELD(ID_AA64MMFR2, IDS, 36, 4)\n-FIELD(ID_AA64MMFR2, FWB, 40, 4)\n-FIELD(ID_AA64MMFR2, TTL, 48, 4)\n-FIELD(ID_AA64MMFR2, BBM, 52, 4)\n-FIELD(ID_AA64MMFR2, EVT, 56, 4)\n-FIELD(ID_AA64MMFR2, E0PD, 60, 4)\n-\n-FIELD(ID_AA64MMFR3, TCRX, 0, 4)\n-FIELD(ID_AA64MMFR3, SCTLRX, 4, 4)\n-FIELD(ID_AA64MMFR3, S1PIE, 8, 4)\n-FIELD(ID_AA64MMFR3, S2PIE, 12, 4)\n-FIELD(ID_AA64MMFR3, S1POE, 16, 4)\n-FIELD(ID_AA64MMFR3, S2POE, 20, 4)\n-FIELD(ID_AA64MMFR3, AIE, 24, 4)\n-FIELD(ID_AA64MMFR3, MEC, 28, 4)\n-FIELD(ID_AA64MMFR3, D128, 32, 4)\n-FIELD(ID_AA64MMFR3, D128_2, 36, 4)\n-FIELD(ID_AA64MMFR3, SNERR, 40, 4)\n-FIELD(ID_AA64MMFR3, ANERR, 44, 4)\n-FIELD(ID_AA64MMFR3, SDERR, 52, 4)\n-FIELD(ID_AA64MMFR3, ADERR, 56, 4)\n-FIELD(ID_AA64MMFR3, SPEC_FPACC, 60, 4)\n-\n-FIELD(ID_AA64MMFR4, POPS, 0, 4)\n-FIELD(ID_AA64MMFR4, EIESB, 4, 4)\n-FIELD(ID_AA64MMFR4, ASID2, 8, 4)\n-FIELD(ID_AA64MMFR4, HACDBS, 12, 4)\n-FIELD(ID_AA64MMFR4, FGWTE3, 16, 4)\n-FIELD(ID_AA64MMFR4, NV_FRAC, 20, 4)\n-FIELD(ID_AA64MMFR4, E2H0, 24, 4)\n-FIELD(ID_AA64MMFR4, RMEGDI, 28, 4)\n-FIELD(ID_AA64MMFR4, E3DSE, 36, 4)\n-FIELD(ID_AA64MMFR4, SRMASK, 44, 4)\n-\n-FIELD(ID_AA64DFR0, DEBUGVER, 0, 4)\n-FIELD(ID_AA64DFR0, TRACEVER, 4, 4)\n-FIELD(ID_AA64DFR0, PMUVER, 8, 4)\n-FIELD(ID_AA64DFR0, BRPS, 12, 4)\n-FIELD(ID_AA64DFR0, PMSS, 16, 4)\n-FIELD(ID_AA64DFR0, WRPS, 20, 4)\n-FIELD(ID_AA64DFR0, SEBEP, 24, 4)\n-FIELD(ID_AA64DFR0, CTX_CMPS, 28, 4)\n-FIELD(ID_AA64DFR0, PMSVER, 32, 4)\n-FIELD(ID_AA64DFR0, DOUBLELOCK, 36, 4)\n-FIELD(ID_AA64DFR0, TRACEFILT, 40, 4)\n-FIELD(ID_AA64DFR0, TRACEBUFFER, 44, 4)\n-FIELD(ID_AA64DFR0, MTPMU, 48, 4)\n-FIELD(ID_AA64DFR0, BRBE, 52, 4)\n-FIELD(ID_AA64DFR0, EXTTRCBUFF, 56, 4)\n-FIELD(ID_AA64DFR0, HPMN0, 60, 4)\n-\n-FIELD(ID_AA64ZFR0, SVEVER, 0, 4)\n-FIELD(ID_AA64ZFR0, AES, 4, 4)\n-FIELD(ID_AA64ZFR0, ELTPERM, 12, 4)\n-FIELD(ID_AA64ZFR0, BITPERM, 16, 4)\n-FIELD(ID_AA64ZFR0, BFLOAT16, 20, 4)\n-FIELD(ID_AA64ZFR0, B16B16, 24, 4)\n-FIELD(ID_AA64ZFR0, SHA3, 32, 4)\n-FIELD(ID_AA64ZFR0, SM4, 40, 4)\n-FIELD(ID_AA64ZFR0, I8MM, 44, 4)\n-FIELD(ID_AA64ZFR0, F16MM, 48, 4)\n-FIELD(ID_AA64ZFR0, F32MM, 52, 4)\n-FIELD(ID_AA64ZFR0, F64MM, 56, 4)\n-\n-FIELD(ID_AA64SMFR0, F32F32, 32, 1)\n-FIELD(ID_AA64SMFR0, BI32I32, 33, 1)\n-FIELD(ID_AA64SMFR0, B16F32, 34, 1)\n-FIELD(ID_AA64SMFR0, F16F32, 35, 1)\n-FIELD(ID_AA64SMFR0, I8I32, 36, 4)\n-FIELD(ID_AA64SMFR0, F16F16, 42, 1)\n-FIELD(ID_AA64SMFR0, B16B16, 43, 1)\n-FIELD(ID_AA64SMFR0, I16I32, 44, 4)\n-FIELD(ID_AA64SMFR0, F64F64, 48, 1)\n-FIELD(ID_AA64SMFR0, I16I64, 52, 4)\n-FIELD(ID_AA64SMFR0, SMEVER, 56, 4)\n-FIELD(ID_AA64SMFR0, FA64, 63, 1)\n+/*\n+ * Expand FIELD() declarations for every ID register field listed in\n+ * cpu-idregs.h.inc .\n+ */\n+#define IDREG_START(reg)\n+#define IDREG_END(reg)\n+#define IDREG_FIELD_ARCH_VAL(v, n)\n+#define IDREG_FIELD_ARCH_VAL_ANY\n+#define IDREG_FIELD_END(reg, field)\n+#define IDREG_FIELD_START(reg, field, _shift, _length, safe, defval) \\\n+ FIELD(reg, field, _shift, _length)\n+#include \"cpu-idregs.h.inc\"\n+#undef IDREG_FIELD_START\n+#undef IDREG_FIELD_END\n+#undef IDREG_FIELD_ARCH_VAL_ANY\n+#undef IDREG_FIELD_ARCH_VAL\n+#undef IDREG_END\n+#undef IDREG_START\n \n FIELD(ID_DFR0, COPDBG, 0, 4)\n FIELD(ID_DFR0, COPSDBG, 4, 4)\n", "prefixes": [ "RFC", "v1", "05/13" ] }